libs/rt-thread-official
libs
/
rt-thread-official
mirror of https://github.com/RT-Thread/rt-thread.git
4
0
Fork 0
Code Issues Releases Wiki Activity

rm48x50: temperately disable the VFP register test

This commit is contained in:
Grissiom 2013-05-26 22:15:26 +08:00
parent 56b640ecb6
commit 435f305fa2
1 changed files with 10 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
bsp/rm48x50/application/reg_test.asm
View File

@ -69,8 +69,8 @@
; ;
.def vRegTestTask1 .def vRegTestTask1
.ref ulRegTest1Counter .ref ulRegTest1Counter
.ref rt_thread_yield .ref rt_thread_delay
.if (__TI_VFP_SUPPORT__) .if (0)
.ref vPortTaskUsesFPU .ref vPortTaskUsesFPU
.endif ;__TI_VFP_SUPPORT__ .endif ;__TI_VFP_SUPPORT__
@ -78,7 +78,7 @@
.arm .arm
vRegTestTask1: vRegTestTask1:
.if (__TI_VFP_SUPPORT__) .if (0)
; Let the port layer know that this task needs its FPU context saving. ; Let the port layer know that this task needs its FPU context saving.
BL vPortTaskUsesFPU BL vPortTaskUsesFPU
.endif .endif
@ -99,7 +99,7 @@ vRegTestTask1:
mov r12, #0xCC mov r12, #0xCC
mov r14, #0xEE mov r14, #0xEE
.if (__TI_VFP_SUPPORT__) .if (0)
; Fill each FPU register with a known value. ; Fill each FPU register with a known value.
vmov d0, r0, r1 vmov d0, r0, r1
vmov d1, r2, r3 vmov d1, r2, r3
@ -124,10 +124,11 @@ vRegTestLoop1:
STMFD sp!, {r0-r3, r12} STMFD sp!, {r0-r3, r12}
; Force yeild ; Force yeild
BL rt_thread_yield MOV r0, #5
BL rt_thread_delay
LDMFD sp!, {r0-r3, r12} LDMFD sp!, {r0-r3, r12}
.if (__TI_VFP_SUPPORT__) .if (0)
; Check all the VFP registers still contain the values set above. ; Check all the VFP registers still contain the values set above.
; First save registers that are clobbered by the test. ; First save registers that are clobbered by the test.
STMFD sp!, { r0-r1 } STMFD sp!, { r0-r1 }
@ -284,7 +285,7 @@ vRegTestError1:
.arm .arm
; ;
vRegTestTask2: vRegTestTask2:
.if (__TI_VFP_SUPPORT__) .if (0)
; Let the port layer know that this task needs its FPU context saving. ; Let the port layer know that this task needs its FPU context saving.
BL vPortTaskUsesFPU BL vPortTaskUsesFPU
.endif .endif
@ -305,7 +306,7 @@ vRegTestTask2:
mov r12, #0xCC000000 mov r12, #0xCC000000
mov r14, #0xEE000000 mov r14, #0xEE000000
.if (__TI_VFP_SUPPORT__) .if (0)
; Fill each FPU register with a known value. ; Fill each FPU register with a known value.
vmov d0, r0, r1 vmov d0, r0, r1
@ -328,7 +329,7 @@ vRegTestTask2:
vRegTestLoop2: vRegTestLoop2:
.if (__TI_VFP_SUPPORT__) .if (0)
; Check all the VFP registers still contain the values set above. ; Check all the VFP registers still contain the values set above.
; First save registers that are clobbered by the test. ; First save registers that are clobbered by the test.
STMFD sp!, { r0-r1 } STMFD sp!, { r0-r1 }