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[bsp/ESP32_C3] Add the gpio driver and readme.md (#6027)

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supperthomas 2022-06-04 17:04:19 +08:00 committed by GitHub
parent fb3f835089
commit 433f0c7721
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GPG Key ID: 4AEE18F83AFDEB23
10 changed files with 529 additions and 228 deletions
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176
bsp/ESP32_C3/0001-add-fixed-of-rtthread.patch → bsp/ESP32_C3/0001-add-the-config-of-RTTHREAD.patch
View File

@ -1,20 +1,37 @@
From 8c8c4bd282ed5bf359ef1c0eaeace4c4fbe8ff52 Mon Sep 17 00:00:00 2001
From 317ee995e9d530587bfb14439b3b1ee38d1afe77 Mon Sep 17 00:00:00 2001
From: supperthomas <78900636@qq.com>
Date: Mon, 18 Apr 2022 22:59:02 +0800
Subject: [PATCH] add fixed of rtthread
Date: Fri, 6 May 2022 23:06:28 +0800
Subject: [PATCH] add the config of RTTHREAD
add the init link file
---
.../esp_system/ld/esp32c3/sections.ld.in | 19 ++
components/freertos/port/port_common.c | 11 +-
components/freertos/port/port_systick.c | 56 ++---
components/riscv/vectors.S | 236 +++++++++++++++---
4 files changed, 254 insertions(+), 68 deletions(-)
Kconfig | 4 +
.../esp_system/ld/esp32c3/sections.ld.in | 26 +++
components/freertos/port/port_common.c | 5 +
components/freertos/port/port_systick.c | 3 +
components/riscv/vectors.S | 220 ++++++++++++++++--
5 files changed, 239 insertions(+), 19 deletions(-)
diff --git a/Kconfig b/Kconfig
index 928d274106..d368adaa37 100644
--- a/Kconfig
+++ b/Kconfig
@@ -61,6 +61,10 @@ mainmenu "Espressif IoT Development Framework Configuration"
bool
default "y" if IDF_TARGET="linux"
+ config IDF_RTOS_RTTHREAD
+ bool "RT-THREAD SELECT"
+ default "n"
+
config IDF_FIRMWARE_CHIP_ID
hex
default 0x0000 if IDF_TARGET_ESP32
diff --git a/components/esp_system/ld/esp32c3/sections.ld.in b/components/esp_system/ld/esp32c3/sections.ld.in
index 0ebeda06c1..10506d38a3 100644
index 0ebeda06c1..8215237fff 100644
--- a/components/esp_system/ld/esp32c3/sections.ld.in
+++ b/components/esp_system/ld/esp32c3/sections.ld.in
@@ -183,6 +183,25 @@ SECTIONS
@@ -183,6 +183,32 @@ SECTIONS
_noinit_end = ABSOLUTE(.);
} > dram0_0_seg
@ -36,101 +53,61 @@ index 0ebeda06c1..10506d38a3 100644
+ __heap_start__ = .;
+ . += __STACKSIZE__;
+ __heap_end__ = .;
+ /* section information for initial. */
+ . = ALIGN(4);
+ __rt_init_start = .;
+ KEEP(*(SORT(.rti_fn*)))
+ __rt_init_end = .;
+
+ . = ALIGN(4);
+ } > dram0_0_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
diff --git a/components/freertos/port/port_common.c b/components/freertos/port/port_common.c
index ffca3d5429..dd3cc46f16 100644
index ffca3d5429..9d8159f588 100644
--- a/components/freertos/port/port_common.c
+++ b/components/freertos/port/port_common.c
@@ -74,11 +74,12 @@ void esp_startup_start_app_common(void)
@@ -74,11 +74,16 @@ void esp_startup_start_app_common(void)
esp_gdbstub_init();
#endif // CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME
- portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
- ESP_TASK_MAIN_STACK, NULL,
- ESP_TASK_MAIN_PRIO, NULL, ESP_TASK_MAIN_CORE);
- assert(res == pdTRUE);
- (void)res;
+ // portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
+ // ESP_TASK_MAIN_STACK, NULL,
+ // ESP_TASK_MAIN_PRIO, NULL, ESP_TASK_MAIN_CORE);
+ ///assert(res == pdTRUE);
+#ifdef CONFIG_IDF_RTOS_RTTHREAD
+ app_main();
+ //(void)res;
+#else
portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
ESP_TASK_MAIN_STACK, NULL,
ESP_TASK_MAIN_PRIO, NULL, ESP_TASK_MAIN_CORE);
assert(res == pdTRUE);
(void)res;
+#endif
+
}
static void main_task(void* args)
diff --git a/components/freertos/port/port_systick.c b/components/freertos/port/port_systick.c
index 0c14a155a1..cf525f9383 100644
index 0c14a155a1..0fa203574b 100644
--- a/components/freertos/port/port_systick.c
+++ b/components/freertos/port/port_systick.c
@@ -116,34 +116,34 @@ void vPortSetupTimer(void)
@@ -116,6 +116,8 @@ void vPortSetupTimer(void)
*/
IRAM_ATTR void SysTickIsrHandler(void *arg)
{
- uint32_t cpuid = xPortGetCoreID();
- systimer_hal_context_t *systimer_hal = (systimer_hal_context_t *)arg;
-#ifdef CONFIG_PM_TRACE
- ESP_PM_TRACE_ENTER(TICK, cpuid);
-#endif
-
- uint32_t alarm_id = SYSTIMER_LL_ALARM_OS_TICK_CORE0 + cpuid;
- do {
- systimer_ll_clear_alarm_int(systimer_hal->dev, alarm_id);
-
- uint32_t diff = systimer_hal_get_counter_value(systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK) / systimer_ll_get_alarm_period(systimer_hal->dev, alarm_id) - s_handled_systicks[cpuid];
- if (diff > 0) {
- if (s_handled_systicks[cpuid] == 0) {
- s_handled_systicks[cpuid] = diff;
- diff = 1;
- } else {
- s_handled_systicks[cpuid] += diff;
- }
-
- do {
- xPortSysTickHandler();
- } while (--diff);
- }
- } while (systimer_ll_is_alarm_int_fired(systimer_hal->dev, alarm_id));
-
-#ifdef CONFIG_PM_TRACE
- ESP_PM_TRACE_EXIT(TICK, cpuid);
-#endif
+// uint32_t cpuid = xPortGetCoreID();
+// systimer_hal_context_t *systimer_hal = (systimer_hal_context_t *)arg;
+// #ifdef CONFIG_PM_TRACE
+// ESP_PM_TRACE_ENTER(TICK, cpuid);
+// #endif
+
+// uint32_t alarm_id = SYSTIMER_LL_ALARM_OS_TICK_CORE0 + cpuid;
+// do {
+// systimer_ll_clear_alarm_int(systimer_hal->dev, alarm_id);
+
+// uint32_t diff = systimer_hal_get_counter_value(systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK) / systimer_ll_get_alarm_period(systimer_hal->dev, alarm_id) - s_handled_systicks[cpuid];
+// if (diff > 0) {
+// if (s_handled_systicks[cpuid] == 0) {
+// s_handled_systicks[cpuid] = diff;
+// diff = 1;
+// } else {
+// s_handled_systicks[cpuid] += diff;
+// }
+
+// do {
+// xPortSysTickHandler();
+// } while (--diff);
+// }
+// } while (systimer_ll_is_alarm_int_fired(systimer_hal->dev, alarm_id));
+
+// #ifdef CONFIG_PM_TRACE
+// ESP_PM_TRACE_EXIT(TICK, cpuid);
+// #endif
+#ifdef CONFIG_IDF_RTOS_RTTHREAD
+#else
uint32_t cpuid = xPortGetCoreID();
systimer_hal_context_t *systimer_hal = (systimer_hal_context_t *)arg;
#ifdef CONFIG_PM_TRACE
@@ -144,6 +146,7 @@ IRAM_ATTR void SysTickIsrHandler(void *arg)
#ifdef CONFIG_PM_TRACE
ESP_PM_TRACE_EXIT(TICK, cpuid);
#endif
+#endif
}
#endif // CONFIG_FREERTOS_SYSTICK_USES_CCOUNT
diff --git a/components/riscv/vectors.S b/components/riscv/vectors.S
index 1006d5bea5..91bb4aa39e 100644
index 1006d5bea5..963494fcb3 100644
--- a/components/riscv/vectors.S
+++ b/components/riscv/vectors.S
@@ -17,6 +17,9 @@
@ -143,12 +120,13 @@ index 1006d5bea5..91bb4aa39e 100644
.equ SAVE_REGS, 32
.equ CONTEXT_SIZE, (SAVE_REGS * 4)
@@ -218,25 +221,25 @@ _call_panic_handler:
@@ -218,25 +221,27 @@ _call_panic_handler:
*/
.global _interrupt_handler
.type _interrupt_handler, @function
-_interrupt_handler:
+_interrupt_handler1:
+#ifndef CONFIG_IDF_RTOS_RTTHREAD
+
_interrupt_handler:
/* entry */
- save_regs
- save_mepc
@ -179,31 +157,18 @@ index 1006d5bea5..91bb4aa39e 100644
li t2, 0x7fffffff
and t1, s1, t2 /* t1 = mcause & mask */
slli t1, t1, 2 /* t1 = mcause * 4 */
@@ -247,56 +250,219 @@ _interrupt_handler:
@@ -247,8 +252,8 @@ _interrupt_handler:
sw t2, 0(t0) /* INTERRUPT_CORE0_CPU_INT_THRESH_REG = t2 */
fence
- li t0, 0x8
- csrrs t0, mstatus, t0
-
- #ifdef CONFIG_PM_TRACE
- li a0, 0 /* = ESP_PM_TRACE_IDLE */
- #if SOC_CPU_CORES_NUM == 1
- li a1, 0 /* No need to check core ID on single core hardware */
- #else
- csrr a1, mhartid
- #endif
- la t0, esp_pm_trace_exit
- jalr t0 /* absolute jump, avoid the 1 MiB range constraint */
- #endif
+ li t0, 0x8 /* t0 = 8 */
+ csrrs t0, mstatus, t0 /*设置状态MIE寄存器，开总中断*/
- #ifdef CONFIG_PM_ENABLE
- la t0, esp_pm_impl_isr_hook
- jalr t0 /* absolute jump, avoid the 1 MiB range constraint */
- #endif
#ifdef CONFIG_PM_TRACE
li a0, 0 /* = ESP_PM_TRACE_IDLE */
@@ -269,34 +274,211 @@ _interrupt_handler:
/* call the C dispatcher */
mv a0, sp /* argument 1, stack pointer */
mv a1, s1 /* argument 2, interrupt number (mcause) */
@ -248,10 +213,8 @@ index 1006d5bea5..91bb4aa39e 100644
/* exit, this will also re-enable the interrupts */
mret
+ .size _interrupt_handler1, .-_interrupt_handler1
+
+
+
.size _interrupt_handler, .-_interrupt_handler
+#else
+_interrupt_handler:
+ /* 此时CPU的sp = from_thread->sp */
+ /* 注意： 在这里，并没有将mepc的值赋值为from_thread栈中的epc，但后面会赋值 */
@ -423,7 +386,8 @@ index 1006d5bea5..91bb4aa39e 100644
+
+ addi sp, sp, 32 * REGBYTES
+ mret
.size _interrupt_handler, .-_interrupt_handler
+ .size _interrupt_handler, .-_interrupt_handler
+#endif
--
2.35.1.windows.2

20
bsp/ESP32_C3/README.md
View File

@ -14,7 +14,7 @@
## 开发板介绍
目前测试了两款开发板，运行都正常，由于两款开发板LED小灯引脚不同，请根据自己开发板修改GPIO引脚，目前默认使用的开发板是LUATOS_ESP32C3。已测开发板外观如下图所示：
目前测试了两款开发板，运行都正常，由于两款开发板LED小灯引脚不同，请根据自己开发板修改GPIO引脚，目前默认使用的开发板是LUATOS_ESP32C3 `GPIO 12` (HX 开发板引脚是`GPIO 8`)。已测开发板外观如下图所示：
- [LUATOS_ESP32C3](https://wiki.luatos.com/chips/esp32c3/board.html)
@ -31,7 +31,7 @@
- MCU：[esp32-c3](https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf)，主频 160MHz， 407.22 CoreMark; 2.55 CoreMark/MHz
- 芯片内置：384KB ROM, 400KB SRAM,
- 常用外设
- 红色LED：2个，D4 (IO12), D5（IO13）
- 红色LED：2个，LED: D4 (IO12), D5（IO13）
- 按键：2个，K1（BOOT） K2(RST)
- SPI FLASH: 2M
- 常用接口：USB UART等
@ -44,8 +44,8 @@
| **片上外设** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- |
| GPIO | 待支持 | |
| UART | 待支持 | |
| GPIO | 支持 | |
| UART | 支持中 | |
## 使用说明
@ -57,10 +57,20 @@ IDF的搭建方法有很多种，尝试了很多种方法之后，总结了一
### IDF patch加载
由于IDF使用的是FREERTOS需要修改一些文件，将`0001-add-fixed-of-rtthread.patch` 这个文件拷贝到安装的时候的IDF的代码目录，执行命令 `git apply 0001-add-fixed-of-rtthread.patch` 打上patch
由于IDF使用的是FREERTOS需要修改一些文件，将`0001-add-the-config-of-RTTHREAD.patch` 这个文件拷贝到安装的时候的IDF的代码目录，执行命令 下面的命令可以打上patch
```
cd esp/esp-idf
git checkout v4.4
git am 0001-add-the-config-of-RTTHREAD.patch
```
如果不想用patch文件，我已经将代码上传到github上面，可以进入[supperthomas/esp-idf](https://github.com/supperthomas/esp-idf) 下载最新的master分支。修改之后的IDF，原来的IDF的example还是正常使用，互不干扰。
#### 编译下载
用VSCODE 在bsp/ESP32_C3中右击打开
编译选择最下面的按钮：
![build](images/build.png)

25
bsp/ESP32_C3/main/CMakeLists.txt
View File

@ -1,4 +1,5 @@
idf_component_register(SRCS "main.c"
idf_component_register(SRCS "board.c" "main.c"
"drv_gpio.c"
"../../../libcpu/risc-v/common/cpuport.c"
"../../../libcpu/risc-v/common/context_gcc.S"
"../../../src/components.c"
@ -14,10 +15,30 @@ idf_component_register(SRCS "main.c"
"../../../src/idle.c"
"../../../src/timer.c"
"../../../src/kservice.c"
"../../../src/device.c"
"../../../components/drivers/misc/pin.c"
"../../../components/drivers/ipc/pipe.c"
"../../../components/drivers/ipc/ringblk_buf.c"
"../../../components/drivers/ipc/waitqueue.c"
"../../../components/drivers/ipc/completion.c"
"../../../components/drivers/ipc/dataqueue.c"
"../../../components/drivers/ipc/ringbuffer.c"
"../../../components/drivers/ipc/workqueue.c"
"../../../components/drivers/serial/serial.c"
INCLUDE_DIRS
"../../../components/drivers/include/drivers"
"../../../components/drivers/include"
"."
"../../../include"
"../../../libcpu/risc-v/common"
"../")
ADD_DEFINITIONS(
-D__RTTHREAD__
)
)
#TODO
#list(APPEND LINK_FLAGS "-u __rt_init_desc_rt_hw_pin_init")
#set(compile_options "-u __rt_init_desc_rt_hw_pin_init")

241
bsp/ESP32_C3/main/board.c Normal file
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@ -0,0 +1,241 @@
/*
* Copyright (c) 2021-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-06-02 supperthomas first version
*/
#include <stdio.h>
#include "esp_private/panic_internal.h"
#include "hal/uart_hal.h"
#include "driver/timer.h"
#include "soc/periph_defs.h"
#include "hal/systimer_hal.h"
#include "hal/systimer_ll.h"
#include "esp_intr_alloc.h"
#include "rtthread.h"
#include "rthw.h"
#include "drv_gpio.h"
#define rt_kprintf printf
#ifdef RT_USING_COMPONENTS_INIT
/*
* Components Initialization will initialize some driver and components as following
* order:
* rti_start --> 0
* BOARD_EXPORT --> 1
* rti_board_end --> 1.end
*
* DEVICE_EXPORT --> 2
* COMPONENT_EXPORT --> 3
* FS_EXPORT --> 4
* ENV_EXPORT --> 5
* APP_EXPORT --> 6
*
* rti_end --> 6.end
*
* These automatically initialization, the driver or component initial function must
* be defined with:
* INIT_BOARD_EXPORT(fn);
* INIT_DEVICE_EXPORT(fn);
* ...
* INIT_APP_EXPORT(fn);
* etc.
*/
static int rti_start(void)
{
return 0;
}
INIT_EXPORT(rti_start, "0");
static int rti_board_start(void)
{
return 0;
}
INIT_EXPORT(rti_board_start, "0.end");
static int rti_board_end(void)
{
return 0;
}
INIT_EXPORT(rti_board_end, "1.end");
static int rti_end(void)
{
return 0;
}
INIT_EXPORT(rti_end, "6.end");
/**
* @brief Onboard components initialization. In this function, the board-level
* initialization function will be called to complete the initialization
* of the on-board peripherals.
*/
void rt_components_board_init(void)
{
#if RT_DEBUG_INIT
int result;
const struct rt_init_desc *desc;
for (desc = &__rt_init_desc_rti_board_start; desc < &__rt_init_desc_rti_board_end; desc ++)
{
rt_kprintf("rt_components_board_init initialize %s", desc->fn_name);
result = desc->fn();
rt_kprintf(":%d done\n", result);
}
#else
volatile const init_fn_t *fn_ptr;
for (fn_ptr = &__rt_init_rti_board_start; fn_ptr < &__rt_init_rti_board_end; fn_ptr++)
{
(*fn_ptr)();
}
#endif /* RT_DEBUG_INIT */
}
/**
* @brief RT-Thread Components Initialization.
*/
void rt_components_init(void)
{
#if RT_DEBUG_INIT
int result;
const struct rt_init_desc *desc;
rt_kprintf("do components initialization.\n");
for (desc = &__rt_init_desc_rti_board_end; desc < &__rt_init_desc_rti_end; desc ++)
{
rt_kprintf("rt_components_init initialize %s", desc->fn_name);
result = desc->fn();
rt_kprintf(":%d done\n", result);
}
#else
volatile const init_fn_t *fn_ptr;
for (fn_ptr = &__rt_init_rti_board_end; fn_ptr < &__rt_init_rti_end; fn_ptr ++)
{
(*fn_ptr)();
}
#endif /* RT_DEBUG_INIT */
}
#endif /* RT_USING_COMPONENTS_INIT */
void main_thread_entry(void *parameter)
{
#ifdef RT_USING_COMPONENTS_INIT
/* RT-Thread components initialization */
rt_components_init();
#endif /* RT_USING_COMPONENTS_INIT */
extern int rtt_main();
rtt_main();
}
void rt_application_init(void)
{
rt_thread_t tid;
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
tid = rt_thread_create("main", main_thread_entry, RT_NULL,
RT_MAIN_THREAD_STACK_SIZE, RT_MAIN_THREAD_PRIORITY, 20);
RT_ASSERT(tid != RT_NULL);
rt_thread_startup(tid);
}
//component
static uint32_t uwTick = 0;
static systimer_hal_context_t systimer_hal;
IRAM_ATTR void rt_SysTickIsrHandler(void *arg)
{
systimer_ll_clear_alarm_int(systimer_hal.dev, 1);
rt_interrupt_enter();
rt_tick_increase();
uwTick++;
/* leave interrupt */
rt_interrupt_leave();
systimer_ll_is_alarm_int_fired(systimer_hal.dev, 1);
}
void rt_hw_systick_init(void)
{
uint8_t system_timer_counter=1;
//rt_hw_interrupt_enable(0);
esp_intr_alloc(ETS_SYSTIMER_TARGET1_EDGE_INTR_SOURCE, ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_LEVEL1, rt_SysTickIsrHandler, &systimer_hal, NULL);
systimer_hal_init(&systimer_hal);
systimer_ll_set_counter_value(systimer_hal.dev, system_timer_counter, 0);
systimer_ll_apply_counter_value(systimer_hal.dev, system_timer_counter);
uint32_t alarm_id = 1 ;
systimer_hal_connect_alarm_counter(&systimer_hal, alarm_id, system_timer_counter);
systimer_hal_set_alarm_period(&systimer_hal, alarm_id, 1000000UL / 1000);
systimer_hal_select_alarm_mode(&systimer_hal, alarm_id, SYSTIMER_ALARM_MODE_PERIOD);
systimer_hal_counter_can_stall_by_cpu(&systimer_hal, 1, 0, true);
systimer_hal_enable_alarm_int(&systimer_hal, alarm_id);
systimer_hal_enable_counter(&systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK);
}
void rt_hw_board_init(void)
{
rt_hw_systick_init();
#if defined(RT_USING_HEAP)
extern int __heap_start__;
extern int __heap_end__;
printf("%s:%d__heap_start__:%p,__heap_end__:%p\n",__func__,__LINE__,&__heap_start__,&__heap_end__);
rt_system_heap_init((void *)&__heap_start__, (void *)&__heap_end__);
#endif
/* Board underlying hardware initialization */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}
static void rtthread_startup(void)
{
rt_hw_interrupt_disable();
/* init board */
rt_hw_board_init();
/* show RT-Thread version */
rt_show_version();
/* timer system initialization */
rt_system_timer_init();
/* scheduler system initialization */
rt_system_scheduler_init();
/* create init_thread */
rt_application_init();
/* timer thread initialization */
rt_system_timer_thread_init();
/* idle thread initialization */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* init scheduler system */
rt_hw_pin_init();
/* never reach here */
return ;
}
void app_main(void)
{
/* startup RT-Thread RTOS */
rtthread_startup();
return;
}

27
bsp/ESP32_C3/main/board.h Normal file
View File

@ -0,0 +1,27 @@
/*
* Copyright (c) 2021-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-06-02 supperthomas first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <rtthread.h>
#include "drv_gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif

101
bsp/ESP32_C3/main/drv_gpio.c Normal file
View File

@ -0,0 +1,101 @@
/*
* Copyright (c) 2021-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-06-03 supperthomas first version
*
*/
#include "drv_gpio.h"
#include <stdio.h>
#ifdef RT_USING_PIN
#define DBG_LEVEL DBG_LOG
#define LOG_TAG "drv.gpio"
#include <rtdbg.h>
static void mcu_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
{
gpio_set_level(pin, value);
/*TODO:set gpio out put mode */
}
static int mcu_pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
value = gpio_get_level(pin);
return value;
}
static gpio_config_t init_io(gpio_num_t num)
{
gpio_config_t io_conf;
io_conf.intr_type = GPIO_INTR_DISABLE;
io_conf.mode = GPIO_MODE_OUTPUT;
io_conf.pin_bit_mask = (1ULL << num);
io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0;
return io_conf;
}
static void mcu_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
{
gpio_config_t io_conf;
io_conf.intr_type = GPIO_INTR_DISABLE;
io_conf.mode = GPIO_MODE_OUTPUT;
io_conf.pin_bit_mask = (1ULL << pin);
io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0;
gpio_config(&io_conf);
if (mode == PIN_MODE_OUTPUT)
{
gpio_set_direction(pin, GPIO_MODE_OUTPUT);
}
/*TODO:set gpio out put mode */
}
static rt_err_t mcu_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t irq_mode, void (*hdr)(void *args), void *args)
{
/*TODO: start irq handle */
return RT_EOK;
}
static rt_err_t mcu_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
{
/*TODO:disable gpio irq handle */
return RT_EOK;
}
static rt_err_t mcu_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
{
/*TODO:start irq handle */
return RT_EOK;
}
const static struct rt_pin_ops _mcu_pin_ops =
{
mcu_pin_mode,
mcu_pin_write,
mcu_pin_read,
mcu_pin_attach_irq,
mcu_pin_dettach_irq,
mcu_pin_irq_enable,
///NULL,
};
int rt_hw_pin_init(void)
{
/*TODO: INIT THE GPIO CLOCK AND OTHER */
return rt_device_pin_register("pin", &_mcu_pin_ops, RT_NULL);
}
INIT_BOARD_EXPORT(rt_hw_pin_init);
#endif /* RT_USING_PIN */

27
bsp/ESP32_C3/main/drv_gpio.h Normal file
View File

@ -0,0 +1,27 @@
/*
* Copyright (c) 2021-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-06-03 supperthomas first version
*
*/
#ifndef __DRV_GPIO_H__
#define __DRV_GPIO_H__
#include <rtthread.h>
#include <rthw.h>
#ifdef RT_USING_DEVICE
#include <rtdevice.h>
#endif
#include "driver/gpio.h"
int rt_hw_pin_init(void);
#endif /* __DRV_GPIO_H__ */

125
bsp/ESP32_C3/main/main.c
View File

@ -1,133 +1,28 @@
/*
* Copyright (c) 2021-2021, RT-Thread Development Team
* Copyright (c) 2021-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-04-24 supperthomas first version
* 2022-06-02 supperthomas fix version
*/
#include <stdio.h>
#include "driver/gpio.h"
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
#include "esp_private/panic_internal.h"
#include "hal/uart_hal.h"
#include "driver/timer.h"
#include "soc/periph_defs.h"
#include "hal/systimer_hal.h"
#include "hal/systimer_ll.h"
#include "esp_intr_alloc.h"
#include "rtthread.h"
#include "rthw.h"
void main_thread_entry(void *parameter)
int rtt_main(void)
{
#define BLINK_GPIO 12
gpio_reset_pin(BLINK_GPIO);
gpio_set_direction(BLINK_GPIO, GPIO_MODE_OUTPUT);
rt_pin_mode(BLINK_GPIO, PIN_MODE_OUTPUT);
while (1)
{
gpio_set_level(BLINK_GPIO, 1);
printf("Hello!RT-THREAD!\r\n");
rt_pin_write(BLINK_GPIO, PIN_HIGH);
rt_thread_mdelay(1000);
gpio_set_level(BLINK_GPIO, 0);
rt_pin_write(BLINK_GPIO, PIN_LOW);
rt_thread_mdelay(1000);
}
}
void rt_application_init(void)
{
rt_thread_t tid;
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
tid = rt_thread_create("main", main_thread_entry, RT_NULL,
RT_MAIN_THREAD_STACK_SIZE, RT_MAIN_THREAD_PRIORITY, 20);
RT_ASSERT(tid != RT_NULL);
rt_thread_startup(tid);
}
//component
static uint32_t uwTick = 0;
static systimer_hal_context_t systimer_hal;
IRAM_ATTR void rt_SysTickIsrHandler(void *arg)
{
systimer_ll_clear_alarm_int(systimer_hal.dev, 1);
rt_interrupt_enter();
rt_tick_increase();
uwTick++;
/* leave interrupt */
rt_interrupt_leave();
systimer_ll_is_alarm_int_fired(systimer_hal.dev, 1);
}
void rt_hw_systick_init(void)
{
uint8_t system_timer_counter=1;
//rt_hw_interrupt_enable(0);
esp_intr_alloc(ETS_SYSTIMER_TARGET1_EDGE_INTR_SOURCE, ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_LEVEL1, rt_SysTickIsrHandler, &systimer_hal, NULL);
systimer_hal_init(&systimer_hal);
systimer_ll_set_counter_value(systimer_hal.dev, system_timer_counter, 0);
systimer_ll_apply_counter_value(systimer_hal.dev, system_timer_counter);
uint32_t alarm_id = 1 ;
systimer_hal_connect_alarm_counter(&systimer_hal, alarm_id, system_timer_counter);
systimer_hal_set_alarm_period(&systimer_hal, alarm_id, 1000000UL / 1000);
systimer_hal_select_alarm_mode(&systimer_hal, alarm_id, SYSTIMER_ALARM_MODE_PERIOD);
systimer_hal_counter_can_stall_by_cpu(&systimer_hal, 1, 0, true);
systimer_hal_enable_alarm_int(&systimer_hal, alarm_id);
systimer_hal_enable_counter(&systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK);
}
void rt_hw_board_init(void)
{
rt_hw_systick_init();
extern int __heap_start__;
extern int __heap_end__;
printf("%s:%d__heap_start__:%p,__heap_end__:%p\n",__func__,__LINE__,&__heap_start__,&__heap_end__);
rt_system_heap_init((void *)&__heap_start__, (void *)&__heap_end__);
}
static void rtthread_startup(void)
{
rt_hw_interrupt_disable();
/* init board */
rt_hw_board_init();
/* show RT-Thread version */
rt_show_version();
/* timer system initialization */
rt_system_timer_init();
/* scheduler system initialization */
rt_system_scheduler_init();
/* create init_thread */
rt_application_init();
/* timer thread initialization */
rt_system_timer_thread_init();
/* idle thread initialization */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* init scheduler system */
/* never reach here */
return ;
}
void app_main(void)
{
/* startup RT-Thread RTOS */
rtthread_startup();
return;
}

14
bsp/ESP32_C3/rtconfig.h
View File

@ -148,4 +148,18 @@
/* entertainment: terminal games and other interesting software packages */
#define RT_USING_DEVICE
#define RT_USING_PIN
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_COMPONENTS_INIT
#define RT_DEBUG_INIT 1
#define RT_USING_SERIAL
#define BSP_USING_UART1
#endif

1
bsp/ESP32_C3/sdkconfig
View File

@ -6,6 +6,7 @@ CONFIG_IDF_CMAKE=y
CONFIG_IDF_TARGET_ARCH_RISCV=y
CONFIG_IDF_TARGET="esp32c3"
CONFIG_IDF_TARGET_ESP32C3=y
CONFIG_IDF_RTOS_RTTHREAD=y
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0005
#