diff --git a/libcpu/arm/cortex-m33/context_gcc.S b/libcpu/arm/cortex-m33/context_gcc.S
index 27596bf787..3c4ac8a236 100644
--- a/libcpu/arm/cortex-m33/context_gcc.S
+++ b/libcpu/arm/cortex-m33/context_gcc.S
@@ -143,6 +143,7 @@ contex_ns_store:
 
 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
     TST     lr, #0x10                               /* if(!EXC_RETURN[4]) */
+    IT      EQ
     VSTMDBEQ  r1!, {d8 - d15}                       /* push FPU register s16~s31 */
 #endif
 
@@ -187,6 +188,7 @@ contex_ns_load:
 
 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
     TST     lr, #0x10                               /* if(!EXC_RETURN[4]) */
+    IT      EQ
     VLDMIAEQ  r1!, {d8 - d15}                       /* pop FPU register s16~s31 */
 #endif
 
diff --git a/libcpu/arm/cortex-m4/context_gcc.S b/libcpu/arm/cortex-m4/context_gcc.S
index f569a35863..0c69b4d4dd 100644
--- a/libcpu/arm/cortex-m4/context_gcc.S
+++ b/libcpu/arm/cortex-m4/context_gcc.S
@@ -107,6 +107,7 @@ PendSV_Handler:
     
 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
     TST     lr, #0x10           /* if(!EXC_RETURN[4]) */
+    IT      EQ
     VSTMDBEQ r1!, {d8 - d15}    /* push FPU register s16~s31 */
 #endif
     
@@ -116,6 +117,7 @@ PendSV_Handler:
     MOV     r4, #0x00           /* flag = 0 */
 
     TST     lr, #0x10           /* if(!EXC_RETURN[4]) */
+    IT      EQ
     MOVEQ   r4, #0x01           /* flag = 1 */
 
     STMFD   r1!, {r4}           /* push flag */
@@ -137,6 +139,7 @@ switch_to_thread:
 
 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
     CMP     r3,  #0             /* if(flag_r3 != 0) */
+    IT      NE
     VLDMIANE  r1!, {d8 - d15}   /* pop FPU register s16~s31 */
 #endif
 
@@ -145,6 +148,7 @@ switch_to_thread:
 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
     ORR     lr, lr, #0x10       /* lr |=  (1 << 4), clean FPCA. */
     CMP     r3,  #0             /* if(flag_r3 != 0) */
+    IT      NE
     BICNE   lr, lr, #0x10       /* lr &= ~(1 << 4), set FPCA. */
 #endif
 
diff --git a/libcpu/arm/cortex-m7/context_gcc.S b/libcpu/arm/cortex-m7/context_gcc.S
index f569a35863..0c69b4d4dd 100644
--- a/libcpu/arm/cortex-m7/context_gcc.S
+++ b/libcpu/arm/cortex-m7/context_gcc.S
@@ -107,6 +107,7 @@ PendSV_Handler:
     
 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
     TST     lr, #0x10           /* if(!EXC_RETURN[4]) */
+    IT      EQ
     VSTMDBEQ r1!, {d8 - d15}    /* push FPU register s16~s31 */
 #endif
     
@@ -116,6 +117,7 @@ PendSV_Handler:
     MOV     r4, #0x00           /* flag = 0 */
 
     TST     lr, #0x10           /* if(!EXC_RETURN[4]) */
+    IT      EQ
     MOVEQ   r4, #0x01           /* flag = 1 */
 
     STMFD   r1!, {r4}           /* push flag */
@@ -137,6 +139,7 @@ switch_to_thread:
 
 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
     CMP     r3,  #0             /* if(flag_r3 != 0) */
+    IT      NE
     VLDMIANE  r1!, {d8 - d15}   /* pop FPU register s16~s31 */
 #endif
 
@@ -145,6 +148,7 @@ switch_to_thread:
 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
     ORR     lr, lr, #0x10       /* lr |=  (1 << 4), clean FPCA. */
     CMP     r3,  #0             /* if(flag_r3 != 0) */
+    IT      NE
     BICNE   lr, lr, #0x10       /* lr &= ~(1 << 4), set FPCA. */
 #endif