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[bsp][mm32l07x][rsoc] Fix compilation issues with bsp of mm32l07x

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hydevcode 2024-09-30 00:33:10 +08:00 committed by GitHub
parent d0cf64631a
commit 4203bfeb1d
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GPG Key ID: B5690EEEBB952194
4 changed files with 534 additions and 461 deletions
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1
.github/workflows/bsp_buildings.yml vendored
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@ -93,6 +93,7 @@ jobs:
- "hc32l196" - "hc32l196"
- "mm32/mm32f3270-100ask-pitaya" - "mm32/mm32f3270-100ask-pitaya"
- "mm32f327x" - "mm32f327x"
- "mm32l07x"
- "sam7x" - "sam7x"
- "hk32/hk32f030c8-mini" - "hk32/hk32f030c8-mini"
- "acm32/acm32f0x0-nucleo" - "acm32/acm32f0x0-nucleo"

2
.github/workflows/manual_trigger_scons_except_STM32_all.yml vendored
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@ -185,7 +185,7 @@ jobs:
- {RTT_BSP_NAME: "mm32_mm32f3270-100ask-pitaya", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32/mm32f3270-100ask-pitaya"} - {RTT_BSP_NAME: "mm32_mm32f3270-100ask-pitaya", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32/mm32f3270-100ask-pitaya"}
- {RTT_BSP_NAME: "mm32f103x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32f103x"} - {RTT_BSP_NAME: "mm32f103x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32f103x"}
#- {RTT_BSP_NAME: "mm32f327x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32f327x"} #编译问题 #- {RTT_BSP_NAME: "mm32f327x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32f327x"} #编译问题
#- {RTT_BSP_NAME: "mm32l07x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32l07x"} #编译问题 - {RTT_BSP_NAME: "mm32l07x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32l07x"}
- {RTT_BSP_NAME: "mm32l3xx", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32l3xx"} - {RTT_BSP_NAME: "mm32l3xx", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32l3xx"}
- {RTT_BSP_NAME: "n32_n32g43xcl-stb", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "n32/n32g43xcl-stb"} - {RTT_BSP_NAME: "n32_n32g43xcl-stb", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "n32/n32g43xcl-stb"}
- {RTT_BSP_NAME: "n32_n32g457qel-stb", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "n32/n32g457qel-stb"} - {RTT_BSP_NAME: "n32_n32g457qel-stb", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "n32/n32g457qel-stb"}

344
bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/HAL_i2c.c
View File

@ -16,7 +16,7 @@
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* *
* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2> * <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
*/ */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "HAL_i2c.h" #include "HAL_i2c.h"
@ -27,10 +27,10 @@
* @{ * @{
*/ */
/** @defgroup I2C /** @defgroup I2C
* @brief I2C driver modules * @brief I2C driver modules
* @{ * @{
*/ */
/** @defgroup I2C_Private_TypesDefinitions /** @defgroup I2C_Private_TypesDefinitions
* @{ * @{
@ -44,13 +44,13 @@
* @{ * @{
*/ */
/*I2c Enable disable*/ /* I2c Enable disable */
#define IC_ENABLE_Reset ((uint16_t)0xFFFE) #define IC_ENABLE_Reset ((uint16_t)0xFFFE)
#define IC_ENABLE_Set ((uint16_t)0x0001) #define IC_ENABLE_Set ((uint16_t)0x0001)
#define IC_CON_RESET ((uint16_t)0xFE8A) #define IC_CON_RESET ((uint16_t)0xFE8A)
#define INTR_MASK ((uint16_t)0xC000) #define INTR_MASK ((uint16_t)0xC000)
/*I2c DMA reset*/ /* I2c DMA reset */
#define DMA_CR_TDMAE_RDMAE_Reset ((uint16_t)0xFFFC) #define DMA_CR_TDMAE_RDMAE_Reset ((uint16_t)0xFFFC)
/* I2C START mask */ /* I2C START mask */
@ -68,7 +68,7 @@
#define IC_TAR_ENDUAL_Set ((uint16_t)0x1000) #define IC_TAR_ENDUAL_Set ((uint16_t)0x1000)
#define IC_TAR_ENDUAL_Reset ((uint16_t)0xEFFF) #define IC_TAR_ENDUAL_Reset ((uint16_t)0xEFFF)
/* I2C SPECIAL、GC_OR_START bits mask */ /* I2C SPECIAL GC_OR_START bits mask */
#define IC_TAR_GC_Set ((uint16_t)0x0800) #define IC_TAR_GC_Set ((uint16_t)0x0800)
#define IC_TAR_GC_Reset ((uint16_t)0xF7FF) #define IC_TAR_GC_Reset ((uint16_t)0xF7FF)
@ -78,10 +78,9 @@
static uint8_t I2C_CMD_DIR = 0; static uint8_t I2C_CMD_DIR = 0;
/*新增加的用户变量，外部调用时需要更新该变量值*/ uint16_t I2C_DMA_DIR = 0;
uint16_t I2C_DMA_DIR = 0;
/** /**
* @} * @}
*/ */
@ -131,14 +130,14 @@ void I2C_DeInit(I2C_TypeDef* I2Cx)
/* Release I2C1 from reset state */ /* Release I2C1 from reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
break; break;
default: default:
break; break;
} }
} }
/** /**
* @brief Initializes the I2Cx peripheral according to the specified * @brief Initializes the I2Cx peripheral according to the specified
* parameters in the I2C_InitStruct. * parameters in the I2C_InitStruct.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
@ -148,10 +147,10 @@ void I2C_DeInit(I2C_TypeDef* I2Cx)
*/ */
void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
{ {
uint16_t tmpreg = 0; uint16_t tmpreg = 0;
uint32_t pclk1 = 8000000; uint32_t pclk1 = 8000000;
//uint32_t minSclLowTime = 0; /* uint32_t minSclLowTime = 0; */
uint32_t i2cPeriod = 0; uint32_t i2cPeriod = 0;
uint32_t pclk1Period = 0; uint32_t pclk1Period = 0;
RCC_ClocksTypeDef rcc_clocks; RCC_ClocksTypeDef rcc_clocks;
@ -162,45 +161,45 @@ void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
/*---------------------------- I2Cx IC_ENABLE Configuration ------------------------*/ /*---------------------------- I2Cx IC_ENABLE Configuration ------------------------*/
/* Disable the selected I2C peripheral */ /* Disable the selected I2C peripheral */
I2Cx->IC_ENABLE &= IC_ENABLE_Reset; I2Cx->IC_ENABLE &= IC_ENABLE_Reset;
/* Get pclk1 frequency value */ /* Get pclk1 frequency value */
RCC_GetClocksFreq(&rcc_clocks); RCC_GetClocksFreq(&rcc_clocks);
pclk1 = rcc_clocks.PCLK1_Frequency; pclk1 = rcc_clocks.PCLK1_Frequency;
/* Set pclk1 period value */ /* Set pclk1 period value */
pclk1Period = 1000000000/pclk1; pclk1Period = 1000000000/pclk1;
i2cPeriod = 1000000000/I2C_InitStruct->I2C_ClockSpeed; //ns unit i2cPeriod = 1000000000/I2C_InitStruct->I2C_ClockSpeed; /*ns unit*/
tmpreg = 0; tmpreg = 0;
/* Configure speed in standard mode */ /* Configure speed in standard mode */
if (I2C_InitStruct->I2C_ClockSpeed <= 100000) if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
{ {
tmpreg = (i2cPeriod/pclk1Period)/2; tmpreg = (i2cPeriod/pclk1Period)/2;
I2Cx->IC_SS_SCL_LCNT = tmpreg; I2Cx->IC_SS_SCL_LCNT = tmpreg;
tmpreg = (i2cPeriod - pclk1Period*I2Cx->IC_SS_SCL_LCNT)/pclk1Period; tmpreg = (i2cPeriod - pclk1Period*I2Cx->IC_SS_SCL_LCNT)/pclk1Period;
/* Write to I2Cx IC_SS_SCL_HCNT */ /* Write to I2Cx IC_SS_SCL_HCNT */
I2Cx->IC_SS_SCL_HCNT = tmpreg; I2Cx->IC_SS_SCL_HCNT = tmpreg;
} }
else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/ else /* (I2C_InitStruct->I2C_ClockSpeed <= 400000) */
{ {
tmpreg = (i2cPeriod/pclk1Period)/2; tmpreg = (i2cPeriod/pclk1Period)/2;
I2Cx->IC_FS_SCL_LCNT = tmpreg; I2Cx->IC_FS_SCL_LCNT = tmpreg;
tmpreg = (i2cPeriod - pclk1Period*I2Cx->IC_FS_SCL_LCNT)/pclk1Period; tmpreg = (i2cPeriod - pclk1Period*I2Cx->IC_FS_SCL_LCNT)/pclk1Period;
/* Write to I2Cx IC_FS_SCL_HCNT */ /* Write to I2Cx IC_FS_SCL_HCNT */
I2Cx->IC_FS_SCL_HCNT = tmpreg; I2Cx->IC_FS_SCL_HCNT = tmpreg;
} }
/*Get the I2Cx IC_CON value */ /* Get the I2Cx IC_CON value */
tmpreg = I2Cx->IC_CON; tmpreg = I2Cx->IC_CON;
/*Clear TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits*/ /* Clear TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits */
tmpreg &= IC_CON_RESET; tmpreg &= IC_CON_RESET;
/*Set TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits*/ /* Set TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits */
tmpreg = TX_EMPTY_CTRL | IC_SLAVE_DISABLE | IC_RESTART_EN |IC_7BITADDR_MASTER | I2C_InitStruct->I2C_Speed | I2C_InitStruct->I2C_Mode; tmpreg = TX_EMPTY_CTRL | IC_SLAVE_DISABLE | IC_RESTART_EN |IC_7BITADDR_MASTER | I2C_InitStruct->I2C_Speed | I2C_InitStruct->I2C_Mode;
/* Write to I2Cx IC_CON */ /* Write to I2Cx IC_CON */
I2Cx->IC_CON = tmpreg; I2Cx->IC_CON = tmpreg;
/*---------------------------- I2Cx IC_INTR_MASK Configuration ------------------------*/ /*---------------------------- I2Cx IC_INTR_MASK Configuration ------------------------*/
/* Get the I2Cx IC_INTR_MASK value */ /* Get the I2Cx IC_INTR_MASK value */
tmpreg = I2Cx->IC_INTR_MASK; tmpreg = I2Cx->IC_INTR_MASK;
@ -208,12 +207,12 @@ void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
tmpreg &= INTR_MASK; tmpreg &= INTR_MASK;
/* Write to IC_INTR_MASK */ /* Write to IC_INTR_MASK */
I2Cx->IC_INTR_MASK = tmpreg; I2Cx->IC_INTR_MASK = tmpreg;
/* Write to IC_RX_TL */ /* Write to IC_RX_TL */
I2Cx->IC_RX_TL = 0x0; //rxfifo depth is 1 I2Cx->IC_RX_TL = 0x0; /* rxfifo depth is 1 */
/* Write to IC_TX_TL */ /* Write to IC_TX_TL */
I2Cx->IC_TX_TL = 0x1; //tcfifo depth is 1 I2Cx->IC_TX_TL = 0x1; /* tcfifo depth is 1 */
} }
/** /**
@ -262,10 +261,10 @@ void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
/** /**
* @brief Enables or disables the specified I2C DMA requests. * @brief Enables or disables the specified I2C DMA requests.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param DMA_Direcction : TDMAE_SET,RDMAE_SET * @param DMA_Direcction : TDMAE_SET,RDMAE_SET
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg TDMAE_SET :DMA TX set * @arg TDMAE_SET :DMA TX set
* @arg RDMAE_SET :DMA RX set * @arg RDMAE_SET :DMA RX set
* @param NewState: new state of the I2C DMA transfer. * @param NewState: new state of the I2C DMA transfer.
* This parameter can be: ENABLE or DISABLE. * This parameter can be: ENABLE or DISABLE.
* @retval : None * @retval : None
@ -344,7 +343,7 @@ void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @retval : None. * @retval : None.
*/ */
void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address) void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address)
//void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address) /* void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address) */
{ {
uint16_t tmpreg = 0; uint16_t tmpreg = 0;
/* Check the parameters */ /* Check the parameters */
@ -411,20 +410,20 @@ void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
* @brief Enables or disables the specified I2C interrupts. * @brief Enables or disables the specified I2C interrupts.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_IT: specifies the I2C interrupts sources to be enabled * @param I2C_IT: specifies the I2C interrupts sources to be enabled
* or disabled. * or disabled.
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt mask * @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt mask
* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt mask * @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt mask
* @arg I2C_IT_RX_FULL : Rx buffer full interrupt mask * @arg I2C_IT_RX_FULL : Rx buffer full interrupt mask
* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt mask * @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt mask
* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt mask * @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt mask
* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt mask * @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt mask
* @arg I2C_IT_TX_ABRT : TX error interrupt mask(Master mode) * @arg I2C_IT_TX_ABRT : TX error interrupt mask(Master mode)
* @arg I2C_IT_RX_DONE : Master not ack interrupt mask(slave mode) * @arg I2C_IT_RX_DONE : Master not ack interrupt mask(slave mode)
* @arg I2C_IT_ACTIVITY : I2C activity interrupt mask * @arg I2C_IT_ACTIVITY : I2C activity interrupt mask
* @arg I2C_IT_STOP_DET : stop condition interrupt mask * @arg I2C_IT_STOP_DET : stop condition interrupt mask
* @arg I2C_IT_START_DET : start condition interrupt mask * @arg I2C_IT_START_DET : start condition interrupt mask
* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt mask * @arg I2C_IT_GEN_CALL : a general call address and ack interrupt mask
* @param NewState: new state of the specified I2C interrupts. * @param NewState: new state of the specified I2C interrupts.
* This parameter can be: ENABLE or DISABLE. * This parameter can be: ENABLE or DISABLE.
* @retval : None * @retval : None
@ -435,12 +434,12 @@ void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState)
assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_FUNCTIONAL_STATE(NewState)); assert_param(IS_FUNCTIONAL_STATE(NewState));
assert_param(IS_I2C_CONFIG_IT(I2C_IT)); assert_param(IS_I2C_CONFIG_IT(I2C_IT));
if(I2C_IT == I2C_IT_RX_FULL) if(I2C_IT == I2C_IT_RX_FULL)
{ {
I2Cx->IC_DATA_CMD = CMD_READ; I2Cx->IC_DATA_CMD = CMD_READ;
} }
if (NewState != DISABLE) if (NewState != DISABLE)
{ {
/* Enable the selected I2C interrupts */ /* Enable the selected I2C interrupts */
@ -505,7 +504,7 @@ void I2C_ReadCmd(I2C_TypeDef* I2Cx)
{ {
/* Check the parameters */ /* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_ALL_PERIPH(I2Cx));
I2Cx->IC_DATA_CMD = CMD_READ; I2Cx->IC_DATA_CMD = CMD_READ;
} }
@ -528,7 +527,7 @@ uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param Address: specifies the slave address which will be transmitted * @param Address: specifies the slave address which will be transmitted
* @param I2C_Direction: specifies whether the I2C device will be a * @param I2C_Direction: specifies whether the I2C device will be a
* Transmitter or a Receiver. * Transmitter or a Receiver.
* This parameter can be one of the following values * This parameter can be one of the following values
* @arg I2C_Direction_Transmitter: Transmitter mode * @arg I2C_Direction_Transmitter: Transmitter mode
* @arg I2C_Direction_Receiver: Receiver mode * @arg I2C_Direction_Receiver: Receiver mode
@ -568,7 +567,7 @@ uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx)
assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_ALL_PERIPH(I2Cx));
/* Read the I2Cx status register */ /* Read the I2Cx status register */
flag1 = I2Cx->IC_RAW_INTR_STAT; flag1 = I2Cx->IC_RAW_INTR_STAT;
/* Get the last event value from I2C status register */ /* Get the last event value from I2C status register */
lastevent = (flag1 ) & FLAG_Mask; lastevent = (flag1 ) & FLAG_Mask;
/* Return status */ /* Return status */
@ -581,20 +580,20 @@ uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx)
* @brief Checks whether the last I2Cx Event is equal to the one passed * @brief Checks whether the last I2Cx Event is equal to the one passed
* as parameter. * as parameter.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_EVENT: specifies the event to be checked. * @param I2C_EVENT: specifies the event to be checked.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg I2C_EVENT_RX_UNDER: Rx Buffer is empty event * @arg I2C_EVENT_RX_UNDER: Rx Buffer is empty event
* @arg I2C_EVENT_RX_OVER : RX Buffer Overrun event * @arg I2C_EVENT_RX_OVER : RX Buffer Overrun event
* @arg I2C_EVENTT_RX_FULL : Rx buffer full event * @arg I2C_EVENTT_RX_FULL : Rx buffer full event
* @arg I2C_EVENT_TX_OVER : TX Buffer Overrun event * @arg I2C_EVENT_TX_OVER : TX Buffer Overrun event
* @arg I2C_EVENT_TX_EMPTY : TX_FIFO empty event * @arg I2C_EVENT_TX_EMPTY : TX_FIFO empty event
* @arg I2C_EVENT_RD_REQ : I2C work as slave or master event * @arg I2C_EVENT_RD_REQ : I2C work as slave or master event
* @arg I2C_EVENT_TX_ABRT : TX error event(Master mode) * @arg I2C_EVENT_TX_ABRT : TX error event(Master mode)
* @arg I2C_EVENT_RX_DONE : Master not ack event(slave mode) * @arg I2C_EVENT_RX_DONE : Master not ack event(slave mode)
* @arg I2C_EVENT_ACTIVITY : I2C activity event * @arg I2C_EVENT_ACTIVITY : I2C activity event
* @arg I2C_EVENT_STOP_DET : stop condition event * @arg I2C_EVENT_STOP_DET : stop condition event
* @arg I2C_EVENT_START_DET : start condition event * @arg I2C_EVENT_START_DET : start condition event
* @arg I2C_EVENT_GEN_CALL : a general call address and ack event * @arg I2C_EVENT_GEN_CALL : a general call address and ack event
* - SUCCESS: Last event is equal to the I2C_EVENT * - SUCCESS: Last event is equal to the I2C_EVENT
* - ERROR: Last event is different from the I2C_EVENT * - ERROR: Last event is different from the I2C_EVENT
*/ */
@ -606,7 +605,7 @@ ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
/* Check the parameters */ /* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_EVENT(I2C_EVENT)); assert_param(IS_I2C_EVENT(I2C_EVENT));
if((I2C_EVENT == I2C_EVENT_RX_FULL)&&(I2C_CMD_DIR==0)) if((I2C_EVENT == I2C_EVENT_RX_FULL)&&(I2C_CMD_DIR==0))
{ {
I2Cx->IC_DATA_CMD = CMD_READ; I2Cx->IC_DATA_CMD = CMD_READ;
@ -614,13 +613,13 @@ ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
} }
/* Read the I2Cx status register */ /* Read the I2Cx status register */
flag1 = I2Cx->IC_RAW_INTR_STAT; flag1 = I2Cx->IC_RAW_INTR_STAT;
//flag1 = I2Cx->IC_INTR_STAT; /* flag1 = I2Cx->IC_INTR_STAT; */
/* Get the last event value from I2C status register */ /* Get the last event value from I2C status register */
lastevent = (flag1 ) & I2C_EVENT; lastevent = (flag1 ) & I2C_EVENT;
/* Check whether the last event is equal to I2C_EVENT */ /* Check whether the last event is equal to I2C_EVENT */
if (lastevent == I2C_EVENT ) if (lastevent == I2C_EVENT )
//if((I2Cx->IC_RAW_INTR_STAT & I2C_EVENT) != (uint32_t)RESET) /* if((I2Cx->IC_RAW_INTR_STAT & I2C_EVENT) != (uint32_t)RESET) */
{ {
/* SUCCESS: last event is equal to I2C_EVENT */ /* SUCCESS: last event is equal to I2C_EVENT */
status = SUCCESS; status = SUCCESS;
@ -632,39 +631,42 @@ ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
} }
/* Return status */ /* Return status */
return status; return status;
} }
/** /**
* @brief Checks whether the specified I2C flag is set or not. * @brief Checks whether the specified I2C flag is set or not.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_FLAG: specifies the flag to check. * @param I2C_FLAG: specifies the flag to check.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag * @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag
* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag * @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag
* @arg I2C_FLAG_RX_FULL : Rx buffer full flag * @arg I2C_FLAG_RX_FULL : Rx buffer full flag
* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag * @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag
* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag * @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag
* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag * @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag
* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode) * @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode)
* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode) * @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode)
* @arg I2C_FLAG_ACTIVITY: I2C activity flag * @arg I2C_FLAG_ACTIVITY: I2C activity flag
* @arg I2C_FLAG_STOP_DET: stop condition flag * @arg I2C_FLAG_STOP_DET: stop condition flag
* @arg I2C_FLAG_START_DET: start condition flag * @arg I2C_FLAG_START_DET: start condition flag
* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag * @arg I2C_FLAG_GEN_CALL : a general call address and ack flag
* @arg I2C_STATUS_FLAG_ACTIVITY * @arg I2C_STATUS_FLAG_ACTIVITY
* @arg I2C_STATUS_FLAG_TFNF * @arg I2C_STATUS_FLAG_TFNF
* @arg I2C_STATUS_FLAG_TFE * @arg I2C_STATUS_FLAG_TFE
* @arg I2C_STATUS_FLAG_RFNE * @arg I2C_STATUS_FLAG_RFNE
* @arg I2C_STATUS_FLAG_RFF * @arg I2C_STATUS_FLAG_RFF
* @arg I2C_STATUS_FLAG_M_ACTIVITY * @arg I2C_STATUS_FLAG_M_ACTIVITY
* @arg I2C_STATUS_FLAG_S_ACTIVITY * @arg I2C_STATUS_FLAG_S_ACTIVITY
* @retval : The new state of I2C_FLAG (SET or RESET). * @retval : The new state of I2C_FLAG (SET or RESET).
*/ */
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
{ {
FlagStatus bitstatus = RESET; FlagStatus bitstatus = RESET;
__IO uint32_t i2creg = 0, i2cxbase = 0; __IO uint32_t i2creg = 0, i2cxbase = 0;
((void)i2creg);
((void)i2cxbase);
/* Check the parameters */ /* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_GET_FLAG(I2C_FLAG)); assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
@ -708,20 +710,20 @@ FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
/** /**
* @brief Clears the I2Cx's pending flags. * @brief Clears the I2Cx's pending flags.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_FLAG: specifies the flag to clear. * @param I2C_FLAG: specifies the flag to clear.
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag * @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag
* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag * @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag
* @arg I2C_FLAG_RX_FULL : Rx buffer full flag * @arg I2C_FLAG_RX_FULL : Rx buffer full flag
* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag * @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag
* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag * @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag
* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag * @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag
* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode) * @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode)
* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode) * @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode)
* @arg I2C_FLAG_ACTIVITY: I2C activity flag * @arg I2C_FLAG_ACTIVITY: I2C activity flag
* @arg I2C_FLAG_STOP_DET: stop condition flag * @arg I2C_FLAG_STOP_DET: stop condition flag
* @arg I2C_FLAG_START_DET: start condition flag * @arg I2C_FLAG_START_DET: start condition flag
* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag * @arg I2C_FLAG_GEN_CALL : a general call address and ack flag
* @retval : None * @retval : None
*/ */
void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
@ -730,35 +732,45 @@ void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG)); assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
if((I2C_FLAG & I2C_FLAG_RX_UNDER) == I2C_FLAG_RX_UNDER) {I2Cx->IC_CLR_RX_UNDER;} if((I2C_FLAG & I2C_FLAG_RX_UNDER) == I2C_FLAG_RX_UNDER)
if((I2C_FLAG & I2C_FLAG_RX_OVER) == I2C_FLAG_RX_OVER) {I2Cx->IC_CLR_RX_OVER;} {((void)I2Cx->IC_CLR_RX_UNDER);}
if((I2C_FLAG & I2C_FLAG_TX_OVER) == I2C_FLAG_TX_OVER) {I2Cx->IC_CLR_TX_OVER;} if((I2C_FLAG & I2C_FLAG_RX_OVER) == I2C_FLAG_RX_OVER)
if((I2C_FLAG & I2C_FLAG_RD_REQ) == I2C_FLAG_RD_REQ) {I2Cx->IC_CLR_RD_REQ;} {((void)I2Cx->IC_CLR_RX_OVER);}
if((I2C_FLAG & I2C_FLAG_TX_ABRT) == I2C_FLAG_TX_ABRT) {I2Cx->IC_CLR_TX_ABRT;} if((I2C_FLAG & I2C_FLAG_TX_OVER) == I2C_FLAG_TX_OVER)
if((I2C_FLAG & I2C_FLAG_RX_DONE) == I2C_FLAG_RX_DONE) {I2Cx->IC_CLR_RX_DONE;} {((void)I2Cx->IC_CLR_TX_OVER);}
if((I2C_FLAG & I2C_FLAG_ACTIVITY) == I2C_FLAG_ACTIVITY) {I2Cx->IC_CLR_ACTIVITY;} if((I2C_FLAG & I2C_FLAG_RD_REQ) == I2C_FLAG_RD_REQ)
if((I2C_FLAG & I2C_FLAG_STOP_DET) == I2C_FLAG_STOP_DET) {I2Cx->IC_CLR_STOP_DET;} {((void)I2Cx->IC_CLR_RD_REQ);}
if((I2C_FLAG & I2C_FLAG_START_DET) == I2C_FLAG_START_DET){I2Cx->IC_CLR_START_DET;} if((I2C_FLAG & I2C_FLAG_TX_ABRT) == I2C_FLAG_TX_ABRT)
if((I2C_FLAG & I2C_FLAG_GEN_CALL) == I2C_FLAG_GEN_CALL) {I2Cx->IC_CLR_GEN_CALL;} {((void)I2Cx->IC_CLR_TX_ABRT);}
if((I2C_FLAG & I2C_FLAG_RX_DONE) == I2C_FLAG_RX_DONE)
{((void)I2Cx->IC_CLR_RX_DONE);}
if((I2C_FLAG & I2C_FLAG_ACTIVITY) == I2C_FLAG_ACTIVITY)
{((void)I2Cx->IC_CLR_ACTIVITY);}
if((I2C_FLAG & I2C_FLAG_STOP_DET) == I2C_FLAG_STOP_DET)
{((void)I2Cx->IC_CLR_STOP_DET);}
if((I2C_FLAG & I2C_FLAG_START_DET) == I2C_FLAG_START_DET)
{((void)I2Cx->IC_CLR_START_DET);}
if((I2C_FLAG & I2C_FLAG_GEN_CALL) == I2C_FLAG_GEN_CALL)
{((void)I2Cx->IC_CLR_GEN_CALL);}
} }
/** /**
* @brief Checks whether the specified I2C interrupt has occurred or not. * @brief Checks whether the specified I2C interrupt has occurred or not.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_IT: specifies the interrupt source to check. * @param I2C_IT: specifies the interrupt source to check.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt * @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt
* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt * @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt
* @arg I2C_IT_RX_FULL : Rx buffer full interrupt * @arg I2C_IT_RX_FULL : Rx buffer full interrupt
* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt * @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt
* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt * @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt
* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt * @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt
* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode) * @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode)
* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode) * @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode)
* @arg I2C_IT_ACTIVITY : I2C activity interrupt * @arg I2C_IT_ACTIVITY : I2C activity interrupt
* @arg I2C_IT_STOP_DET : stop condition interrupt * @arg I2C_IT_STOP_DET : stop condition interrupt
* @arg I2C_IT_START_DET : start condition interrupt * @arg I2C_IT_START_DET : start condition interrupt
* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt * @arg I2C_IT_GEN_CALL : a general call address and ack interrupt
* @retval : The new state of I2C_IT (SET or RESET). * @retval : The new state of I2C_IT (SET or RESET).
*/ */
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
@ -767,7 +779,7 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
/* Check the parameters */ /* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_GET_IT(I2C_IT)); assert_param(IS_I2C_GET_IT(I2C_IT));
/* Check the status of the specified I2C flag */ /* Check the status of the specified I2C flag */
if((I2Cx->IC_RAW_INTR_STAT & I2C_IT) != (uint32_t)RESET) if((I2Cx->IC_RAW_INTR_STAT & I2C_IT) != (uint32_t)RESET)
{ {
@ -779,7 +791,7 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
/* I2C_IT is reset */ /* I2C_IT is reset */
bitstatus = RESET; bitstatus = RESET;
} }
/* Return the I2C_IT status */ /* Return the I2C_IT status */
return bitstatus; return bitstatus;
} }
@ -787,20 +799,20 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
/** /**
* @brief Clears the I2Cx interrupt pending bits. * @brief Clears the I2Cx interrupt pending bits.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_IT: specifies the interrupt pending bit to clear. * @param I2C_IT: specifies the interrupt pending bit to clear.
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt * @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt
* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt * @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt
* @arg I2C_IT_RX_FULL : Rx buffer full interrupt * @arg I2C_IT_RX_FULL : Rx buffer full interrupt
* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt * @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt
* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt * @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt
* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt * @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt
* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode) * @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode)
* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode) * @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode)
* @arg I2C_IT_ACTIVITY : I2C activity interrupt * @arg I2C_IT_ACTIVITY : I2C activity interrupt
* @arg I2C_IT_STOP_DET : stop condition interrupt * @arg I2C_IT_STOP_DET : stop condition interrupt
* @arg I2C_IT_START_DET : start condition interrupt * @arg I2C_IT_START_DET : start condition interrupt
* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt * @arg I2C_IT_GEN_CALL : a general call address and ack interrupt
* @retval : None * @retval : None
*/ */
void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
@ -808,32 +820,42 @@ void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
/* Check the parameters */ /* Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_CLEAR_IT(I2C_IT)); assert_param(IS_I2C_CLEAR_IT(I2C_IT));
/* Clear the selected I2C flag */ /* Clear the selected I2C flag */
if((I2C_IT & I2C_IT_RX_UNDER) == I2C_FLAG_RX_UNDER) {I2Cx->IC_CLR_RX_UNDER;} if((I2C_IT & I2C_IT_RX_UNDER) == I2C_FLAG_RX_UNDER)
if((I2C_IT & I2C_IT_RX_OVER) == I2C_FLAG_RX_OVER) {I2Cx->IC_CLR_RX_OVER;} {((void)I2Cx->IC_CLR_RX_UNDER);}
if((I2C_IT & I2C_IT_TX_OVER) == I2C_FLAG_TX_OVER) {I2Cx->IC_CLR_TX_OVER;} if((I2C_IT & I2C_IT_RX_OVER) == I2C_FLAG_RX_OVER)
if((I2C_IT & I2C_IT_RD_REQ) == I2C_FLAG_RD_REQ) {I2Cx->IC_CLR_RD_REQ;} {((void)I2Cx->IC_CLR_RX_OVER);}
if((I2C_IT & I2C_IT_TX_ABRT) == I2C_FLAG_TX_ABRT) {I2Cx->IC_CLR_TX_ABRT;} if((I2C_IT & I2C_IT_TX_OVER) == I2C_FLAG_TX_OVER)
if((I2C_IT & I2C_IT_RX_DONE) == I2C_FLAG_RX_DONE) {I2Cx->IC_CLR_RX_DONE;} {((void)I2Cx->IC_CLR_TX_OVER);}
if((I2C_IT & I2C_IT_ACTIVITY) == I2C_FLAG_ACTIVITY) {I2Cx->IC_CLR_ACTIVITY;} if((I2C_IT & I2C_IT_RD_REQ) == I2C_FLAG_RD_REQ)
if((I2C_IT & I2C_IT_STOP_DET) == I2C_FLAG_STOP_DET) {I2Cx->IC_CLR_STOP_DET;} {((void)I2Cx->IC_CLR_RD_REQ);}
if((I2C_IT & I2C_IT_START_DET) == I2C_FLAG_START_DET){I2Cx->IC_CLR_START_DET;} if((I2C_IT & I2C_IT_TX_ABRT) == I2C_FLAG_TX_ABRT)
if((I2C_IT & I2C_IT_GEN_CALL) == I2C_FLAG_GEN_CALL) {I2Cx->IC_CLR_GEN_CALL;} {((void)I2Cx->IC_CLR_TX_ABRT);}
if((I2C_IT & I2C_IT_RX_DONE) == I2C_FLAG_RX_DONE)
{((void)I2Cx->IC_CLR_RX_DONE);}
if((I2C_IT & I2C_IT_ACTIVITY) == I2C_FLAG_ACTIVITY)
{((void)I2Cx->IC_CLR_ACTIVITY);}
if((I2C_IT & I2C_IT_STOP_DET) == I2C_FLAG_STOP_DET)
{((void)I2Cx->IC_CLR_STOP_DET);}
if((I2C_IT & I2C_IT_START_DET) == I2C_FLAG_START_DET)
{((void)I2Cx->IC_CLR_START_DET);}
if((I2C_IT & I2C_IT_GEN_CALL) == I2C_FLAG_GEN_CALL)
{((void)I2Cx->IC_CLR_GEN_CALL);}
} }
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/ /*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/

648
bsp/mm32l07x/Libraries/MM32L0xx/Source/GCC_StartAsm/startup_MM32L0xx.s
View File

@ -1,305 +1,355 @@
;******************** (C) COPYRIGHT 2017 MindMotion ******************** /* ******************** (C) COPYRIGHT 2017 MindMotion ******************** */
;* File Name : startup_mm32L0xx.s /* File Name : startup_mm32L0xx.s */
;* Author : AE Team /* Author : AE Team */
;* Version : V2.0.0 /* Version : V2.0.0 */
;* Date : 22/08/2017 /* Date : 22/08/2017 */
;* Description : MM32L0xx Medium-density devices vector table for EWARM toolchain. /* Description : MM32L0xx Medium-density devices vector table for */
;* This module performs: /* GCC toolchain. */
;* - Set the initial SP /* This module performs: */
;* - Set the initial PC == __iar_program_start, /* - Set the initial SP */
;* - Set the vector table entries with the exceptions ISR /* - Set the initial PC == __iar_program_start, */
;* address /* - Set the vector table entries with the exceptions*/
;* - Configure the system clock /* ISR address */
;* - Branches to main in the C library (which eventually /* - Configure the system clock */
;* calls main()). /* - Branches to main in the C library (which */
;* After Reset the Cortex-M0 processor is in Thread mode, /* eventually calls main()). */
;* priority is Privileged, and the Stack is set to Main. /* After Reset the Cortex-M0 processor is in Thread */
;******************************************************************************* /* mode, priority is Privileged, and the Stack is set*/
; /* to Main. */
; /* ************************************************************************/
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup /* The vector table is normally located at address 0. When debugging in RAM, it can be located in RAM, aligned to at least 2^6. The name "__vector_table" has special meaning for C-SPY: it is where the SP start value is found, and the NVIC vector table register (VTOR) is initialized to this address if != 0. */
;; Forward declaration of sections. /* Cortex-M version */
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2) .syntax unified
.cpu cortex-m0
.fpu softvfp
.thumb
EXTERN __iar_program_start .global __vector_table
EXTERN SystemInit
PUBLIC __vector_table
DATA .word _sidata
__vector_table .word _sdata
DCD sfe(CSTACK) .word _edata
DCD Reset_Handler ; Reset Handler .word _sbss
DCD NMI_Handler ; NMI Handler .word _ebss
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts .section .text.Reset_Handler
DCD WWDG_IRQHandler ; Window Watchdog .weak Reset_Handler
DCD PVD_IRQHandler ; PVD through EXTI Line detect .type Reset_Handler, %function
DCD RTC_IRQHandler ; RTC through EXTI Line & Tamper Reset_Handler:
DCD FLASH_IRQHandler ; FLASH ldr r0, =_estack
DCD RCC_CRS_IRQHandler ; RCC & CRS msr msp, r0
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 /*Check if boot space corresponds to test memory*/
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 ldr r0, =0x00000004
DCD 0 ; Reserved ldr r1, [r0]
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 lsrs r1, r1, #24
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 ldr r2, =0x1F
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5 cmp r1, r2
DCD ADC_COMP_IRQHandler ; ADC1 & COMP bne ApplicationStart
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare /*SYSCFG clock enable*/
DCD TIM2_IRQHandler ; TIM2 ldr r0, =0x40021018
DCD TIM3_IRQHandler ; TIM3 ldr r1, =0x00000001
DCD 0 ; Reserved str r1, [r0]
DCD 0 ; Reserved
DCD TIM14_IRQHandler ; TIM14 /* Set CFGR1 register with flash memory remap at address 0 */
DCD 0 ; Reserved ldr r0, =0x40010000
DCD TIM16_IRQHandler ; TIM16 ldr r1, =0x00000000
DCD TIM17_IRQHandler ; TIM17 str r1, [r0]
DCD I2C1_IRQHandler ; I2C1 ApplicationStart:
DCD 0 ; Reserved /* Copy the data segment initializers from flash to SRAM */
DCD SPI1_IRQHandler ; SPI1 movs r1, #0
DCD SPI2_IRQHandler ; SPI2 b LoopCopyDataInit
DCD UART1_IRQHandler ; UART1
DCD UART2_IRQHandler ; UART2 CopyDataInit:
DCD AES_IRQHandler ; AES ldr r3, =_sidata
DCD CAN_IRQHandler ; CAN ldr r3, [r3, r1]
DCD USB_IRQHandler ; USB str r3, [r0, r1]
adds r1, r1, #4
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; LoopCopyDataInit:
;; Default interrupt handlers. ldr r0, =_sdata
;; ldr r3, =_edata
THUMB adds r2, r0, r1
cmp r2, r3
PUBWEAK Reset_Handler bcc CopyDataInit
SECTION .text:CODE:NOROOT:REORDER(2) ldr r2, =_sbss
Reset_Handler b LoopFillZerobss
LDR R0, =SystemInit /* Zero fill the bss segment. */
BLX R0 FillZerobss:
LDR R0, =__iar_program_start movs r3, #0
BX R0 str r3, [r2]
adds r2, r2, #4
PUBWEAK NMI_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
NMI_Handler LoopFillZerobss:
B NMI_Handler ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
PUBWEAK HardFault_Handler
SECTION .text:CODE:NOROOT:REORDER(1) /* Call the clock system intitialization function.*/
HardFault_Handler bl SystemInit
B HardFault_Handler
/* Call the application's entry point.*/
bl main
PUBWEAK SVC_Handler
SECTION .text:CODE:NOROOT:REORDER(1) LoopForever:
SVC_Handler b LoopForever
B SVC_Handler
.size Reset_Handler, .-Reset_Handler
PUBWEAK PendSV_Handler
SECTION .text:CODE:NOROOT:REORDER(1) /* Vector Table Mapped to Address 0 at Reset */
PendSV_Handler .section .isr_vector, "a", %progbits
B PendSV_Handler .type __vector_table, %object
.size __vector_table, .-__vector_table
PUBWEAK SysTick_Handler __vector_table:
SECTION .text:CODE:NOROOT:REORDER(1) .word _estack
SysTick_Handler .word Reset_Handler
B SysTick_Handler .word NMI_Handler
.word HardFault_Handler
.word 0
PUBWEAK WWDG_IRQHandler .word 0
SECTION .text:CODE:NOROOT:REORDER(1) .word 0
WWDG_IRQHandler .word 0
B WWDG_IRQHandler .word 0
.word 0
.word 0
PUBWEAK PVD_IRQHandler .word SVC_Handler
SECTION .text:CODE:NOROOT:REORDER(1) .word 0
PVD_IRQHandler .word 0
B PVD_IRQHandler .word PendSV_Handler
.word SysTick_Handler
PUBWEAK RTC_IRQHandler /* External Interrupts */
SECTION .text:CODE:NOROOT:REORDER(1) .word WWDG_IRQHandler
RTC_IRQHandler .word PVD_IRQHandler
B RTC_IRQHandler .word RTC_IRQHandler
.word FLASH_IRQHandler
.word RCC_CRS_IRQHandler
PUBWEAK FLASH_IRQHandler .word EXTI0_1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .word EXTI2_3_IRQHandler
FLASH_IRQHandler .word EXTI4_15_IRQHandler
B FLASH_IRQHandler .word 0
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_3_IRQHandler
PUBWEAK RCC_CRS_IRQHandler .word DMA1_Channel4_5_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .word ADC_COMP_IRQHandler
RCC_CRS_IRQHandler .word TIM1_BRK_UP_TRG_COM_IRQHandler
B RCC_CRS_IRQHandler .word TIM1_CC_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
PUBWEAK EXTI0_1_IRQHandler .word 0
SECTION .text:CODE:NOROOT:REORDER(1) .word 0
EXTI0_1_IRQHandler .word TIM14_IRQHandler
B EXTI0_1_IRQHandler .word 0
.word TIM16_IRQHandler
.word TIM17_IRQHandler
PUBWEAK EXTI2_3_IRQHandler .word I2C1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .word 0
EXTI2_3_IRQHandler .word SPI1_IRQHandler
B EXTI2_3_IRQHandler .word SPI2_IRQHandler
.word UART1_IRQHandler
.word UART2_IRQHandler
PUBWEAK EXTI4_15_IRQHandler .word AES_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .word CAN_IRQHandler
EXTI4_15_IRQHandler .word USB_IRQHandler
B EXTI4_15_IRQHandler
/* Dummy Exception Handlers (infinite loops which can be modified) */
.section .text.NMI_Handler
PUBWEAK DMA1_Channel1_IRQHandler .weak NMI_Handler
SECTION .text:CODE:NOROOT:REORDER(1) .type NMI_Handler, %function
DMA1_Channel1_IRQHandler NMI_Handler:
B DMA1_Channel1_IRQHandler b NMI_Handler
.section .text.HardFault_Handler
PUBWEAK DMA1_Channel2_3_IRQHandler .weak HardFault_Handler
SECTION .text:CODE:NOROOT:REORDER(1) .type HardFault_Handler, %function
DMA1_Channel2_3_IRQHandler HardFault_Handler:
B DMA1_Channel2_3_IRQHandler b HardFault_Handler
.section .text.SVC_Handler
PUBWEAK DMA1_Channel4_5_IRQHandler .weak SVC_Handler
SECTION .text:CODE:NOROOT:REORDER(1) .type SVC_Handler, %function
DMA1_Channel4_5_IRQHandler SVC_Handler:
B DMA1_Channel4_5_IRQHandler b SVC_Handler
.section .text.PendSV_Handler
PUBWEAK ADC_COMP_IRQHandler .weak PendSV_Handler
SECTION .text:CODE:NOROOT:REORDER(1) .type PendSV_Handler, %function
ADC_COMP_IRQHandler PendSV_Handler:
B ADC_COMP_IRQHandler b PendSV_Handler
.section .text.SysTick_Handler
PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler .weak SysTick_Handler
SECTION .text:CODE:NOROOT:REORDER(1) .type SysTick_Handler, %function
TIM1_BRK_UP_TRG_COM_IRQHandler SysTick_Handler:
B TIM1_BRK_UP_TRG_COM_IRQHandler b SysTick_Handler
.section .text.WWDG_IRQHandler
PUBWEAK TIM1_CC_IRQHandler .weak WWDG_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type WWDG_IRQHandler, %function
TIM1_CC_IRQHandler WWDG_IRQHandler:
B TIM1_CC_IRQHandler b WWDG_IRQHandler
.section .text.PVD_IRQHandler
PUBWEAK TIM2_IRQHandler .weak PVD_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type PVD_IRQHandler, %function
TIM2_IRQHandler PVD_IRQHandler:
B TIM2_IRQHandler b PVD_IRQHandler
.section .text.RTC_IRQHandler
PUBWEAK TIM3_IRQHandler .weak RTC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type RTC_IRQHandler, %function
TIM3_IRQHandler RTC_IRQHandler:
B TIM3_IRQHandler b RTC_IRQHandler
.section .text.FLASH_IRQHandler
PUBWEAK TIM14_IRQHandler .weak FLASH_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type FLASH_IRQHandler, %function
TIM14_IRQHandler FLASH_IRQHandler:
B TIM14_IRQHandler b FLASH_IRQHandler
.section .text.RCC_CRS_IRQHandler
PUBWEAK TIM16_IRQHandler .weak RCC_CRS_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type RCC_CRS_IRQHandler, %function
TIM16_IRQHandler RCC_CRS_IRQHandler:
B TIM16_IRQHandler b RCC_CRS_IRQHandler
.section .text.EXTI0_1_IRQHandler
PUBWEAK TIM17_IRQHandler .weak EXTI0_1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type EXTI0_1_IRQHandler, %function
TIM17_IRQHandler EXTI0_1_IRQHandler:
B TIM17_IRQHandler b EXTI0_1_IRQHandler
.section .text.EXTI2_3_IRQHandler
PUBWEAK I2C1_IRQHandler .weak EXTI2_3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type EXTI2_3_IRQHandler, %function
I2C1_IRQHandler EXTI2_3_IRQHandler:
B I2C1_IRQHandler b EXTI2_3_IRQHandler
.section .text.EXTI4_15_IRQHandler
PUBWEAK SPI1_IRQHandler .weak EXTI4_15_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type EXTI4_15_IRQHandler, %function
SPI1_IRQHandler EXTI4_15_IRQHandler:
B SPI1_IRQHandler b EXTI4_15_IRQHandler
.section .text.DMA1_Channel1_IRQHandler
PUBWEAK SPI2_IRQHandler .weak DMA1_Channel1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type DMA1_Channel1_IRQHandler, %function
SPI2_IRQHandler DMA1_Channel1_IRQHandler:
B SPI2_IRQHandler b DMA1_Channel1_IRQHandler
.section .text.DMA1_Channel2_3_IRQHandler
PUBWEAK UART1_IRQHandler .weak DMA1_Channel2_3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type DMA1_Channel2_3_IRQHandler, %function
UART1_IRQHandler DMA1_Channel2_3_IRQHandler:
B UART1_IRQHandler b DMA1_Channel2_3_IRQHandler
.section .text.DMA1_Channel4_5_IRQHandler
PUBWEAK UART2_IRQHandler .weak DMA1_Channel4_5_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type DMA1_Channel4_5_IRQHandler, %function
UART2_IRQHandler DMA1_Channel4_5_IRQHandler:
B UART2_IRQHandler b DMA1_Channel4_5_IRQHandler
.section .text.ADC_COMP_IRQHandler
PUBWEAK AES_IRQHandler .weak ADC_COMP_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type ADC_COMP_IRQHandler, %function
AES_IRQHandler ADC_COMP_IRQHandler:
B AES_IRQHandler b ADC_COMP_IRQHandler
.section .text.TIM1_BRK_UP_TRG_COM_IRQHandler
PUBWEAK CAN_IRQHandler .weak TIM1_BRK_UP_TRG_COM_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type TIM1_BRK_UP_TRG_COM_IRQHandler, %function
CAN_IRQHandler TIM1_BRK_UP_TRG_COM_IRQHandler:
B CAN_IRQHandler b TIM1_BRK_UP_TRG_COM_IRQHandler
.section .text.TIM1_CC_IRQHandler
PUBWEAK USB_IRQHandler .weak TIM1_CC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1) .type TIM1_CC_IRQHandler, %function
USB_IRQHandler TIM1_CC_IRQHandler:
B USB_IRQHandler b TIM1_CC_IRQHandler
END .section .text.TIM2_IRQHandler
;******************** (C) COPYRIGHT 2017 MindMotion ******************** .weak TIM2_IRQHandler
.type TIM2_IRQHandler, %function
TIM2_IRQHandler:
b TIM2_IRQHandler
.section .text.TIM3_IRQHandler
.weak TIM3_IRQHandler
.type TIM3_IRQHandler, %function
TIM3_IRQHandler:
b TIM3_IRQHandler
.section .text.TIM14_IRQHandler
.weak TIM14_IRQHandler
.type TIM14_IRQHandler, %function
TIM14_IRQHandler:
b TIM14_IRQHandler
.section .text.TIM16_IRQHandler
.weak TIM16_IRQHandler
.type TIM16_IRQHandler, %function
TIM16_IRQHandler:
b TIM16_IRQHandler
.section .text.TIM17_IRQHandler
.weak TIM17_IRQHandler
.type TIM17_IRQHandler, %function
TIM17_IRQHandler:
b TIM17_IRQHandler
.section .text.I2C1_IRQHandler
.weak I2C1_IRQHandler
.type I2C1_IRQHandler, %function
I2C1_IRQHandler:
b I2C1_IRQHandler
.section .text.SPI1_IRQHandler
.weak SPI1_IRQHandler
.type SPI1_IRQHandler, %function
SPI1_IRQHandler:
b SPI1_IRQHandler
.section .text.SPI2_IRQHandler
.weak SPI2_IRQHandler
.type SPI2_IRQHandler, %function
SPI2_IRQHandler:
b SPI2_IRQHandler
.section .text.UART1_IRQHandler
.weak UART1_IRQHandler
.type UART1_IRQHandler, %function
UART1_IRQHandler:
b UART1_IRQHandler
.section .text.UART2_IRQHandler
.weak UART2_IRQHandler
.type UART2_IRQHandler, %function
UART2_IRQHandler:
b UART2_IRQHandler
.section .text.AES_IRQHandler
.weak AES_IRQHandler
.type AES_IRQHandler, %function
AES_IRQHandler:
b AES_IRQHandler
.section .text.CAN_IRQHandler
.weak CAN_IRQHandler
.type CAN_IRQHandler, %function
CAN_IRQHandler:
b CAN_IRQHandler
.section .text.USB_IRQHandler
.weak USB_IRQHandler
.type USB_IRQHandler, %function
USB_IRQHandler:
b USB_IRQHandler
/* ******************** (C) COPYRIGHT 2017 MindMotion ******************** */