diff --git a/.github/workflows/bsp_buildings.yml b/.github/workflows/bsp_buildings.yml index ed9f900535..b11af681fd 100644 --- a/.github/workflows/bsp_buildings.yml +++ b/.github/workflows/bsp_buildings.yml @@ -93,6 +93,7 @@ jobs: - "hc32l196" - "mm32/mm32f3270-100ask-pitaya" - "mm32f327x" + - "mm32l07x" - "sam7x" - "hk32/hk32f030c8-mini" - "acm32/acm32f0x0-nucleo" diff --git a/.github/workflows/manual_trigger_scons_except_STM32_all.yml b/.github/workflows/manual_trigger_scons_except_STM32_all.yml index 4221233425..dffbe1d530 100644 --- a/.github/workflows/manual_trigger_scons_except_STM32_all.yml +++ b/.github/workflows/manual_trigger_scons_except_STM32_all.yml @@ -185,7 +185,7 @@ jobs: - {RTT_BSP_NAME: "mm32_mm32f3270-100ask-pitaya", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32/mm32f3270-100ask-pitaya"} - {RTT_BSP_NAME: "mm32f103x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32f103x"} #- {RTT_BSP_NAME: "mm32f327x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32f327x"} #编译问题 - #- {RTT_BSP_NAME: "mm32l07x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32l07x"} #编译问题 + - {RTT_BSP_NAME: "mm32l07x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32l07x"} - {RTT_BSP_NAME: "mm32l3xx", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "mm32l3xx"} - {RTT_BSP_NAME: "n32_n32g43xcl-stb", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "n32/n32g43xcl-stb"} - {RTT_BSP_NAME: "n32_n32g457qel-stb", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "n32/n32g457qel-stb"} diff --git a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/HAL_i2c.c b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/HAL_i2c.c index 33c9d38202..7e18cdf28b 100644 --- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/HAL_i2c.c +++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/HAL_i2c.c @@ -16,7 +16,7 @@ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * *

© COPYRIGHT 2017 MindMotion

-*/ +*/ /* Includes ------------------------------------------------------------------*/ #include "HAL_i2c.h" @@ -27,10 +27,10 @@ * @{ */ -/** @defgroup I2C +/** @defgroup I2C * @brief I2C driver modules * @{ -*/ +*/ /** @defgroup I2C_Private_TypesDefinitions * @{ @@ -44,13 +44,13 @@ * @{ */ -/*I2c Enable disable*/ +/* I2c Enable disable */ #define IC_ENABLE_Reset ((uint16_t)0xFFFE) #define IC_ENABLE_Set ((uint16_t)0x0001) -#define IC_CON_RESET ((uint16_t)0xFE8A) +#define IC_CON_RESET ((uint16_t)0xFE8A) #define INTR_MASK ((uint16_t)0xC000) -/*I2c DMA reset*/ +/* I2c DMA reset */ #define DMA_CR_TDMAE_RDMAE_Reset ((uint16_t)0xFFFC) /* I2C START mask */ @@ -68,7 +68,7 @@ #define IC_TAR_ENDUAL_Set ((uint16_t)0x1000) #define IC_TAR_ENDUAL_Reset ((uint16_t)0xEFFF) -/* I2C SPECIAL¡¢GC_OR_START bits mask */ +/* I2C SPECIAL GC_OR_START bits mask */ #define IC_TAR_GC_Set ((uint16_t)0x0800) #define IC_TAR_GC_Reset ((uint16_t)0xF7FF) @@ -78,10 +78,9 @@ static uint8_t I2C_CMD_DIR = 0; -/*ÐÂÔö¼ÓµÄÓû§±äÁ¿£¬Íⲿµ÷ÓÃʱÐèÒª¸üиñäÁ¿Öµ*/ -uint16_t I2C_DMA_DIR = 0; +uint16_t I2C_DMA_DIR = 0; -/** +/** * @} */ @@ -131,14 +130,14 @@ void I2C_DeInit(I2C_TypeDef* I2Cx) /* Release I2C1 from reset state */ RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); break; - + default: break; } } /** -* @brief Initializes the I2Cx peripheral according to the specified +* @brief Initializes the I2Cx peripheral according to the specified * parameters in the I2C_InitStruct. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that @@ -148,10 +147,10 @@ void I2C_DeInit(I2C_TypeDef* I2Cx) */ void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) { - + uint16_t tmpreg = 0; uint32_t pclk1 = 8000000; - //uint32_t minSclLowTime = 0; + /* uint32_t minSclLowTime = 0; */ uint32_t i2cPeriod = 0; uint32_t pclk1Period = 0; RCC_ClocksTypeDef rcc_clocks; @@ -162,45 +161,45 @@ void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) /*---------------------------- I2Cx IC_ENABLE Configuration ------------------------*/ /* Disable the selected I2C peripheral */ I2Cx->IC_ENABLE &= IC_ENABLE_Reset; - + /* Get pclk1 frequency value */ RCC_GetClocksFreq(&rcc_clocks); pclk1 = rcc_clocks.PCLK1_Frequency; - + /* Set pclk1 period value */ pclk1Period = 1000000000/pclk1; - - i2cPeriod = 1000000000/I2C_InitStruct->I2C_ClockSpeed; //ns unit + + i2cPeriod = 1000000000/I2C_InitStruct->I2C_ClockSpeed; /*ns unit*/ tmpreg = 0; /* Configure speed in standard mode */ if (I2C_InitStruct->I2C_ClockSpeed <= 100000) { tmpreg = (i2cPeriod/pclk1Period)/2; - I2Cx->IC_SS_SCL_LCNT = tmpreg; + I2Cx->IC_SS_SCL_LCNT = tmpreg; tmpreg = (i2cPeriod - pclk1Period*I2Cx->IC_SS_SCL_LCNT)/pclk1Period; /* Write to I2Cx IC_SS_SCL_HCNT */ I2Cx->IC_SS_SCL_HCNT = tmpreg; - - + + } - else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/ + else /* (I2C_InitStruct->I2C_ClockSpeed <= 400000) */ { tmpreg = (i2cPeriod/pclk1Period)/2; - I2Cx->IC_FS_SCL_LCNT = tmpreg; + I2Cx->IC_FS_SCL_LCNT = tmpreg; tmpreg = (i2cPeriod - pclk1Period*I2Cx->IC_FS_SCL_LCNT)/pclk1Period; /* Write to I2Cx IC_FS_SCL_HCNT */ I2Cx->IC_FS_SCL_HCNT = tmpreg; } - - /*Get the I2Cx IC_CON value */ + + /* Get the I2Cx IC_CON value */ tmpreg = I2Cx->IC_CON; - /*Clear TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits*/ + /* Clear TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits */ tmpreg &= IC_CON_RESET; - /*Set TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits*/ + /* Set TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits */ tmpreg = TX_EMPTY_CTRL | IC_SLAVE_DISABLE | IC_RESTART_EN |IC_7BITADDR_MASTER | I2C_InitStruct->I2C_Speed | I2C_InitStruct->I2C_Mode; /* Write to I2Cx IC_CON */ I2Cx->IC_CON = tmpreg; - + /*---------------------------- I2Cx IC_INTR_MASK Configuration ------------------------*/ /* Get the I2Cx IC_INTR_MASK value */ tmpreg = I2Cx->IC_INTR_MASK; @@ -208,12 +207,12 @@ void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) tmpreg &= INTR_MASK; /* Write to IC_INTR_MASK */ I2Cx->IC_INTR_MASK = tmpreg; - - /* Write to IC_RX_TL */ - I2Cx->IC_RX_TL = 0x0; //rxfifo depth is 1 - /* Write to IC_TX_TL */ - I2Cx->IC_TX_TL = 0x1; //tcfifo depth is 1 - + + /* Write to IC_RX_TL */ + I2Cx->IC_RX_TL = 0x0; /* rxfifo depth is 1 */ + /* Write to IC_TX_TL */ + I2Cx->IC_TX_TL = 0x1; /* tcfifo depth is 1 */ + } /** @@ -262,10 +261,10 @@ void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState) /** * @brief Enables or disables the specified I2C DMA requests. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. -* @param DMA_Direcction : TDMAE_SET,RDMAE_SET +* @param DMA_Direcction : TDMAE_SET,RDMAE_SET * This parameter can be any combination of the following values: -* @arg TDMAE_SET :DMA TX set -* @arg RDMAE_SET :DMA RX set +* @arg TDMAE_SET :DMA TX set +* @arg RDMAE_SET :DMA RX set * @param NewState: new state of the I2C DMA transfer. * This parameter can be: ENABLE or DISABLE. * @retval : None @@ -344,7 +343,7 @@ void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState) * @retval : None. */ void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address) -//void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address) +/* void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address) */ { uint16_t tmpreg = 0; /* Check the parameters */ @@ -411,20 +410,20 @@ void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) * @brief Enables or disables the specified I2C interrupts. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param I2C_IT: specifies the I2C interrupts sources to be enabled -* or disabled. +* or disabled. * This parameter can be any combination of the following values: -* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt mask -* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt mask -* @arg I2C_IT_RX_FULL : Rx buffer full interrupt mask -* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt mask -* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt mask -* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt mask -* @arg I2C_IT_TX_ABRT : TX error interrupt mask(Master mode) -* @arg I2C_IT_RX_DONE : Master not ack interrupt mask(slave mode) -* @arg I2C_IT_ACTIVITY : I2C activity interrupt mask -* @arg I2C_IT_STOP_DET : stop condition interrupt mask -* @arg I2C_IT_START_DET : start condition interrupt mask -* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt mask +* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt mask +* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt mask +* @arg I2C_IT_RX_FULL : Rx buffer full interrupt mask +* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt mask +* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt mask +* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt mask +* @arg I2C_IT_TX_ABRT : TX error interrupt mask(Master mode) +* @arg I2C_IT_RX_DONE : Master not ack interrupt mask(slave mode) +* @arg I2C_IT_ACTIVITY : I2C activity interrupt mask +* @arg I2C_IT_STOP_DET : stop condition interrupt mask +* @arg I2C_IT_START_DET : start condition interrupt mask +* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt mask * @param NewState: new state of the specified I2C interrupts. * This parameter can be: ENABLE or DISABLE. * @retval : None @@ -435,12 +434,12 @@ void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState) assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_FUNCTIONAL_STATE(NewState)); assert_param(IS_I2C_CONFIG_IT(I2C_IT)); - + if(I2C_IT == I2C_IT_RX_FULL) { I2Cx->IC_DATA_CMD = CMD_READ; } - + if (NewState != DISABLE) { /* Enable the selected I2C interrupts */ @@ -505,7 +504,7 @@ void I2C_ReadCmd(I2C_TypeDef* I2Cx) { /* Check the parameters */ assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - + I2Cx->IC_DATA_CMD = CMD_READ; } @@ -528,7 +527,7 @@ uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx) * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. * @param Address: specifies the slave address which will be transmitted * @param I2C_Direction: specifies whether the I2C device will be a -* Transmitter or a Receiver. +* Transmitter or a Receiver. * This parameter can be one of the following values * @arg I2C_Direction_Transmitter: Transmitter mode * @arg I2C_Direction_Receiver: Receiver mode @@ -568,7 +567,7 @@ uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx) assert_param(IS_I2C_ALL_PERIPH(I2Cx)); /* Read the I2Cx status register */ flag1 = I2Cx->IC_RAW_INTR_STAT; - + /* Get the last event value from I2C status register */ lastevent = (flag1 ) & FLAG_Mask; /* Return status */ @@ -581,20 +580,20 @@ uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx) * @brief Checks whether the last I2Cx Event is equal to the one passed * as parameter. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. -* @param I2C_EVENT: specifies the event to be checked. +* @param I2C_EVENT: specifies the event to be checked. * This parameter can be one of the following values: -* @arg I2C_EVENT_RX_UNDER: Rx Buffer is empty event -* @arg I2C_EVENT_RX_OVER : RX Buffer Overrun event -* @arg I2C_EVENTT_RX_FULL : Rx buffer full event -* @arg I2C_EVENT_TX_OVER : TX Buffer Overrun event -* @arg I2C_EVENT_TX_EMPTY : TX_FIFO empty event -* @arg I2C_EVENT_RD_REQ : I2C work as slave or master event -* @arg I2C_EVENT_TX_ABRT : TX error event(Master mode) -* @arg I2C_EVENT_RX_DONE : Master not ack event(slave mode) -* @arg I2C_EVENT_ACTIVITY : I2C activity event -* @arg I2C_EVENT_STOP_DET : stop condition event -* @arg I2C_EVENT_START_DET : start condition event -* @arg I2C_EVENT_GEN_CALL : a general call address and ack event +* @arg I2C_EVENT_RX_UNDER: Rx Buffer is empty event +* @arg I2C_EVENT_RX_OVER : RX Buffer Overrun event +* @arg I2C_EVENTT_RX_FULL : Rx buffer full event +* @arg I2C_EVENT_TX_OVER : TX Buffer Overrun event +* @arg I2C_EVENT_TX_EMPTY : TX_FIFO empty event +* @arg I2C_EVENT_RD_REQ : I2C work as slave or master event +* @arg I2C_EVENT_TX_ABRT : TX error event(Master mode) +* @arg I2C_EVENT_RX_DONE : Master not ack event(slave mode) +* @arg I2C_EVENT_ACTIVITY : I2C activity event +* @arg I2C_EVENT_STOP_DET : stop condition event +* @arg I2C_EVENT_START_DET : start condition event +* @arg I2C_EVENT_GEN_CALL : a general call address and ack event * - SUCCESS: Last event is equal to the I2C_EVENT * - ERROR: Last event is different from the I2C_EVENT */ @@ -606,7 +605,7 @@ ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT) /* Check the parameters */ assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_EVENT(I2C_EVENT)); - + if((I2C_EVENT == I2C_EVENT_RX_FULL)&&(I2C_CMD_DIR==0)) { I2Cx->IC_DATA_CMD = CMD_READ; @@ -614,13 +613,13 @@ ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT) } /* Read the I2Cx status register */ flag1 = I2Cx->IC_RAW_INTR_STAT; - //flag1 = I2Cx->IC_INTR_STAT; + /* flag1 = I2Cx->IC_INTR_STAT; */ /* Get the last event value from I2C status register */ lastevent = (flag1 ) & I2C_EVENT; - + /* Check whether the last event is equal to I2C_EVENT */ if (lastevent == I2C_EVENT ) - //if((I2Cx->IC_RAW_INTR_STAT & I2C_EVENT) != (uint32_t)RESET) + /* if((I2Cx->IC_RAW_INTR_STAT & I2C_EVENT) != (uint32_t)RESET) */ { /* SUCCESS: last event is equal to I2C_EVENT */ status = SUCCESS; @@ -632,39 +631,42 @@ ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT) } /* Return status */ return status; - + } /** * @brief Checks whether the specified I2C flag is set or not. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. -* @param I2C_FLAG: specifies the flag to check. +* @param I2C_FLAG: specifies the flag to check. * This parameter can be one of the following values: -* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag -* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag -* @arg I2C_FLAG_RX_FULL : Rx buffer full flag -* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag -* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag -* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag -* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode) -* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode) -* @arg I2C_FLAG_ACTIVITY: I2C activity flag -* @arg I2C_FLAG_STOP_DET: stop condition flag -* @arg I2C_FLAG_START_DET: start condition flag -* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag -* @arg I2C_STATUS_FLAG_ACTIVITY -* @arg I2C_STATUS_FLAG_TFNF -* @arg I2C_STATUS_FLAG_TFE -* @arg I2C_STATUS_FLAG_RFNE -* @arg I2C_STATUS_FLAG_RFF -* @arg I2C_STATUS_FLAG_M_ACTIVITY -* @arg I2C_STATUS_FLAG_S_ACTIVITY +* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag +* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag +* @arg I2C_FLAG_RX_FULL : Rx buffer full flag +* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag +* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag +* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag +* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode) +* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode) +* @arg I2C_FLAG_ACTIVITY: I2C activity flag +* @arg I2C_FLAG_STOP_DET: stop condition flag +* @arg I2C_FLAG_START_DET: start condition flag +* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag +* @arg I2C_STATUS_FLAG_ACTIVITY +* @arg I2C_STATUS_FLAG_TFNF +* @arg I2C_STATUS_FLAG_TFE +* @arg I2C_STATUS_FLAG_RFNE +* @arg I2C_STATUS_FLAG_RFF +* @arg I2C_STATUS_FLAG_M_ACTIVITY +* @arg I2C_STATUS_FLAG_S_ACTIVITY * @retval : The new state of I2C_FLAG (SET or RESET). */ FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) { FlagStatus bitstatus = RESET; __IO uint32_t i2creg = 0, i2cxbase = 0; + ((void)i2creg); + ((void)i2cxbase); + /* Check the parameters */ assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_GET_FLAG(I2C_FLAG)); @@ -708,20 +710,20 @@ FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) /** * @brief Clears the I2Cx's pending flags. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. -* @param I2C_FLAG: specifies the flag to clear. +* @param I2C_FLAG: specifies the flag to clear. * This parameter can be any combination of the following values: -* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag -* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag -* @arg I2C_FLAG_RX_FULL : Rx buffer full flag -* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag -* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag -* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag -* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode) -* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode) -* @arg I2C_FLAG_ACTIVITY: I2C activity flag -* @arg I2C_FLAG_STOP_DET: stop condition flag -* @arg I2C_FLAG_START_DET: start condition flag -* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag +* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag +* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag +* @arg I2C_FLAG_RX_FULL : Rx buffer full flag +* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag +* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag +* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag +* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode) +* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode) +* @arg I2C_FLAG_ACTIVITY: I2C activity flag +* @arg I2C_FLAG_STOP_DET: stop condition flag +* @arg I2C_FLAG_START_DET: start condition flag +* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag * @retval : None */ void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) @@ -730,35 +732,45 @@ void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG)); - if((I2C_FLAG & I2C_FLAG_RX_UNDER) == I2C_FLAG_RX_UNDER) {I2Cx->IC_CLR_RX_UNDER;} - if((I2C_FLAG & I2C_FLAG_RX_OVER) == I2C_FLAG_RX_OVER) {I2Cx->IC_CLR_RX_OVER;} - if((I2C_FLAG & I2C_FLAG_TX_OVER) == I2C_FLAG_TX_OVER) {I2Cx->IC_CLR_TX_OVER;} - if((I2C_FLAG & I2C_FLAG_RD_REQ) == I2C_FLAG_RD_REQ) {I2Cx->IC_CLR_RD_REQ;} - if((I2C_FLAG & I2C_FLAG_TX_ABRT) == I2C_FLAG_TX_ABRT) {I2Cx->IC_CLR_TX_ABRT;} - if((I2C_FLAG & I2C_FLAG_RX_DONE) == I2C_FLAG_RX_DONE) {I2Cx->IC_CLR_RX_DONE;} - if((I2C_FLAG & I2C_FLAG_ACTIVITY) == I2C_FLAG_ACTIVITY) {I2Cx->IC_CLR_ACTIVITY;} - if((I2C_FLAG & I2C_FLAG_STOP_DET) == I2C_FLAG_STOP_DET) {I2Cx->IC_CLR_STOP_DET;} - if((I2C_FLAG & I2C_FLAG_START_DET) == I2C_FLAG_START_DET){I2Cx->IC_CLR_START_DET;} - if((I2C_FLAG & I2C_FLAG_GEN_CALL) == I2C_FLAG_GEN_CALL) {I2Cx->IC_CLR_GEN_CALL;} + if((I2C_FLAG & I2C_FLAG_RX_UNDER) == I2C_FLAG_RX_UNDER) + {((void)I2Cx->IC_CLR_RX_UNDER);} + if((I2C_FLAG & I2C_FLAG_RX_OVER) == I2C_FLAG_RX_OVER) + {((void)I2Cx->IC_CLR_RX_OVER);} + if((I2C_FLAG & I2C_FLAG_TX_OVER) == I2C_FLAG_TX_OVER) + {((void)I2Cx->IC_CLR_TX_OVER);} + if((I2C_FLAG & I2C_FLAG_RD_REQ) == I2C_FLAG_RD_REQ) + {((void)I2Cx->IC_CLR_RD_REQ);} + if((I2C_FLAG & I2C_FLAG_TX_ABRT) == I2C_FLAG_TX_ABRT) + {((void)I2Cx->IC_CLR_TX_ABRT);} + if((I2C_FLAG & I2C_FLAG_RX_DONE) == I2C_FLAG_RX_DONE) + {((void)I2Cx->IC_CLR_RX_DONE);} + if((I2C_FLAG & I2C_FLAG_ACTIVITY) == I2C_FLAG_ACTIVITY) + {((void)I2Cx->IC_CLR_ACTIVITY);} + if((I2C_FLAG & I2C_FLAG_STOP_DET) == I2C_FLAG_STOP_DET) + {((void)I2Cx->IC_CLR_STOP_DET);} + if((I2C_FLAG & I2C_FLAG_START_DET) == I2C_FLAG_START_DET) + {((void)I2Cx->IC_CLR_START_DET);} + if((I2C_FLAG & I2C_FLAG_GEN_CALL) == I2C_FLAG_GEN_CALL) + {((void)I2Cx->IC_CLR_GEN_CALL);} } /** * @brief Checks whether the specified I2C interrupt has occurred or not. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. -* @param I2C_IT: specifies the interrupt source to check. +* @param I2C_IT: specifies the interrupt source to check. * This parameter can be one of the following values: -* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt -* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt -* @arg I2C_IT_RX_FULL : Rx buffer full interrupt -* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt -* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt -* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt -* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode) -* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode) -* @arg I2C_IT_ACTIVITY : I2C activity interrupt -* @arg I2C_IT_STOP_DET : stop condition interrupt -* @arg I2C_IT_START_DET : start condition interrupt -* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt +* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt +* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt +* @arg I2C_IT_RX_FULL : Rx buffer full interrupt +* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt +* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt +* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt +* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode) +* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode) +* @arg I2C_IT_ACTIVITY : I2C activity interrupt +* @arg I2C_IT_STOP_DET : stop condition interrupt +* @arg I2C_IT_START_DET : start condition interrupt +* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt * @retval : The new state of I2C_IT (SET or RESET). */ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) @@ -767,7 +779,7 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) /* Check the parameters */ assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_GET_IT(I2C_IT)); - + /* Check the status of the specified I2C flag */ if((I2Cx->IC_RAW_INTR_STAT & I2C_IT) != (uint32_t)RESET) { @@ -779,7 +791,7 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) /* I2C_IT is reset */ bitstatus = RESET; } - + /* Return the I2C_IT status */ return bitstatus; } @@ -787,20 +799,20 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) /** * @brief Clears the I2Cx interrupt pending bits. * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. -* @param I2C_IT: specifies the interrupt pending bit to clear. +* @param I2C_IT: specifies the interrupt pending bit to clear. * This parameter can be any combination of the following values: -* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt -* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt -* @arg I2C_IT_RX_FULL : Rx buffer full interrupt -* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt -* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt -* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt -* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode) -* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode) -* @arg I2C_IT_ACTIVITY : I2C activity interrupt -* @arg I2C_IT_STOP_DET : stop condition interrupt -* @arg I2C_IT_START_DET : start condition interrupt -* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt +* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt +* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt +* @arg I2C_IT_RX_FULL : Rx buffer full interrupt +* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt +* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt +* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt +* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode) +* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode) +* @arg I2C_IT_ACTIVITY : I2C activity interrupt +* @arg I2C_IT_STOP_DET : stop condition interrupt +* @arg I2C_IT_START_DET : start condition interrupt +* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt * @retval : None */ void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) @@ -808,32 +820,42 @@ void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) /* Check the parameters */ assert_param(IS_I2C_ALL_PERIPH(I2Cx)); assert_param(IS_I2C_CLEAR_IT(I2C_IT)); - + /* Clear the selected I2C flag */ - - if((I2C_IT & I2C_IT_RX_UNDER) == I2C_FLAG_RX_UNDER) {I2Cx->IC_CLR_RX_UNDER;} - if((I2C_IT & I2C_IT_RX_OVER) == I2C_FLAG_RX_OVER) {I2Cx->IC_CLR_RX_OVER;} - if((I2C_IT & I2C_IT_TX_OVER) == I2C_FLAG_TX_OVER) {I2Cx->IC_CLR_TX_OVER;} - if((I2C_IT & I2C_IT_RD_REQ) == I2C_FLAG_RD_REQ) {I2Cx->IC_CLR_RD_REQ;} - if((I2C_IT & I2C_IT_TX_ABRT) == I2C_FLAG_TX_ABRT) {I2Cx->IC_CLR_TX_ABRT;} - if((I2C_IT & I2C_IT_RX_DONE) == I2C_FLAG_RX_DONE) {I2Cx->IC_CLR_RX_DONE;} - if((I2C_IT & I2C_IT_ACTIVITY) == I2C_FLAG_ACTIVITY) {I2Cx->IC_CLR_ACTIVITY;} - if((I2C_IT & I2C_IT_STOP_DET) == I2C_FLAG_STOP_DET) {I2Cx->IC_CLR_STOP_DET;} - if((I2C_IT & I2C_IT_START_DET) == I2C_FLAG_START_DET){I2Cx->IC_CLR_START_DET;} - if((I2C_IT & I2C_IT_GEN_CALL) == I2C_FLAG_GEN_CALL) {I2Cx->IC_CLR_GEN_CALL;} - + + if((I2C_IT & I2C_IT_RX_UNDER) == I2C_FLAG_RX_UNDER) + {((void)I2Cx->IC_CLR_RX_UNDER);} + if((I2C_IT & I2C_IT_RX_OVER) == I2C_FLAG_RX_OVER) + {((void)I2Cx->IC_CLR_RX_OVER);} + if((I2C_IT & I2C_IT_TX_OVER) == I2C_FLAG_TX_OVER) + {((void)I2Cx->IC_CLR_TX_OVER);} + if((I2C_IT & I2C_IT_RD_REQ) == I2C_FLAG_RD_REQ) + {((void)I2Cx->IC_CLR_RD_REQ);} + if((I2C_IT & I2C_IT_TX_ABRT) == I2C_FLAG_TX_ABRT) + {((void)I2Cx->IC_CLR_TX_ABRT);} + if((I2C_IT & I2C_IT_RX_DONE) == I2C_FLAG_RX_DONE) + {((void)I2Cx->IC_CLR_RX_DONE);} + if((I2C_IT & I2C_IT_ACTIVITY) == I2C_FLAG_ACTIVITY) + {((void)I2Cx->IC_CLR_ACTIVITY);} + if((I2C_IT & I2C_IT_STOP_DET) == I2C_FLAG_STOP_DET) + {((void)I2Cx->IC_CLR_STOP_DET);} + if((I2C_IT & I2C_IT_START_DET) == I2C_FLAG_START_DET) + {((void)I2Cx->IC_CLR_START_DET);} + if((I2C_IT & I2C_IT_GEN_CALL) == I2C_FLAG_GEN_CALL) + {((void)I2Cx->IC_CLR_GEN_CALL);} + } /** * @} -*/ +*/ /** * @} -*/ +*/ /** * @} -*/ +*/ /*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/ diff --git a/bsp/mm32l07x/Libraries/MM32L0xx/Source/GCC_StartAsm/startup_MM32L0xx.s b/bsp/mm32l07x/Libraries/MM32L0xx/Source/GCC_StartAsm/startup_MM32L0xx.s index b75e5ebd15..34fc0515de 100644 --- a/bsp/mm32l07x/Libraries/MM32L0xx/Source/GCC_StartAsm/startup_MM32L0xx.s +++ b/bsp/mm32l07x/Libraries/MM32L0xx/Source/GCC_StartAsm/startup_MM32L0xx.s @@ -1,305 +1,355 @@ -;******************** (C) COPYRIGHT 2017 MindMotion ******************** -;* File Name : startup_mm32L0xx.s -;* Author : AE Team -;* Version : V2.0.0 -;* Date : 22/08/2017 -;* Description : MM32L0xx Medium-density devices vector table for EWARM toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == __iar_program_start, -;* - Set the vector table entries with the exceptions ISR -;* address -;* - Configure the system clock -;* - Branches to main in the C library (which eventually -;* calls main()). -;* After Reset the Cortex-M0 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;******************************************************************************* -; -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; +/* ******************** (C) COPYRIGHT 2017 MindMotion ******************** */ +/* File Name : startup_mm32L0xx.s */ +/* Author : AE Team */ +/* Version : V2.0.0 */ +/* Date : 22/08/2017 */ +/* Description : MM32L0xx Medium-density devices vector table for */ +/* GCC toolchain. */ +/* This module performs: */ +/* - Set the initial SP */ +/* - Set the initial PC == __iar_program_start, */ +/* - Set the vector table entries with the exceptions*/ +/* ISR address */ +/* - Configure the system clock */ +/* - Branches to main in the C library (which */ +/* eventually calls main()). */ +/* After Reset the Cortex-M0 processor is in Thread */ +/* mode, priority is Privileged, and the Stack is set*/ +/* to Main. */ +/* ************************************************************************/ - MODULE ?cstartup +/* The vector table is normally located at address 0. When debugging in RAM, it can be located in RAM, aligned to at least 2^6. The name "__vector_table" has special meaning for C-SPY: it is where the SP start value is found, and the NVIC vector table register (VTOR) is initialized to this address if != 0. */ - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) +/* Cortex-M version */ - SECTION .intvec:CODE:NOROOT(2) + .syntax unified + .cpu cortex-m0 + .fpu softvfp + .thumb - EXTERN __iar_program_start - EXTERN SystemInit - PUBLIC __vector_table +.global __vector_table - DATA -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler +.word _sidata +.word _sdata +.word _edata +.word _sbss +.word _ebss - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD RTC_IRQHandler ; RTC through EXTI Line & Tamper - DCD FLASH_IRQHandler ; FLASH - DCD RCC_CRS_IRQHandler ; RCC & CRS - DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 - DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 - DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 - DCD 0 ; Reserved - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 - DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5 - DCD ADC_COMP_IRQHandler ; ADC1 & COMP - DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD TIM14_IRQHandler ; TIM14 - DCD 0 ; Reserved - DCD TIM16_IRQHandler ; TIM16 - DCD TIM17_IRQHandler ; TIM17 - DCD I2C1_IRQHandler ; I2C1 - DCD 0 ; Reserved - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD UART1_IRQHandler ; UART1 - DCD UART2_IRQHandler ; UART2 - DCD AES_IRQHandler ; AES - DCD CAN_IRQHandler ; CAN - DCD USB_IRQHandler ; USB - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - - PUBWEAK Reset_Handler - SECTION .text:CODE:NOROOT:REORDER(2) -Reset_Handler - LDR R0, =SystemInit - BLX R0 - LDR R0, =__iar_program_start - BX R0 - - PUBWEAK NMI_Handler - SECTION .text:CODE:NOROOT:REORDER(1) -NMI_Handler - B NMI_Handler - - - PUBWEAK HardFault_Handler - SECTION .text:CODE:NOROOT:REORDER(1) -HardFault_Handler - B HardFault_Handler - - - PUBWEAK SVC_Handler - SECTION .text:CODE:NOROOT:REORDER(1) -SVC_Handler - B SVC_Handler - - - PUBWEAK PendSV_Handler - SECTION .text:CODE:NOROOT:REORDER(1) -PendSV_Handler - B PendSV_Handler - - - PUBWEAK SysTick_Handler - SECTION .text:CODE:NOROOT:REORDER(1) -SysTick_Handler - B SysTick_Handler - - - PUBWEAK WWDG_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -WWDG_IRQHandler - B WWDG_IRQHandler - - - PUBWEAK PVD_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -PVD_IRQHandler - B PVD_IRQHandler - - - PUBWEAK RTC_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -RTC_IRQHandler - B RTC_IRQHandler - - - PUBWEAK FLASH_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -FLASH_IRQHandler - B FLASH_IRQHandler - - - PUBWEAK RCC_CRS_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -RCC_CRS_IRQHandler - B RCC_CRS_IRQHandler - - - PUBWEAK EXTI0_1_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -EXTI0_1_IRQHandler - B EXTI0_1_IRQHandler - - - PUBWEAK EXTI2_3_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -EXTI2_3_IRQHandler - B EXTI2_3_IRQHandler - - - PUBWEAK EXTI4_15_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -EXTI4_15_IRQHandler - B EXTI4_15_IRQHandler - - - PUBWEAK DMA1_Channel1_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -DMA1_Channel1_IRQHandler - B DMA1_Channel1_IRQHandler - - - PUBWEAK DMA1_Channel2_3_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -DMA1_Channel2_3_IRQHandler - B DMA1_Channel2_3_IRQHandler - - - PUBWEAK DMA1_Channel4_5_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -DMA1_Channel4_5_IRQHandler - B DMA1_Channel4_5_IRQHandler - - - PUBWEAK ADC_COMP_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -ADC_COMP_IRQHandler - B ADC_COMP_IRQHandler - - - PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -TIM1_BRK_UP_TRG_COM_IRQHandler - B TIM1_BRK_UP_TRG_COM_IRQHandler - - - PUBWEAK TIM1_CC_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -TIM1_CC_IRQHandler - B TIM1_CC_IRQHandler - - - PUBWEAK TIM2_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -TIM2_IRQHandler - B TIM2_IRQHandler - - - PUBWEAK TIM3_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -TIM3_IRQHandler - B TIM3_IRQHandler - - - PUBWEAK TIM14_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -TIM14_IRQHandler - B TIM14_IRQHandler - - - PUBWEAK TIM16_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -TIM16_IRQHandler - B TIM16_IRQHandler - - - PUBWEAK TIM17_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -TIM17_IRQHandler - B TIM17_IRQHandler - - - PUBWEAK I2C1_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -I2C1_IRQHandler - B I2C1_IRQHandler - - - PUBWEAK SPI1_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -SPI1_IRQHandler - B SPI1_IRQHandler - - - PUBWEAK SPI2_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -SPI2_IRQHandler - B SPI2_IRQHandler - - - PUBWEAK UART1_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -UART1_IRQHandler - B UART1_IRQHandler - - - PUBWEAK UART2_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -UART2_IRQHandler - B UART2_IRQHandler - - - PUBWEAK AES_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -AES_IRQHandler - B AES_IRQHandler - - - PUBWEAK CAN_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -CAN_IRQHandler - B CAN_IRQHandler - - - PUBWEAK USB_IRQHandler - SECTION .text:CODE:NOROOT:REORDER(1) -USB_IRQHandler - B USB_IRQHandler - - END -;******************** (C) COPYRIGHT 2017 MindMotion ******************** + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + msr msp, r0 + + /*Check if boot space corresponds to test memory*/ + ldr r0, =0x00000004 + ldr r1, [r0] + lsrs r1, r1, #24 + ldr r2, =0x1F + cmp r1, r2 + bne ApplicationStart + + /*SYSCFG clock enable*/ + ldr r0, =0x40021018 + ldr r1, =0x00000001 + str r1, [r0] + + /* Set CFGR1 register with flash memory remap at address 0 */ + ldr r0, =0x40010000 + ldr r1, =0x00000000 + str r1, [r0] +ApplicationStart: + /* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2] + adds r2, r2, #4 + + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit + +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + +.size Reset_Handler, .-Reset_Handler + +/* Vector Table Mapped to Address 0 at Reset */ + .section .isr_vector, "a", %progbits + .type __vector_table, %object + .size __vector_table, .-__vector_table + +__vector_table: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word RTC_IRQHandler + .word FLASH_IRQHandler + .word RCC_CRS_IRQHandler + .word EXTI0_1_IRQHandler + .word EXTI2_3_IRQHandler + .word EXTI4_15_IRQHandler + .word 0 + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_3_IRQHandler + .word DMA1_Channel4_5_IRQHandler + .word ADC_COMP_IRQHandler + .word TIM1_BRK_UP_TRG_COM_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word 0 + .word 0 + .word TIM14_IRQHandler + .word 0 + .word TIM16_IRQHandler + .word TIM17_IRQHandler + .word I2C1_IRQHandler + .word 0 + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word UART1_IRQHandler + .word UART2_IRQHandler + .word AES_IRQHandler + .word CAN_IRQHandler + .word USB_IRQHandler + +/* Dummy Exception Handlers (infinite loops which can be modified) */ + .section .text.NMI_Handler + .weak NMI_Handler + .type NMI_Handler, %function +NMI_Handler: + b NMI_Handler + + .section .text.HardFault_Handler + .weak HardFault_Handler + .type HardFault_Handler, %function +HardFault_Handler: + b HardFault_Handler + + .section .text.SVC_Handler + .weak SVC_Handler + .type SVC_Handler, %function +SVC_Handler: + b SVC_Handler + + .section .text.PendSV_Handler + .weak PendSV_Handler + .type PendSV_Handler, %function +PendSV_Handler: + b PendSV_Handler + + .section .text.SysTick_Handler + .weak SysTick_Handler + .type SysTick_Handler, %function +SysTick_Handler: + b SysTick_Handler + + .section .text.WWDG_IRQHandler + .weak WWDG_IRQHandler + .type WWDG_IRQHandler, %function +WWDG_IRQHandler: + b WWDG_IRQHandler + + .section .text.PVD_IRQHandler + .weak PVD_IRQHandler + .type PVD_IRQHandler, %function +PVD_IRQHandler: + b PVD_IRQHandler + + .section .text.RTC_IRQHandler + .weak RTC_IRQHandler + .type RTC_IRQHandler, %function +RTC_IRQHandler: + b RTC_IRQHandler + + .section .text.FLASH_IRQHandler + .weak FLASH_IRQHandler + .type FLASH_IRQHandler, %function +FLASH_IRQHandler: + b FLASH_IRQHandler + + .section .text.RCC_CRS_IRQHandler + .weak RCC_CRS_IRQHandler + .type RCC_CRS_IRQHandler, %function +RCC_CRS_IRQHandler: + b RCC_CRS_IRQHandler + + .section .text.EXTI0_1_IRQHandler + .weak EXTI0_1_IRQHandler + .type EXTI0_1_IRQHandler, %function +EXTI0_1_IRQHandler: + b EXTI0_1_IRQHandler + + .section .text.EXTI2_3_IRQHandler + .weak EXTI2_3_IRQHandler + .type EXTI2_3_IRQHandler, %function +EXTI2_3_IRQHandler: + b EXTI2_3_IRQHandler + + .section .text.EXTI4_15_IRQHandler + .weak EXTI4_15_IRQHandler + .type EXTI4_15_IRQHandler, %function +EXTI4_15_IRQHandler: + b EXTI4_15_IRQHandler + + .section .text.DMA1_Channel1_IRQHandler + .weak DMA1_Channel1_IRQHandler + .type DMA1_Channel1_IRQHandler, %function +DMA1_Channel1_IRQHandler: + b DMA1_Channel1_IRQHandler + + .section .text.DMA1_Channel2_3_IRQHandler + .weak DMA1_Channel2_3_IRQHandler + .type DMA1_Channel2_3_IRQHandler, %function +DMA1_Channel2_3_IRQHandler: + b DMA1_Channel2_3_IRQHandler + + .section .text.DMA1_Channel4_5_IRQHandler + .weak DMA1_Channel4_5_IRQHandler + .type DMA1_Channel4_5_IRQHandler, %function +DMA1_Channel4_5_IRQHandler: + b DMA1_Channel4_5_IRQHandler + + .section .text.ADC_COMP_IRQHandler + .weak ADC_COMP_IRQHandler + .type ADC_COMP_IRQHandler, %function +ADC_COMP_IRQHandler: + b ADC_COMP_IRQHandler + + .section .text.TIM1_BRK_UP_TRG_COM_IRQHandler + .weak TIM1_BRK_UP_TRG_COM_IRQHandler + .type TIM1_BRK_UP_TRG_COM_IRQHandler, %function +TIM1_BRK_UP_TRG_COM_IRQHandler: + b TIM1_BRK_UP_TRG_COM_IRQHandler + + .section .text.TIM1_CC_IRQHandler + .weak TIM1_CC_IRQHandler + .type TIM1_CC_IRQHandler, %function +TIM1_CC_IRQHandler: + b TIM1_CC_IRQHandler + + .section .text.TIM2_IRQHandler + .weak TIM2_IRQHandler + .type TIM2_IRQHandler, %function +TIM2_IRQHandler: + b TIM2_IRQHandler + + .section .text.TIM3_IRQHandler + .weak TIM3_IRQHandler + .type TIM3_IRQHandler, %function +TIM3_IRQHandler: + b TIM3_IRQHandler + + .section .text.TIM14_IRQHandler + .weak TIM14_IRQHandler + .type TIM14_IRQHandler, %function +TIM14_IRQHandler: + b TIM14_IRQHandler + + .section .text.TIM16_IRQHandler + .weak TIM16_IRQHandler + .type TIM16_IRQHandler, %function +TIM16_IRQHandler: + b TIM16_IRQHandler + + .section .text.TIM17_IRQHandler + .weak TIM17_IRQHandler + .type TIM17_IRQHandler, %function +TIM17_IRQHandler: + b TIM17_IRQHandler + + .section .text.I2C1_IRQHandler + .weak I2C1_IRQHandler + .type I2C1_IRQHandler, %function +I2C1_IRQHandler: + b I2C1_IRQHandler + + .section .text.SPI1_IRQHandler + .weak SPI1_IRQHandler + .type SPI1_IRQHandler, %function +SPI1_IRQHandler: + b SPI1_IRQHandler + + .section .text.SPI2_IRQHandler + .weak SPI2_IRQHandler + .type SPI2_IRQHandler, %function +SPI2_IRQHandler: + b SPI2_IRQHandler + + .section .text.UART1_IRQHandler + .weak UART1_IRQHandler + .type UART1_IRQHandler, %function +UART1_IRQHandler: + b UART1_IRQHandler + + .section .text.UART2_IRQHandler + .weak UART2_IRQHandler + .type UART2_IRQHandler, %function +UART2_IRQHandler: + b UART2_IRQHandler + + .section .text.AES_IRQHandler + .weak AES_IRQHandler + .type AES_IRQHandler, %function +AES_IRQHandler: + b AES_IRQHandler + + .section .text.CAN_IRQHandler + .weak CAN_IRQHandler + .type CAN_IRQHandler, %function +CAN_IRQHandler: + b CAN_IRQHandler + + .section .text.USB_IRQHandler + .weak USB_IRQHandler + .type USB_IRQHandler, %function +USB_IRQHandler: + b USB_IRQHandler + +/* ******************** (C) COPYRIGHT 2017 MindMotion ******************** */