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[bsp][stm32] fix : #define HEAP_BEGIN

This commit is contained in:
tangweikang 2019-09-12 09:44:00 +08:00
parent 900cc4b13b
commit 41f00e5315
4 changed files with 16 additions and 7 deletions
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12
bsp/stm32/stm32l475-atk-pandora/board/board.h
View File

@ -28,7 +28,17 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#define HEAP_BEGIN STM32_SRAM1_START #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END STM32_SRAM1_END #define HEAP_END STM32_SRAM1_END
void SystemClock_Config(void); void SystemClock_Config(void);

3
bsp/stm32/stm32l475-atk-pandora/board/linker_scripts/link.icf
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@ -29,5 +29,4 @@ do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM1_region { section .sram }; place in RAM1_region { section .sram , readwrite, last block CSTACK};
place in RAM2_region { readwrite, last block CSTACK};

6
bsp/stm32/stm32l475-atk-pandora/board/linker_scripts/link.lds
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@ -89,7 +89,7 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */ /* This is used by the startup in order to initialize the .data secion */
_edata = . ; _edata = . ;
} >RAM2 } >RAM1
.stack : .stack :
{ {
@ -98,7 +98,7 @@ SECTIONS
. = . + _system_stack_size; . = . + _system_stack_size;
. = ALIGN(4); . = ALIGN(4);
_estack = .; _estack = .;
} >RAM2 } >RAM1
__bss_start = .; __bss_start = .;
.bss : .bss :
@ -116,7 +116,7 @@ SECTIONS
_ebss = . ; _ebss = . ;
*(.bss.init) *(.bss.init)
} > RAM2 } > RAM1
__bss_end = .; __bss_end = .;
_end = .; _end = .;

2
bsp/stm32/stm32l475-atk-pandora/board/linker_scripts/link.sct
View File

@ -8,7 +8,7 @@ LR_IROM1 0x08000000 0x00080000 { ; load region size_region
*(InRoot$$Sections) *(InRoot$$Sections)
.ANY (+RO) .ANY (+RO)
} }
RW_IRAM2 0x10000000 0x00008000 { ; RW data RW_IRAM1 0x20000000 0x00018000 { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
} }