mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2025-01-18 20:23:32 +08:00
Merge pull request #1815 from xuzhuoyi/stm32f429-disco
Add LCD and guiengine support for stm32f429-disco
This commit is contained in:
Bernard Xiong
GitHub
commit
3fce70d804
@ -13,13 +13,22 @@ CONFIG_RT_THREAD_PRIORITY_32=y
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# CONFIG_RT_THREAD_PRIORITY_256 is not set
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CONFIG_RT_THREAD_PRIORITY_MAX=32
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CONFIG_RT_TICK_PER_SECOND=100
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CONFIG_RT_DEBUG=y
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CONFIG_RT_USING_OVERFLOW_CHECK=y
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CONFIG_RT_DEBUG_INIT=1
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CONFIG_RT_DEBUG_THREAD=0
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CONFIG_RT_USING_HOOK=y
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CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
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CONFIG_IDLE_THREAD_STACK_SIZE=1024
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# CONFIG_RT_USING_TIMER_SOFT is not set
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CONFIG_RT_DEBUG=y
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# CONFIG_RT_DEBUG_INIT_CONFIG is not set
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# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
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# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
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# CONFIG_RT_DEBUG_IPC_CONFIG is not set
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# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
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# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
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# CONFIG_RT_DEBUG_MEM_CONFIG is not set
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# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
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# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
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# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
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#
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# Inter-Thread communication
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@ -47,11 +56,11 @@ CONFIG_RT_USING_HEAP=y
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# Kernel Device Object
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#
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CONFIG_RT_USING_DEVICE=y
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# CONFIG_RT_USING_DEVICE_OPS is not set
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# CONFIG_RT_USING_INTERRUPT_INFO is not set
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=128
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
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# CONFIG_RT_USING_MODULE is not set
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#
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# RT-Thread Components
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@ -73,6 +82,7 @@ CONFIG_FINSH_USING_HISTORY=y
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CONFIG_FINSH_HISTORY_LINES=5
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CONFIG_FINSH_USING_SYMTAB=y
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CONFIG_FINSH_USING_DESCRIPTION=y
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# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
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CONFIG_FINSH_THREAD_PRIORITY=20
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CONFIG_FINSH_THREAD_STACK_SIZE=4096
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CONFIG_FINSH_CMD_SIZE=80
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@ -80,26 +90,36 @@ CONFIG_FINSH_CMD_SIZE=80
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CONFIG_FINSH_USING_MSH=y
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CONFIG_FINSH_USING_MSH_DEFAULT=y
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# CONFIG_FINSH_USING_MSH_ONLY is not set
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CONFIG_FINSH_ARG_MAX=10
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#
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# Device virtual file system
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#
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# CONFIG_RT_USING_DFS is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
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CONFIG_RT_USING_DFS=y
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CONFIG_DFS_USING_WORKDIR=y
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CONFIG_DFS_FILESYSTEMS_MAX=2
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CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
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CONFIG_DFS_FD_MAX=16
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# CONFIG_RT_USING_DFS_MNTTABLE is not set
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# CONFIG_RT_USING_DFS_ELMFAT is not set
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CONFIG_RT_USING_DFS_DEVFS=y
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# CONFIG_RT_USING_DFS_ROMFS is not set
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# CONFIG_RT_USING_DFS_RAMFS is not set
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# CONFIG_RT_USING_DFS_UFFS is not set
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# CONFIG_RT_USING_DFS_JFFS2 is not set
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#
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# Device Drivers
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#
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CONFIG_RT_USING_DEVICE_IPC=y
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CONFIG_RT_PIPE_BUFSZ=512
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CONFIG_RT_USING_SERIAL=y
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# CONFIG_RT_USING_CAN is not set
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# CONFIG_RT_USING_HWTIMER is not set
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# CONFIG_RT_USING_CPUTIME is not set
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# CONFIG_RT_USING_I2C is not set
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CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_PWM is not set
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# CONFIG_RT_USING_MTD_NOR is not set
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# CONFIG_RT_USING_MTD_NAND is not set
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# CONFIG_RT_USING_RTC is not set
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@ -107,6 +127,7 @@ CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_SPI is not set
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# CONFIG_RT_USING_WDT is not set
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# CONFIG_RT_USING_WIFI is not set
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# CONFIG_RT_USING_AUDIO is not set
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#
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# Using USB
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@ -117,14 +138,18 @@ CONFIG_RT_USING_PIN=y
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#
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# POSIX layer and C standard library
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#
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CONFIG_RT_USING_LIBC=y
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CONFIG_RT_USING_PTHREADS=y
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# CONFIG_HAVE_SYS_SIGNALS is not set
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# CONFIG_RT_USING_LIBC is not set
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# CONFIG_RT_USING_PTHREADS is not set
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#
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# Network stack
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# Network
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#
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#
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# Socket abstraction layer
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#
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# CONFIG_RT_USING_SAL is not set
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#
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# light weight TCP/IP stack
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#
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@ -135,6 +160,11 @@ CONFIG_RT_USING_PTHREADS=y
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#
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# CONFIG_RT_USING_MODBUS is not set
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#
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# AT commands
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#
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# CONFIG_RT_USING_AT is not set
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#
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# VBUS(Virtual Software BUS)
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#
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@ -150,19 +180,6 @@ CONFIG_RT_USING_PTHREADS=y
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# RT-Thread online packages
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#
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#
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# system packages
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#
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#
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# RT-Thread GUI Engine
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#
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# CONFIG_PKG_USING_GUIENGINE is not set
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# CONFIG_PKG_USING_LWEXT4 is not set
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# CONFIG_PKG_USING_PARTITION is not set
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# CONFIG_PKG_USING_SQLITE is not set
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# CONFIG_PKG_USING_RTI is not set
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#
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# IoT - internet of things
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#
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@ -171,10 +188,10 @@ CONFIG_RT_USING_PTHREADS=y
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# CONFIG_PKG_USING_MONGOOSE is not set
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# CONFIG_PKG_USING_WEBTERMINAL is not set
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# CONFIG_PKG_USING_CJSON is not set
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# CONFIG_PKG_USING_JSMN is not set
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# CONFIG_PKG_USING_LJSON is not set
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# CONFIG_PKG_USING_EZXML is not set
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# CONFIG_PKG_USING_NANOPB is not set
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# CONFIG_PKG_USING_GAGENT_CLOUD is not set
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#
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# Wi-Fi
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@ -192,6 +209,15 @@ CONFIG_RT_USING_PTHREADS=y
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# CONFIG_PKG_USING_COAP is not set
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# CONFIG_PKG_USING_NOPOLL is not set
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# CONFIG_PKG_USING_NETUTILS is not set
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# CONFIG_PKG_USING_AT_DEVICE is not set
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#
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# IoT Cloud
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#
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# CONFIG_PKG_USING_ONENET is not set
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# CONFIG_PKG_USING_GAGENT_CLOUD is not set
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# CONFIG_PKG_USING_ALI_IOTKIT is not set
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# CONFIG_PKG_USING_AZURE is not set
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#
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# security packages
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@ -203,6 +229,7 @@ CONFIG_RT_USING_PTHREADS=y
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#
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# language packages
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#
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# CONFIG_PKG_USING_LUA is not set
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# CONFIG_PKG_USING_JERRYSCRIPT is not set
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# CONFIG_PKG_USING_MICROPYTHON is not set
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@ -210,27 +237,72 @@ CONFIG_RT_USING_PTHREADS=y
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# multimedia packages
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#
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# CONFIG_PKG_USING_OPENMV is not set
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# CONFIG_PKG_USING_MUPDF is not set
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#
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# tools packages
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#
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# CONFIG_PKG_USING_CMBACKTRACE is not set
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# CONFIG_PKG_USING_EASYFLASH is not set
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# CONFIG_PKG_USING_EASYLOGGER is not set
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# CONFIG_PKG_USING_SYSTEMVIEW is not set
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# CONFIG_PKG_USING_IPERF is not set
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#
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# system packages
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#
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# CONFIG_PKG_USING_GUIENGINE is not set
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# CONFIG_PKG_USING_GUIENGINE_V200 is not set
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# CONFIG_PKG_USING_GUIENGINE_LATEST_VERSION is not set
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# CONFIG_PKG_USING_CAIRO is not set
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# CONFIG_PKG_USING_PIXMAN is not set
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# CONFIG_PKG_USING_LWEXT4 is not set
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# CONFIG_PKG_USING_PARTITION is not set
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# CONFIG_PKG_USING_FAL is not set
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# CONFIG_PKG_USING_SQLITE is not set
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# CONFIG_PKG_USING_RTI is not set
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# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
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#
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# peripheral libraries and drivers
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#
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# CONFIG_PKG_USING_STM32F4_HAL is not set
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# CONFIG_PKG_USING_STM32F4_DRIVERS is not set
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# CONFIG_PKG_USING_REALTEK_AMEBA is not set
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# CONFIG_PKG_USING_SHT2X is not set
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# CONFIG_PKG_USING_AHT10 is not set
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# CONFIG_PKG_USING_AP3216C is not set
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# CONFIG_PKG_USING_STM32_SDIO is not set
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# CONFIG_PKG_USING_ICM20608 is not set
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#
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# miscellaneous packages
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#
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# CONFIG_PKG_USING_LIBCSV is not set
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# CONFIG_PKG_USING_OPTPARSE is not set
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# CONFIG_PKG_USING_FASTLZ is not set
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# CONFIG_PKG_USING_MINILZO is not set
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# CONFIG_PKG_USING_QUICKLZ is not set
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# CONFIG_PKG_USING_MULTIBUTTON is not set
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# CONFIG_PKG_USING_CANFESTIVAL is not set
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# CONFIG_PKG_USING_ZLIB is not set
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# CONFIG_PKG_USING_DSTR is not set
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#
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# sample package
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#
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#
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# samples: kernel and components samples
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#
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# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
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# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
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# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
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# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
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#
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# example package: hello
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#
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# CONFIG_PKG_USING_HELLO is not set
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# CONFIG_PKG_USING_MULTIBUTTON is not set
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CONFIG_RT_USING_EXT_SDRAM=y
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CONFIG_RT_USING_UART1=y
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# CONFIG_RT_USING_UART2 is not set
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@ -56,9 +56,8 @@ void rt_init_thread_entry(void* parameter)
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}
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#endif
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#ifdef RT_USING_FINSH
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finsh_system_init();
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#endif
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rt_components_init();
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}
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int rt_application_init()
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@ -10,6 +10,7 @@ board.c
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stm32f4xx_it.c
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usart.c
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drv_sdram.c
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drv_lcd.c
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""")
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CPPPATH = [cwd]
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@ -15,11 +15,16 @@
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#include <rthw.h>
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#include <rtthread.h>
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#ifdef PKG_USING_GUIENGINE
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#include <rtgui/driver.h>
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#endif
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#include "stm32f4xx.h"
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#include "board.h"
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#include "usart.h"
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#include "stm32f4xx_hal.h"
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void _init(void)
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{
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@ -133,6 +138,10 @@ void HAL_Delay(__IO uint32_t Delay)
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*/
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void rt_hw_board_init()
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{
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#ifdef PKG_USING_GUIENGINE
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rt_device_t lcd;
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#endif
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HAL_Init();
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SystemClock_Config();
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@ -146,6 +155,12 @@ void rt_hw_board_init()
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(CONSOLE_DEVICE);
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#endif
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#ifdef PKG_USING_GUIENGINE
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lcd = rt_device_find("lcd");
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rtgui_graphic_set_device(lcd);
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#endif
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}
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/*@}*/
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1060
bsp/stm32f429-disco/drivers/drv_lcd.c
Normal file
1060
bsp/stm32f429-disco/drivers/drv_lcd.c
Normal file
File diff suppressed because it is too large
Load Diff
178
bsp/stm32f429-disco/drivers/drv_lcd.h
Normal file
178
bsp/stm32f429-disco/drivers/drv_lcd.h
Normal file
@ -0,0 +1,178 @@
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#ifndef __DRV_LCD_H__
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#define __DRV_LCD_H__
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#include <rtdevice.h>
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#include "stm32f4xx_hal.h"
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#define ILI9341_HSYNC ((uint32_t)9) /* Horizontal synchronization */
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#define ILI9341_HBP ((uint32_t)29) /* Horizontal back porch */
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#define ILI9341_HFP ((uint32_t)2) /* Horizontal front porch */
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#define ILI9341_VSYNC ((uint32_t)1) /* Vertical synchronization */
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#define ILI9341_VBP ((uint32_t)3) /* Vertical back porch */
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#define ILI9341_VFP ((uint32_t)2) /* Vertical front porch */
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/**
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* @brief ILI9341 Registers
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*/
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/* Level 1 Commands */
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#define LCD_SWRESET 0x01 /* Software Reset */
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#define LCD_READ_DISPLAY_ID 0x04 /* Read display identification information */
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#define LCD_RDDST 0x09 /* Read Display Status */
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#define LCD_RDDPM 0x0A /* Read Display Power Mode */
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#define LCD_RDDMADCTL 0x0B /* Read Display MADCTL */
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#define LCD_RDDCOLMOD 0x0C /* Read Display Pixel Format */
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#define LCD_RDDIM 0x0D /* Read Display Image Format */
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#define LCD_RDDSM 0x0E /* Read Display Signal Mode */
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#define LCD_RDDSDR 0x0F /* Read Display Self-Diagnostic Result */
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#define LCD_SPLIN 0x10 /* Enter Sleep Mode */
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#define LCD_SLEEP_OUT 0x11 /* Sleep out register */
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#define LCD_PTLON 0x12 /* Partial Mode ON */
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#define LCD_NORMAL_MODE_ON 0x13 /* Normal Display Mode ON */
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#define LCD_DINVOFF 0x20 /* Display Inversion OFF */
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#define LCD_DINVON 0x21 /* Display Inversion ON */
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#define LCD_GAMMA 0x26 /* Gamma register */
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#define LCD_DISPLAY_OFF 0x28 /* Display off register */
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#define LCD_DISPLAY_ON 0x29 /* Display on register */
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#define LCD_COLUMN_ADDR 0x2A /* Colomn address register */
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#define LCD_PAGE_ADDR 0x2B /* Page address register */
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#define LCD_GRAM 0x2C /* GRAM register */
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#define LCD_RGBSET 0x2D /* Color SET */
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#define LCD_RAMRD 0x2E /* Memory Read */
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#define LCD_PLTAR 0x30 /* Partial Area */
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#define LCD_VSCRDEF 0x33 /* Vertical Scrolling Definition */
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#define LCD_TEOFF 0x34 /* Tearing Effect Line OFF */
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#define LCD_TEON 0x35 /* Tearing Effect Line ON */
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#define LCD_MAC 0x36 /* Memory Access Control register*/
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#define LCD_VSCRSADD 0x37 /* Vertical Scrolling Start Address */
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#define LCD_IDMOFF 0x38 /* Idle Mode OFF */
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#define LCD_IDMON 0x39 /* Idle Mode ON */
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#define LCD_PIXEL_FORMAT 0x3A /* Pixel Format register */
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#define LCD_WRITE_MEM_CONTINUE 0x3C /* Write Memory Continue */
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#define LCD_READ_MEM_CONTINUE 0x3E /* Read Memory Continue */
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#define LCD_SET_TEAR_SCANLINE 0x44 /* Set Tear Scanline */
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#define LCD_GET_SCANLINE 0x45 /* Get Scanline */
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#define LCD_WDB 0x51 /* Write Brightness Display register */
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#define LCD_RDDISBV 0x52 /* Read Display Brightness */
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#define LCD_WCD 0x53 /* Write Control Display register*/
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#define LCD_RDCTRLD 0x54 /* Read CTRL Display */
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#define LCD_WRCABC 0x55 /* Write Content Adaptive Brightness Control */
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#define LCD_RDCABC 0x56 /* Read Content Adaptive Brightness Control */
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#define LCD_WRITE_CABC 0x5E /* Write CABC Minimum Brightness */
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#define LCD_READ_CABC 0x5F /* Read CABC Minimum Brightness */
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#define LCD_READ_ID1 0xDA /* Read ID1 */
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#define LCD_READ_ID2 0xDB /* Read ID2 */
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#define LCD_READ_ID3 0xDC /* Read ID3 */
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/* Level 2 Commands */
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#define LCD_RGB_INTERFACE 0xB0 /* RGB Interface Signal Control */
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#define LCD_FRMCTR1 0xB1 /* Frame Rate Control (In Normal Mode) */
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#define LCD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle Mode) */
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#define LCD_FRMCTR3 0xB3 /* Frame Rate Control (In Partial Mode) */
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#define LCD_INVTR 0xB4 /* Display Inversion Control */
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#define LCD_BPC 0xB5 /* Blanking Porch Control register */
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#define LCD_DFC 0xB6 /* Display Function Control register */
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#define LCD_ETMOD 0xB7 /* Entry Mode Set */
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#define LCD_BACKLIGHT1 0xB8 /* Backlight Control 1 */
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#define LCD_BACKLIGHT2 0xB9 /* Backlight Control 2 */
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#define LCD_BACKLIGHT3 0xBA /* Backlight Control 3 */
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#define LCD_BACKLIGHT4 0xBB /* Backlight Control 4 */
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#define LCD_BACKLIGHT5 0xBC /* Backlight Control 5 */
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#define LCD_BACKLIGHT7 0xBE /* Backlight Control 7 */
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#define LCD_BACKLIGHT8 0xBF /* Backlight Control 8 */
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#define LCD_POWER1 0xC0 /* Power Control 1 register */
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#define LCD_POWER2 0xC1 /* Power Control 2 register */
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#define LCD_VCOM1 0xC5 /* VCOM Control 1 register */
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#define LCD_VCOM2 0xC7 /* VCOM Control 2 register */
|
||||
#define LCD_NVMWR 0xD0 /* NV Memory Write */
|
||||
#define LCD_NVMPKEY 0xD1 /* NV Memory Protection Key */
|
||||
#define LCD_RDNVM 0xD2 /* NV Memory Status Read */
|
||||
#define LCD_READ_ID4 0xD3 /* Read ID4 */
|
||||
#define LCD_PGAMMA 0xE0 /* Positive Gamma Correction register */
|
||||
#define LCD_NGAMMA 0xE1 /* Negative Gamma Correction register */
|
||||
#define LCD_DGAMCTRL1 0xE2 /* Digital Gamma Control 1 */
|
||||
#define LCD_DGAMCTRL2 0xE3 /* Digital Gamma Control 2 */
|
||||
#define LCD_INTERFACE 0xF6 /* Interface control register */
|
||||
|
||||
/* Extend register commands */
|
||||
#define LCD_POWERA 0xCB /* Power control A register */
|
||||
#define LCD_POWERB 0xCF /* Power control B register */
|
||||
#define LCD_DTCA 0xE8 /* Driver timing control A */
|
||||
#define LCD_DTCB 0xEA /* Driver timing control B */
|
||||
#define LCD_POWER_SEQ 0xED /* Power on sequence register */
|
||||
#define LCD_3GAMMA_EN 0xF2 /* 3 Gamma enable register */
|
||||
#define LCD_PRC 0xF7 /* Pump ratio control register */
|
||||
|
||||
/* Size of read registers */
|
||||
#define LCD_READ_ID4_SIZE 3 /* Size of Read ID4 */
|
||||
|
||||
#define ABS(X) ((X) > 0 ? (X) : -(X))
|
||||
|
||||
#define CSX_Pin GPIO_PIN_2
|
||||
#define CSX_GPIO_Port GPIOC
|
||||
#define RDX_Pin GPIO_PIN_12
|
||||
#define RDX_GPIO_Port GPIOD
|
||||
#define WRX_DCX_Pin GPIO_PIN_13
|
||||
#define WRX_DCX_GPIO_Port GPIOD
|
||||
|
||||
/* Chip Select macro definition */
|
||||
#define LCD_CS_LOW() HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_RESET)
|
||||
#define LCD_CS_HIGH() HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_SET)
|
||||
|
||||
/* Set WRX High to send data */
|
||||
#define LCD_WRX_LOW() HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_RESET)
|
||||
#define LCD_WRX_HIGH() HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_SET)
|
||||
|
||||
/* Set WRX High to send data */
|
||||
#define LCD_RDX_LOW() HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_RESET)
|
||||
#define LCD_RDX_HIGH() HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_SET)
|
||||
|
||||
/**
|
||||
* @brief LCD Control pin
|
||||
*/
|
||||
#define LCD_NCS_PIN GPIO_PIN_2
|
||||
#define LCD_NCS_GPIO_PORT GPIOC
|
||||
#define LCD_NCS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
#define LCD_NCS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @brief LCD Command/data pin
|
||||
*/
|
||||
#define LCD_WRX_PIN GPIO_PIN_13
|
||||
#define LCD_WRX_GPIO_PORT GPIOD
|
||||
#define LCD_WRX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
|
||||
#define LCD_WRX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
|
||||
|
||||
#define LCD_RDX_PIN GPIO_PIN_12
|
||||
#define LCD_RDX_GPIO_PORT GPIOD
|
||||
#define LCD_RDX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
|
||||
#define LCD_RDX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
|
||||
|
||||
/*############################### SPIx #######################################*/
|
||||
#define DISCOVERY_SPIx SPI5
|
||||
#define DISCOVERY_SPIx_CLK_ENABLE() __HAL_RCC_SPI5_CLK_ENABLE()
|
||||
#define DISCOVERY_SPIx_GPIO_PORT GPIOF /* GPIOF */
|
||||
#define DISCOVERY_SPIx_AF GPIO_AF5_SPI5
|
||||
#define DISCOVERY_SPIx_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define DISCOVERY_SPIx_GPIO_CLK_DISABLE() __HAL_RCC_GPIOF_CLK_DISABLE()
|
||||
#define DISCOVERY_SPIx_SCK_PIN GPIO_PIN_7 /* PF.07 */
|
||||
#define DISCOVERY_SPIx_MISO_PIN GPIO_PIN_8 /* PF.08 */
|
||||
#define DISCOVERY_SPIx_MOSI_PIN GPIO_PIN_9 /* PF.09 */
|
||||
/* Maximum Timeout values for flags waiting loops. These timeouts are not based
|
||||
on accurate values, they just guarantee that the application will not remain
|
||||
stuck if the SPI communication is corrupted.
|
||||
You may modify these timeout values depending on CPU frequency and application
|
||||
conditions (interrupts routines ...). */
|
||||
#define SPIx_TIMEOUT_MAX ((uint32_t)0x1000)
|
||||
|
||||
int rt_lcd_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@ -25,7 +25,7 @@
|
||||
#include <board.h>
|
||||
|
||||
|
||||
#define SDRAM_BANK_ADDR ((uint32_t)0xD0000000)
|
||||
#define SDRAM_BANK_ADDR ((uint32_t)0xD0030000) /*0xD0000000-0xD002FFFF used for LCD framebuffer*/
|
||||
|
||||
/* #define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_8 */
|
||||
#define SDRAM_MEMORY_WIDTH FMC_SDRAM_MEM_BUS_WIDTH_16
|
||||
|
||||
@ -68,12 +68,12 @@
|
||||
/* #define HAL_I2C_MODULE_ENABLED */
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
#define HAL_LTDC_MODULE_ENABLED
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
/* #define HAL_RTC_MODULE_ENABLED */
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
/* #define HAL_SPI_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
/* #define HAL_TIM_MODULE_ENABLED */
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,12 +1,79 @@
|
||||
board info:
|
||||
STM32F429I-DISC1
|
||||
http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/32f429idiscovery.html
|
||||
# STM32F429-DISCO
|
||||
|
||||
note:
|
||||
in drivers/stm32f4xx_conf.h
|
||||
/* Redefine the HSE value; it's equal to 8 MHz on the STM32F429I-DISC1 Kit */
|
||||
#define HSE_VALUE ((uint32_t)8000000)
|
||||
## 1. 简介
|
||||
|
||||
STM32F429I-DISCOVERY 开发板使用高性能 MCU STM32F429，可以用于实现高级图形用户界面。
|
||||
本 BSP 兼容 STM32F429I-DISCO 和 STM32F429I-DISC1 两个版本的 DISCOVERY 开发板。
|
||||
|
||||
核心板板载主要资源如下：
|
||||
|
||||
| 硬件 | 描述 |
|
||||
| -- | -- |
|
||||
|芯片型号| STM32F429ZIT6 |
|
||||
|CPU| ARM Cortex-M4F |
|
||||
|主频| 180MHz |
|
||||
|片内 SRAM| 256KB |
|
||||
|片外 SDRAM| 64-Mbit SDRAM |
|
||||
|片内 Flash| 2MB |
|
||||
|显示设备| 2.4" QVGA TFT LCD|
|
||||
|运动传感器| L3GD20 |
|
||||
|LED| 6 个 |
|
||||
|按键| 2 个 |
|
||||
|
||||
## 2. 编译说明
|
||||
|
||||
STM32F429-DISCO 板级包支持 MDK4﹑MDK5﹑IAR 开发环境和 GCC 编译器，以下是具体版本信息：
|
||||
|
||||
| IDE/编译器 | 已测试版本 |
|
||||
| ---------- | ---------------------------- |
|
||||
| MDK4 | MDK4.74 |
|
||||
| MDK5 | MDK V5.25.2.0 |
|
||||
| IAR | 未测试 |
|
||||
| GCC | GCC 5.4.1 20160919 (release) |
|
||||
|
||||
## 3. 烧写及执行
|
||||
|
||||
供电方式：使用 Mini USB 线连接电脑和板子的 USB ST-LINK 口。
|
||||
|
||||
串口连接：STM32F429I-DISC1 版本的开发板的板载调试器为 ST-LINK/V2-B，支持 VCP 虚拟串口，所以可以直接使用虚拟串口输出默认控制台设备 USART1。
|
||||
|
||||
老版本的 STM32F429I-DISCO 开发板需要从板子上的引脚外接串口，并更改控制台设备到相应 USART。
|
||||
|
||||
在PC上使用终端软件以115200-N-8-1的配置方式连接到对应的COM设备上。
|
||||
|
||||
STM32F429-DISCO/DISC1 使用板载编程器下载程序。
|
||||
|
||||
### 3.1 运行结果
|
||||
|
||||
如果编译 & 烧写无误，当复位设备后，会在串口上看到 RT-Thread 的启动 logo 信息：
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 3.1.0 build Aug 31 2018
|
||||
2006 - 2018 Copyright by rt-thread team
|
||||
finsh />
|
||||
|
||||
```
|
||||
|
||||
## 4. 驱动支持情况及计划
|
||||
|
||||
| 驱动 | 支持情况 | 备注 |
|
||||
| ------ | ---- | :------: |
|
||||
| USART | 支持 | USART1/2/3 |
|
||||
| SPI | 支持 | |
|
||||
| LCD | 支持 | 支持 FrameBuffer 模式 LCD 显示 |
|
||||
| SDRAM | 支持 | |
|
||||
| GPIO | 未支持 | |
|
||||
| IIC | 未支持 | |
|
||||
| L3GD20 | 未支持 | |
|
||||
| USB OTG | 未支持 | |
|
||||
|
||||
|
||||
**TODO**
|
||||
auto add *.icf by scons script
|
||||
## 5. 联系人信息
|
||||
|
||||
维护人：[xuzhuoyi](https://github.com/xuzhuoyi)
|
||||
|
||||
## 6. 参考
|
||||
|
||||
* [板子相关资料](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/32f429idiscovery.html)
|
||||
|
||||
@ -8,18 +8,14 @@
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
/* RT_THREAD_PRIORITY_8 is not set */
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
/* RT_THREAD_PRIORITY_256 is not set */
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
#define RT_DEBUG
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_DEBUG_INIT 1
|
||||
#define RT_DEBUG_THREAD 0
|
||||
#define RT_USING_HOOK
|
||||
#define RT_IDEL_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 1024
|
||||
/* RT_USING_TIMER_SOFT is not set */
|
||||
#define RT_DEBUG
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
@ -28,36 +24,27 @@
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
/* RT_USING_SIGNALS is not set */
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
/* RT_USING_NOHEAP is not set */
|
||||
#define RT_USING_SMALL_MEM
|
||||
/* RT_USING_SLAB is not set */
|
||||
/* RT_USING_MEMHEAP_AS_HEAP is not set */
|
||||
/* RT_USING_MEMTRACE is not set */
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
/* RT_USING_INTERRUPT_INFO is not set */
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
/* RT_USING_MODULE is not set */
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
/* RT_USING_USER_MAIN is not set */
|
||||
|
||||
/* C++ features */
|
||||
|
||||
/* RT_USING_CPLUSPLUS is not set */
|
||||
|
||||
/* Command shell */
|
||||
|
||||
@ -70,139 +57,97 @@
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_CMD_SIZE 80
|
||||
/* FINSH_USING_AUTH is not set */
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
/* FINSH_USING_MSH_ONLY is not set */
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
/* RT_USING_DFS is not set */
|
||||
/* RT_DFS_ELM_USE_LFN_0 is not set */
|
||||
/* RT_DFS_ELM_USE_LFN_1 is not set */
|
||||
/* RT_DFS_ELM_USE_LFN_2 is not set */
|
||||
/* RT_DFS_ELM_USE_LFN_3 is not set */
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 2
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
/* RT_USING_CAN is not set */
|
||||
/* RT_USING_HWTIMER is not set */
|
||||
/* RT_USING_CPUTIME is not set */
|
||||
/* RT_USING_I2C is not set */
|
||||
#define RT_USING_PIN
|
||||
/* RT_USING_MTD_NOR is not set */
|
||||
/* RT_USING_MTD_NAND is not set */
|
||||
/* RT_USING_RTC is not set */
|
||||
/* RT_USING_SDIO is not set */
|
||||
/* RT_USING_SPI is not set */
|
||||
/* RT_USING_WDT is not set */
|
||||
/* RT_USING_WIFI is not set */
|
||||
|
||||
/* Using USB */
|
||||
|
||||
/* RT_USING_USB_HOST is not set */
|
||||
/* RT_USING_USB_DEVICE is not set */
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
#define RT_USING_PTHREADS
|
||||
/* HAVE_SYS_SIGNALS is not set */
|
||||
|
||||
/* Network stack */
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
/* RT_USING_LWIP is not set */
|
||||
|
||||
/* Modbus master and slave stack */
|
||||
|
||||
/* RT_USING_MODBUS is not set */
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
/* RT_USING_VBUS is not set */
|
||||
|
||||
/* Utilities */
|
||||
|
||||
/* RT_USING_LOGTRACE is not set */
|
||||
/* RT_USING_RYM is not set */
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* RT-Thread GUI Engine */
|
||||
|
||||
/* PKG_USING_GUIENGINE is not set */
|
||||
/* PKG_USING_LWEXT4 is not set */
|
||||
/* PKG_USING_PARTITION is not set */
|
||||
/* PKG_USING_SQLITE is not set */
|
||||
/* PKG_USING_RTI is not set */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
/* PKG_USING_PAHOMQTT is not set */
|
||||
/* PKG_USING_WEBCLIENT is not set */
|
||||
/* PKG_USING_MONGOOSE is not set */
|
||||
/* PKG_USING_WEBTERMINAL is not set */
|
||||
/* PKG_USING_CJSON is not set */
|
||||
/* PKG_USING_LJSON is not set */
|
||||
/* PKG_USING_EZXML is not set */
|
||||
/* PKG_USING_NANOPB is not set */
|
||||
/* PKG_USING_GAGENT_CLOUD is not set */
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
/* PKG_USING_WLANMARVELL is not set */
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
/* PKG_USING_WLAN_WICED is not set */
|
||||
/* PKG_USING_COAP is not set */
|
||||
/* PKG_USING_NOPOLL is not set */
|
||||
/* PKG_USING_NETUTILS is not set */
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
/* PKG_USING_MBEDTLS is not set */
|
||||
/* PKG_USING_libsodium is not set */
|
||||
/* PKG_USING_TINYCRYPT is not set */
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* PKG_USING_JERRYSCRIPT is not set */
|
||||
/* PKG_USING_MICROPYTHON is not set */
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* PKG_USING_OPENMV is not set */
|
||||
|
||||
/* tools packages */
|
||||
|
||||
/* PKG_USING_CMBACKTRACE is not set */
|
||||
/* PKG_USING_EASYLOGGER is not set */
|
||||
/* PKG_USING_SYSTEMVIEW is not set */
|
||||
/* PKG_USING_IPERF is not set */
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* PKG_USING_FASTLZ is not set */
|
||||
/* PKG_USING_MINILZO is not set */
|
||||
/* PKG_USING_QUICKLZ is not set */
|
||||
|
||||
/* sample package */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* example package: hello */
|
||||
|
||||
/* PKG_USING_HELLO is not set */
|
||||
/* PKG_USING_MULTIBUTTON is not set */
|
||||
#define RT_USING_EXT_SDRAM
|
||||
#define RT_USING_UART1
|
||||
/* RT_USING_UART2 is not set */
|
||||
/* RT_USING_UART3 is not set */
|
||||
/* RT_USING_SPI5 is not set */
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user