[BSP] tm4c129x add eth driver
1. Add ETH MAC driver using DMA for Tx and Rx lwip pBuf. 2. Modify the tivaware emac library to fix the bug that PHY read is not stable when sysclk is 120MHz 3. In PHY IRQ handler, insert a dummy reading (REG_BMSR) before read PHY_STS to force update STS register.
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@ -16,6 +16,9 @@
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#include <board.h>
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#include <components.h>
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#ifdef RT_USING_LWIP
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#include "drv_eth.h"
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#endif
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/* thread phase init */
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void rt_init_thread_entry(void *parameter)
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{
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@ -24,6 +27,9 @@ void rt_init_thread_entry(void *parameter)
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#ifdef RT_USING_FINSH
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finsh_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef RT_USING_LWIP
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rt_hw_tiva_eth_init();
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#endif
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}
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int rt_application_init(void)
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/*
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* File : drv_eth.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2014-07-25 ArdaFu Port to TM4C129X
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*/
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#ifndef __TIVA_ETH_H__
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#define __TIVA_ETH_H__
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rt_err_t rt_hw_tiva_eth_init(void);
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#endif
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@ -2917,6 +2917,7 @@ EMACPHYRead(uint32_t ui32Base, uint8_t ui8PhyAddr, uint8_t ui8RegAddr)
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//
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HWREG(ui32Base + EMAC_O_MIIADDR) =
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((HWREG(ui32Base + EMAC_O_MIIADDR) & EMAC_MIIADDR_CR_M) |
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EMAC_MIIADDR_CR_100_150 |
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(ui8RegAddr << EMAC_MIIADDR_MII_S) |
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(ui8PhyAddr << EMAC_MIIADDR_PLA_S) | EMAC_MIIADDR_MIIB);
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