[bsp][stm32][prefect] crypto configure and solve a problem
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@ -1,12 +1,12 @@
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config BSP_USING_CRC
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bool "Enable CRC (CRC-32 0x04C11DB7 polynomial)"
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bool "Enable CRC (CRC-32 0x04C11DB7 Polynomial)"
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select RT_USING_HWCRYPTO
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select RT_HWCRYPTO_USING_CRC
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default n
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config BSP_USING_RNG
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bool "Enable RNG"
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bool "Enable RNG (Random Number Generator)"
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select RT_USING_HWCRYPTO
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select RT_HWCRYPTO_USING_RNG
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depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F4 || SOC_SERIES_STM32F7 || \
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@ -14,7 +14,7 @@ config BSP_USING_RNG
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default n
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config BSP_USING_UDID
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bool "Enable unique device identifier"
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bool "Enable UDID (Unique Device Identifier)"
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select RT_USING_HWCRYPTO
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default n
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@ -28,7 +28,7 @@ struct hash_ctx_des
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CRC_HandleTypeDef contex;
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};
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#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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static struct hwcrypto_crc_cfg crc_backup_cfg;
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static int reverse_bit(rt_uint32_t n)
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@ -41,7 +41,7 @@ static int reverse_bit(rt_uint32_t n)
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return n;
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}
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#endif
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#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
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{
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@ -53,8 +53,8 @@ static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, r
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#endif
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rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
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#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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if (0 != memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)))
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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if (memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)) != 0)
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{
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if (HW_TypeDef->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_DISABLE)
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{
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@ -103,17 +103,16 @@ static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, r
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goto _exit;
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}
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#else
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if (ctx->crc_cfg.flags == 0 && ctx->crc_cfg.last_val == 0xFFFFFFFF && \
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ctx->crc_cfg.xorout == 0 && length % 4 != 0)
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if (ctx->crc_cfg.flags != 0 || ctx->crc_cfg.last_val != 0xFFFFFFFF || ctx->crc_cfg.xorout != 0 || length % 4 != 0)
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{
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goto _exit;
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}
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length >>= 2;
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#endif
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length /= 4;
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#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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result = HAL_CRC_Accumulate(ctx->parent.contex, (rt_uint32_t *)in, length);
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#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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if (HW_TypeDef->Init.OutputDataInversionMode)
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{
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ctx ->crc_cfg.last_val = reverse_bit(result);
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@ -124,7 +123,7 @@ static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, r
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}
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crc_backup_cfg.last_val = ctx ->crc_cfg.last_val;
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result = (result ? result ^ (ctx ->crc_cfg.xorout) : result);
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#endif
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#endif /* defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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_exit:
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rt_mutex_release(&stm32_hw_dev->mutex);
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@ -190,7 +189,7 @@ static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
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}
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hcrc->Instance = CRC;
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#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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hcrc->Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
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hcrc->Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE;
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hcrc->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
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@ -201,7 +200,7 @@ static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
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{
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res = -RT_ERROR;
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}
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#endif
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#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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ctx->contex = hcrc;
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((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
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break;
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