[bsp][stm32l476-nucleo] format code
This commit is contained in:
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fb539cfdc8
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3191bf8a15
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@ -21,9 +21,12 @@
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* Date Author Notes
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* 2018-05-14 ZYH first implementation
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*/
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#include <stdio.h>
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int main(void)
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{
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printf("Hello RT-Thread\n");
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return 0;
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}
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@ -21,75 +21,75 @@
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* Date Author Notes
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* 2018-05-14 ZYH first implementation
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*/
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#include <stdint.h>
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#include <rthw.h>
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#include <rtthread.h>
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#include "board.h"
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#ifdef BSP_USING_HSI
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#error Can not using HSI on this bsp
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#endif
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static void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_PeriphCLKInitTypeDef PeriphClkInit;
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_PeriphCLKInitTypeDef PeriphClkInit;
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = 0;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
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RCC_OscInitStruct.PLL.PLLM = 1;
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RCC_OscInitStruct.PLL.PLLN = 40;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = 0;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
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RCC_OscInitStruct.PLL.PLLM = 1;
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RCC_OscInitStruct.PLL.PLLN = 40;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2
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|RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_UART4
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|RCC_PERIPHCLK_UART5|RCC_PERIPHCLK_LPUART1
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|RCC_PERIPHCLK_USB;
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PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
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PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
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PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
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PeriphClkInit.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1;
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PeriphClkInit.Uart5ClockSelection = RCC_UART5CLKSOURCE_PCLK1;
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PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
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PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
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PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI;
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PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
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PeriphClkInit.PLLSAI1.PLLSAI1N = 24;
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PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
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PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
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PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
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PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2
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| RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4
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| RCC_PERIPHCLK_UART5 | RCC_PERIPHCLK_LPUART1
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| RCC_PERIPHCLK_USB;
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PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
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PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
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PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
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PeriphClkInit.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1;
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PeriphClkInit.Uart5ClockSelection = RCC_UART5CLKSOURCE_PCLK1;
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PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
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PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
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PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI;
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PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
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PeriphClkInit.PLLSAI1.PLLSAI1N = 24;
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PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
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PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
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PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
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PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
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/**Configure the main internal regulator output voltage
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*/
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HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
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HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
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}
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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@ -157,6 +157,7 @@ void HAL_MspInit(void)
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/* PendSV_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
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}
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/**
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* This function will initial STM32 board.
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*/
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@ -479,6 +479,7 @@ struct pin_irq_map
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rt_uint16_t pinbit;
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IRQn_Type irqno;
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};
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static const struct pin_irq_map pin_irq_map[] =
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{
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{GPIO_PIN_0, EXTI0_IRQn},
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{GPIO_PIN_14, EXTI15_10_IRQn},
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{GPIO_PIN_15, EXTI15_10_IRQn},
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};
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struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
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{
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{-1, 0, RT_NULL, RT_NULL},
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HAL_GPIO_Init(index->gpio, &GPIO_InitStruct);
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}
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rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
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{
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int i;
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}
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return -1;
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}
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rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
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{
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rt_int32_t mapindex = bit2bitno(pinbit);
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}
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return &pin_irq_map[mapindex];
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};
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rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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rt_uint32_t mode, void (*hdr)(void *args), void *args)
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{
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return RT_EOK;
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}
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rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
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{
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const struct pin_index *index;
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return RT_EOK;
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}
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rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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rt_uint32_t enabled)
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{
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return RT_EOK;
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}
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const static struct rt_pin_ops _stm32_pin_ops =
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{
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stm32_pin_mode,
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
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rt_interrupt_leave();
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}
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void EXTI1_IRQHandler(void)
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{
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rt_interrupt_enter();
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
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rt_interrupt_leave();
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}
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void EXTI2_IRQHandler(void)
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{
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rt_interrupt_enter();
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
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rt_interrupt_leave();
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}
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void EXTI3_IRQHandler(void)
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{
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rt_interrupt_enter();
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
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rt_interrupt_leave();
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}
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void EXTI4_IRQHandler(void)
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{
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rt_interrupt_enter();
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
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rt_interrupt_leave();
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}
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void EXTI9_5_IRQHandler(void)
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{
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rt_interrupt_enter();
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
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rt_interrupt_leave();
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}
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void EXTI15_10_IRQHandler(void)
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{
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rt_interrupt_enter();
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@ -24,11 +24,13 @@
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* 2016-01-15 ArdaFu the first version for stm32f4xx with STM32 HAL
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* 2016-01-15 zyh the first version for stm32f401rc with STM32 HAL
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*/
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#include "drv_usart.h"
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#include "board.h"
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#include <rtdevice.h>
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#include <rthw.h>
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#include <rtthread.h>
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/* STM32 uart driver */
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struct drv_uart
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{
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struct serial_configure *cfg)
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{
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struct drv_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = (struct drv_uart *)serial->parent.user_data;
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uart->UartHandle.Init.BaudRate = cfg->baud_rate;
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uart->UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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uart->UartHandle.Init.Mode = UART_MODE_TX_RX;
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uart->UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
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uart->UartHandle.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
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switch (cfg->data_bits)
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{
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case DATA_BITS_8:
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uart->UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
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break;
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}
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switch (cfg->stop_bits)
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{
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case STOP_BITS_1:
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uart->UartHandle.Init.StopBits = UART_STOPBITS_1;
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break;
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}
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switch (cfg->parity)
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{
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case PARITY_NONE:
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uart->UartHandle.Init.Parity = UART_PARITY_NONE;
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break;
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}
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if (HAL_UART_Init(&uart->UartHandle) != HAL_OK)
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{
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return RT_ERROR;
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}
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return RT_EOK;
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}
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int cmd, void *arg)
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{
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struct drv_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct drv_uart *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable interrupt */
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__HAL_UART_DISABLE_IT(&uart->UartHandle, UART_IT_RXNE);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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HAL_NVIC_SetPriority(uart->irq, 5, 0);
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__HAL_UART_ENABLE_IT(&uart->UartHandle, UART_IT_RXNE);
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break;
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}
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return RT_EOK;
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}
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static int drv_putc(struct rt_serial_device *serial, char c)
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{
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struct drv_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct drv_uart *)serial->parent.user_data;
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while ((__HAL_UART_GET_FLAG(&uart->UartHandle, UART_FLAG_TXE) == RESET));
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uart->UartHandle.Instance->TDR = c;
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return 1;
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}
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{
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int ch;
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struct drv_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct drv_uart *)serial->parent.user_data;
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ch = -1;
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if (__HAL_UART_GET_FLAG(&uart->UartHandle, UART_FLAG_RXNE) != RESET)
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ch = uart->UartHandle.Instance->RDR & 0xff;
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return ch;
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}
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