From 311f4c96ddb686d5da54391aa8a13467fd31bdb6 Mon Sep 17 00:00:00 2001 From: liang yongxiang Date: Thu, 1 Mar 2018 21:01:23 +0800 Subject: [PATCH] [bsp] add v2m-msp2 board support --- bsp/v2m-mps2/.config | 260 ++++++++ bsp/v2m-mps2/Dbg_MPS2.ini | 17 + bsp/v2m-mps2/Kconfig | 35 ++ bsp/v2m-mps2/README.md | 84 +++ bsp/v2m-mps2/SConscript | 14 + bsp/v2m-mps2/SConstruct | 47 ++ bsp/v2m-mps2/applications/SConscript | 17 + bsp/v2m-mps2/applications/main.c | 32 + bsp/v2m-mps2/drivers/SConscript | 16 + bsp/v2m-mps2/drivers/board.c | 71 +++ bsp/v2m-mps2/drivers/board.h | 33 + bsp/v2m-mps2/drivers/drv_uart.c | 362 +++++++++++ bsp/v2m-mps2/project.uvoptx | 900 +++++++++++++++++++++++++++ bsp/v2m-mps2/project.uvprojx | 728 ++++++++++++++++++++++ bsp/v2m-mps2/rtconfig.h | 226 +++++++ bsp/v2m-mps2/rtconfig.py | 54 ++ bsp/v2m-mps2/rtthread-v2m-mps2.sct | 26 + bsp/v2m-mps2/template.uvoptx | 244 ++++++++ bsp/v2m-mps2/template.uvprojx | 443 +++++++++++++ 19 files changed, 3609 insertions(+) create mode 100644 bsp/v2m-mps2/.config create mode 100644 bsp/v2m-mps2/Dbg_MPS2.ini create mode 100644 bsp/v2m-mps2/Kconfig create mode 100644 bsp/v2m-mps2/README.md create mode 100644 bsp/v2m-mps2/SConscript create mode 100644 bsp/v2m-mps2/SConstruct create mode 100644 bsp/v2m-mps2/applications/SConscript create mode 100644 bsp/v2m-mps2/applications/main.c create mode 100644 bsp/v2m-mps2/drivers/SConscript create mode 100644 bsp/v2m-mps2/drivers/board.c create mode 100644 bsp/v2m-mps2/drivers/board.h create mode 100644 bsp/v2m-mps2/drivers/drv_uart.c create mode 100644 bsp/v2m-mps2/project.uvoptx create mode 100644 bsp/v2m-mps2/project.uvprojx create mode 100644 bsp/v2m-mps2/rtconfig.h create mode 100644 bsp/v2m-mps2/rtconfig.py create mode 100644 bsp/v2m-mps2/rtthread-v2m-mps2.sct create mode 100644 bsp/v2m-mps2/template.uvoptx create mode 100644 bsp/v2m-mps2/template.uvprojx diff --git a/bsp/v2m-mps2/.config b/bsp/v2m-mps2/.config new file mode 100644 index 0000000000..c64c468dc6 --- /dev/null +++ b/bsp/v2m-mps2/.config @@ -0,0 +1,260 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=100 +CONFIG_RT_DEBUG=y +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_DEBUG_INIT=0 +CONFIG_RT_DEBUG_THREAD=0 +CONFIG_RT_USING_HOOK=y +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +# CONFIG_RT_USING_MEMPOOL is not set +CONFIG_RT_USING_MEMHEAP=y +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_SMALL_MEM is not set +# CONFIG_RT_USING_SLAB is not set +CONFIG_RT_USING_MEMHEAP_AS_HEAP=y +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" +# CONFIG_RT_USING_MODULE is not set +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M7=y + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_USING_DESCRIPTION=y +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +# CONFIG_FINSH_USING_MSH_DEFAULT is not set +# CONFIG_FINSH_USING_MSH_ONLY is not set + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_USING_SERIAL=y +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PIN is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +CONFIG_RT_USING_LIBC=y +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network stack +# + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# Modbus master and slave stack +# +# CONFIG_RT_USING_MODBUS is not set + +# +# RT-Thread UI Engine +# +# CONFIG_RT_USING_GUIENGINE is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_LOGTRACE is not set +# CONFIG_RT_USING_RYM is not set + +# +# ARM CMSIS +# +# CONFIG_RT_USING_CMSIS_OS is not set +# CONFIG_RT_USING_RTT_CMSIS is not set + +# +# RT-Thread online packages +# + +# +# system packages +# +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_COAP is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set + +# +# language packages +# +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_IPERF is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set + +# +# example package: hello +# +# CONFIG_PKG_USING_HELLO is not set + +# +# Privated Packages of RealThread +# +# CONFIG_PKG_USING_CODEC is not set +# CONFIG_PKG_USING_PLAYER is not set +# CONFIG_PKG_USING_PERSIMMON_SRC is not set + +# +# Network Utilities +# +# CONFIG_PKG_USING_WLAN_WICED_SRC is not set + +# +# Cloudsdk: RT_thread IOT Cloudsdk +# +# CONFIG_PKG_USING_CLOUDSDK is not set + +# +# Webnet: A web server package for rt-thread +# +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_POWER_MANAGER is not set +CONFIG_SOC_V2M_MPS2=y +CONFIG_RT_USING_UART=y +CONFIG_RT_USING_UART0=y diff --git a/bsp/v2m-mps2/Dbg_MPS2.ini b/bsp/v2m-mps2/Dbg_MPS2.ini new file mode 100644 index 0000000000..45f2c2862c --- /dev/null +++ b/bsp/v2m-mps2/Dbg_MPS2.ini @@ -0,0 +1,17 @@ +/*---------------------------------------------------------------------------- + * Name: Dbg_MPS2.ini + * Purpose: MPS2 Debug Initialization File + * Note(s): + *---------------------------------------------------------------------------- + * This file is part of the uVision/ARM development tools. + * This software may only be used under the terms of a valid, current, + * end user licence from KEIL for a compatible version of KEIL software + * development tools. Nothing else gives you the right to use this software. + * + * This software is supplied "AS IS" without warranties of any kind. + * + * Copyright (c) 2013 Keil - An ARM Company. All rights reserved. + *----------------------------------------------------------------------------*/ + +_WDWORD(0x4001F000, 0x00000001); // Remap on + diff --git a/bsp/v2m-mps2/Kconfig b/bsp/v2m-mps2/Kconfig new file mode 100644 index 0000000000..6c22b3b898 --- /dev/null +++ b/bsp/v2m-mps2/Kconfig @@ -0,0 +1,35 @@ +mainmenu "RT-Thread Configuration" + +config $BSP_DIR + string + option env="BSP_ROOT" + default "." + +config $RTT_DIR + string + option env="RTT_ROOT" + default "../.." + +config $PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" + +config SOC_V2M_MPS2 + bool + select ARCH_ARM_CORTEX_M7 + default y + +config RT_USING_UART + bool "Using RT_USING_UART" + default y + +if RT_USING_UART +config RT_USING_UART0 + bool "Using RT_USING_UART0" + default y +endif + diff --git a/bsp/v2m-mps2/README.md b/bsp/v2m-mps2/README.md new file mode 100644 index 0000000000..8e37d86dc3 --- /dev/null +++ b/bsp/v2m-mps2/README.md @@ -0,0 +1,84 @@ +# V2M-MPS2 + +标签： 板级支持包文档 + +## 1. 简介 + +[说明硬件平台的基本情况，包括芯片情况，频率，RAM空间，Flash空间等，最好也提供一份照片图。资源介绍覆盖bsp相关的以及板子亮点情况就可以了，不需要完整] + +[V2M-MPS2](https://www.keil.com/boards2/arm/v2m_mps2/)是MDK提供的开发板，配合**Fast Models Debugger**，就可以不依赖任何硬件，在Cortexm-M平台调试代码。板载主要资源如下： + +| 硬件 | 描述 | +| -- | -- | +|CPU| 可选Cortex-M0/M0 plus/M3/M4/M7/M23/M33 | +|主频| 50MHz | +|SRAM| 4MB | +|Flash| 4MB | + +## 2. 编译说明 + +V2M-MPS2板级包支持MDK5（已测试MDK5.23~MDK5.25可以） + +## 3. 烧写及执行 + +### 3.1 配置和仿真 + +因为Fast Models Debugger的串口功能是通过telnet实现的，所以首先需要打开Windows的telnet功能： + +- [Windows 7: Enabling Telnet Client](https://social.technet.microsoft.com/wiki/contents/articles/910.windows-7-enabling-telnet-client.aspx) + +- [Windows 10: Enabling Telnet Client](https://social.technet.microsoft.com/wiki/contents/articles/38433.windows-10-enabling-telnet-client.aspx) + 打开project.uvprojx，编译，点击Debug->Start/Stop Seccion就可以进入仿真了。 + +### 3.2 如何选择其他内核 + +Fast Models Debugger支持Cortex M全系列内核。如果想切换成其他内核，需要完成一些配置，下面以Cortex M4为例： + +- 修改bsp\v2m-mps2\rtconfig.py里的 CPU="cortex-m7"为CPU="cortex-m4" +- 点击Project->Option for Target 'RT-Thread V2M-MPS2'： + - 在Device里选择ARM选项下需要的内核CMSDK_CM4 + - 在Debug里选择Models Cortex-M Debugger，点击Settings： + - 在Command里选择Cortex-M4的exe：FVP_MPS2_Cortex-M4_MDK.exe + - 在Target里选择armcortexm4ct + +### 3.2 运行结果 + +进入仿真后全速运行，会在telnet窗口上看到RT-Thread的启动logo信息： + +```bash + \ | / +- RT - Thread Operating System + / | \ 3.0.3 build Feb 28 2018 + 2006 - 2017 Copyright by rt-thread team +finsh /> + +``` + +## 4. 驱动支持情况及计划 + +[片内外设可以说，片外的说重点不要求完整] + +| 驱动 | 支持情况 | 备注 | +| ------ | ---- | :------: | +| UART | 支持 | UART0/1/2/3 | +| GPIO | 未支持 | | +| LED | 未支持 | | +| BUTTOM | 未支持 | | +| LCD | 未支持 | 需要完成LCD驱动和TOUCH驱动 | + + +### 4.1 IO在板级支持包中的映射情况（需补充） + +| IO号 | 板级包中的定义 | +| -- | -- | +| | LED0 | + +## 5. 联系人信息 + +维护人：[tanek](https://github.com/TanekLiang) + +## 6. 参考 + +* [V2M-MPS2](https://www.keil.com/boards2/arm/v2m_mps2/) +* [Fast Models Debugger](http://www.keil.com/support/man/docs/fstmdls/default.htm) + diff --git a/bsp/v2m-mps2/SConscript b/bsp/v2m-mps2/SConscript new file mode 100644 index 0000000000..fe0ae941ae --- /dev/null +++ b/bsp/v2m-mps2/SConscript @@ -0,0 +1,14 @@ +# for module compiling +import os +Import('RTT_ROOT') + +cwd = str(Dir('#')) +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/v2m-mps2/SConstruct b/bsp/v2m-mps2/SConstruct new file mode 100644 index 0000000000..f2a43eb23f --- /dev/null +++ b/bsp/v2m-mps2/SConstruct @@ -0,0 +1,47 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +from building import * + +TARGET = 'rtthread-v2m-mps2.' + rtconfig.TARGET_EXT + +if rtconfig.PLATFORM == 'armcc': + env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS, + # overwrite cflags, because cflags has '--C99' + CXXCOM = '$CXX -o $TARGET --cpp -c $CXXFLAGS $_CCCOMCOM $SOURCES') +else: + env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS, + CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES') + +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map']) + +Export('RTT_ROOT') +Export('rtconfig') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/v2m-mps2/applications/SConscript b/bsp/v2m-mps2/applications/SConscript new file mode 100644 index 0000000000..7725e3b910 --- /dev/null +++ b/bsp/v2m-mps2/applications/SConscript @@ -0,0 +1,17 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +# add for startup script +if rtconfig.CROSS_TOOL == 'gcc': + CPPDEFINES = ['__START=entry'] +else: + CPPDEFINES = [] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES) + +Return('group') diff --git a/bsp/v2m-mps2/applications/main.c b/bsp/v2m-mps2/applications/main.c new file mode 100644 index 0000000000..1f1bfa712f --- /dev/null +++ b/bsp/v2m-mps2/applications/main.c @@ -0,0 +1,32 @@ +/* + * File : main.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2012, RT-Thread Development Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Change Logs: + * Date Author Notes + * 2018-03-01 Tanek the first version + */ + +#include +#include + +int main(void) +{ + return 0; +} + diff --git a/bsp/v2m-mps2/drivers/SConscript b/bsp/v2m-mps2/drivers/SConscript new file mode 100644 index 0000000000..d1ca64e4b0 --- /dev/null +++ b/bsp/v2m-mps2/drivers/SConscript @@ -0,0 +1,16 @@ +from building import * + +cwd = GetCurrentDir() + +# add the general drivers. +src = Split(""" +board.c +drv_uart.c +""") + +CPPPATH = [cwd] +CPPDEFINES = [] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES) + +Return('group') diff --git a/bsp/v2m-mps2/drivers/board.c b/bsp/v2m-mps2/drivers/board.c new file mode 100644 index 0000000000..df3f697e95 --- /dev/null +++ b/bsp/v2m-mps2/drivers/board.c @@ -0,0 +1,71 @@ +/* + * File : board.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2012, RT-Thread Development Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Change Logs: + * Date Author Notes + * 2018-03-01 Tanek the first version + */ + +#include +#include + +#include "Device.h" // Keil::Board Support:V2M-MPS2:Common + +static void *rt_heap_begin_get(void) +{ + extern int Image$$RTT_HEAP$$Base; + return &Image$$RTT_HEAP$$Base; +} + +static void *rt_heap_end_get(void) +{ + extern int Image$$RTT_HEAP$$ZI$$Limit; + return &Image$$RTT_HEAP$$ZI$$Limit; +} + +/** + * This function will initial STM32 board. + */ +void rt_hw_board_init() +{ + SystemCoreClockUpdate(); + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); /* Generate interrupt each 10 ms */ + + /* Call components board initial (use INIT_BOARD_EXPORT()) */ +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif + +#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE) + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP) + rt_system_heap_init(rt_heap_begin_get(), rt_heap_end_get()); +#endif +} + +void SysTick_Handler (void) +{ + rt_interrupt_enter(); + + rt_tick_increase(); + + rt_interrupt_leave(); +} diff --git a/bsp/v2m-mps2/drivers/board.h b/bsp/v2m-mps2/drivers/board.h new file mode 100644 index 0000000000..25b95f0cdc --- /dev/null +++ b/bsp/v2m-mps2/drivers/board.h @@ -0,0 +1,33 @@ +/* + * File : board.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2012, RT-Thread Development Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Change Logs: + * Date Author Notes + * 2018-03-01 Tanek the first version + */ + +// <<< Use Configuration Wizard in Context Menu >>> +#ifndef __BOARD_H__ +#define __BOARD_H__ + +void rt_hw_board_init(void); + +#endif + +//*** <<< end of configuration section >>> *** diff --git a/bsp/v2m-mps2/drivers/drv_uart.c b/bsp/v2m-mps2/drivers/drv_uart.c new file mode 100644 index 0000000000..944242deb8 --- /dev/null +++ b/bsp/v2m-mps2/drivers/drv_uart.c @@ -0,0 +1,362 @@ +/* + * File : drv_uart.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2012, RT-Thread Development Team + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Change Logs: + * Date Author Notes + * 2018-02-22 Tanek first version. + */ + +#include +#include + +#include + +#ifdef RT_USING_UART + +#ifndef RT_USING_DEVICE +#error "you must define RT_USING_DEVICE with uart device" +#endif + +#ifndef RT_UART_RX_BUFFER_SIZE +#define RT_UART_RX_BUFFER_SIZE 16 +#endif + +/* uart driver */ +struct fvp_uart +{ + struct rt_device parent; + CMSDK_UART_TypeDef * uart_base; + + CMSDK_GPIO_TypeDef * rx_pingpio; // Pin GPIO + CMSDK_GPIO_TypeDef * tx_pingpio; + uint8_t rx_pinnum; // Pin Number + uint8_t tx_pinnum; + + IRQn_Type uart_irq_rx; + IRQn_Type uart_irq_tx; + + /* buffer for reception */ + rt_uint8_t read_index, save_index; + rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE]; +}; + +#ifdef RT_USING_UART0 +struct fvp_uart uart0_device; +#endif + +#ifdef RT_USING_UART1 +struct fvp_uart uart1_device; +#endif + +#ifdef RT_USING_UART2 +struct fvp_uart uart2_device; +#endif + +#ifdef RT_USING_UART3 +struct fvp_uart uart3_device; +#endif + +static void uart_irq_handler(struct fvp_uart* uart) +{ + rt_ubase_t level; + uint32_t status; + uint8_t data; + + status = uart->uart_base->INTSTATUS; + data = uart->uart_base->DATA; + + /* enter interrupt */ + rt_interrupt_enter(); + + level = rt_hw_interrupt_disable(); + uart->rx_buffer[uart->save_index] = data; + uart->save_index ++; + if (uart->save_index >= RT_UART_RX_BUFFER_SIZE) + { + uart->save_index = 0; + } + rt_hw_interrupt_enable(level); + + /* invoke callback */ + if (uart->parent.rx_indicate != RT_NULL) + { + rt_size_t length; + if (uart->read_index > uart->save_index) + length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index; + else + length = uart->save_index - uart->read_index; + + uart->parent.rx_indicate(&uart->parent, length); + } + + uart->uart_base->INTCLEAR = status; + + /* leave interrupt */ + rt_interrupt_leave(); +} + +#ifdef RT_USING_UART0 +void UART0RX_Handler(void) +{ + uart_irq_handler(&uart0_device); +} +#endif + +#ifdef RT_USING_UART1 +void UART1RX_Handler(void) +{ + uart_irq_handler(&uart1_device); +} +#endif + +#ifdef RT_USING_UART2 +void UART2RX_Handler(void) +{ + uart_irq_handler(&uart2_device); +} +#endif + +#ifdef RT_USING_UART3 +void UART3RX_Handler(void) +{ + uart_irq_handler(&uart3_device); +} +#endif + +static rt_err_t rt_uart_init (rt_device_t dev) +{ + struct fvp_uart* uart; + RT_ASSERT(dev != RT_NULL); + uart = (struct fvp_uart *)dev; + + uart->rx_pingpio->ALTFUNCSET |= (1u << uart->rx_pinnum); + uart->tx_pingpio->ALTFUNCSET |= (1u << uart->tx_pinnum); + + uart->uart_base->CTRL = CMSDK_UART_CTRL_TXEN_Msk | CMSDK_UART_CTRL_RXEN_Msk | CMSDK_UART_CTRL_RXIRQEN_Msk; + uart->uart_base->BAUDDIV = SystemCoreClock / 115200; + + return RT_EOK; +} + +static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag) +{ + struct fvp_uart* uart; + RT_ASSERT(dev != RT_NULL); + uart = (struct fvp_uart *)dev; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* Enable the UART Interrupt */ + NVIC_EnableIRQ(uart->uart_irq_rx); + } + + return RT_EOK; +} + +static rt_err_t rt_uart_close(rt_device_t dev) +{ + struct fvp_uart* uart; + RT_ASSERT(dev != RT_NULL); + uart = (struct fvp_uart *)dev; + + if (dev->flag & RT_DEVICE_FLAG_INT_RX) + { + /* Disable the UART Interrupt */ + NVIC_DisableIRQ(uart->uart_irq_rx); + } + + return RT_EOK; +} + +static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + struct fvp_uart* uart = (struct fvp_uart *)dev; + rt_uint8_t *ptr; + rt_size_t length; + + RT_ASSERT(dev != RT_NULL); + RT_ASSERT(buffer != RT_NULL); + + ptr = (rt_uint8_t *) buffer; + while (size) + { + /* interrupt receive */ + rt_base_t level; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + if (uart->read_index != uart->save_index) + { + *ptr = uart->rx_buffer[uart->read_index]; + + uart->read_index ++; + if (uart->read_index >= RT_UART_RX_BUFFER_SIZE) + uart->read_index = 0; + } + else + { + /* no data in rx buffer */ + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + break; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + + ptr ++; + size --; + } + + length = (rt_uint32_t)ptr - (rt_uint32_t)buffer; + return length; +} + +static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + char *ptr = (char*) buffer; + struct fvp_uart* uart = (struct fvp_uart *)dev; + + RT_ASSERT(dev != RT_NULL); + RT_ASSERT(buffer != RT_NULL); + + if (dev->open_flag & RT_DEVICE_FLAG_STREAM) + { + /* stream mode */ + while (size) + { + if (*ptr == '\n') + { + while (uart->uart_base->STATE & CMSDK_UART_STATE_TXBF_Msk); + uart->uart_base->DATA = '\r'; + } + + while (uart->uart_base->STATE & CMSDK_UART_STATE_TXBF_Msk); + uart->uart_base->DATA = *ptr; + + ptr++; + size--; + } + } + else + { + while (size) + { + while (uart->uart_base->STATE & CMSDK_UART_STATE_TXBF_Msk); + uart->uart_base->DATA = *ptr; + + ptr++; + size--; + } + } + + return (rt_size_t)ptr - (rt_size_t)buffer; +} + +int rt_hw_usart_init(void) +{ +#ifdef RT_USING_UART0 + { + struct fvp_uart* uart; + + /* get uart device */ + uart = &uart0_device; + + /* device initialization */ + uart->parent.type = RT_Device_Class_Char; + uart->uart_base = CMSDK_UART0; + uart->uart_irq_rx = UART0RX_IRQn; + uart->read_index = 0; + uart->save_index = 0; + rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer)); + + /* device interface */ + uart->parent.init = rt_uart_init; + uart->parent.open = rt_uart_open; + uart->parent.close = rt_uart_close; + uart->parent.read = rt_uart_read; + uart->parent.write = rt_uart_write; + uart->parent.control = RT_NULL; + uart->parent.user_data = RT_NULL; + + rt_device_register(&uart->parent, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); + } +#endif /* RT_USING_UART1 */ + +#ifdef RT_USING_UART1 + { + struct fvp_uart* uart; + + /* get uart device */ + uart = &uart1_device; + + /* device initialization */ + uart->parent.type = RT_Device_Class_Char; + uart->uart_base = CMSDK_UART1; + uart->uart_irq_rx = UART1RX_IRQn; + uart->read_index = 0; + uart->save_index = 0; + rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer)); + + /* device interface */ + uart->parent.init = rt_uart_init; + uart->parent.open = rt_uart_open; + uart->parent.close = rt_uart_close; + uart->parent.read = rt_uart_read; + uart->parent.write = rt_uart_write; + uart->parent.control = RT_NULL; + uart->parent.user_data = RT_NULL; + + rt_device_register(&uart->parent, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); + } +#endif /* RT_USING_UART1 */ + +#ifdef RT_USING_UART2 + { + struct fvp_uart* uart; + + /* get uart device */ + uart = &uart2_device; + + /* device initialization */ + uart->uart_base = CMSDK_UART2; + uart->uart_irq_rx = UART2RX_IRQn; + uart->read_index = 0; + uart->save_index = 0; + rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer)); + + /* device interface */ + uart->parent.type = RT_Device_Class_Char; + uart->parent.init = rt_uart_init; + uart->parent.open = rt_uart_open; + uart->parent.close = rt_uart_close; + uart->parent.read = rt_uart_read; + uart->parent.write = rt_uart_write; + uart->parent.control = RT_NULL; + uart->parent.user_data = RT_NULL; + + rt_device_register(&uart->parent, "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); + } +#endif /* RT_USING_UART2 */ + return 0; +} +INIT_BOARD_EXPORT(rt_hw_usart_init); + +#endif /*RT_USING_UART*/ diff --git a/bsp/v2m-mps2/project.uvoptx b/bsp/v2m-mps2/project.uvoptx new file mode 100644 index 0000000000..1e95fcac2e --- /dev/null +++ b/bsp/v2m-mps2/project.uvoptx @@ -0,0 +1,900 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + RT-Thread V2M-MPS2 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 5 + + + + + + + + + + .\Libraries\Dbg_MPS2.ini + BIN\DbgFM.DLL + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0) + + + 0 + DbgFM + -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + + + 0 + 0 + 150 + 1 +
2206
+ 0 + 0 + 0 + 0 + 0 + 1 + ..\..\src\components.c + + \\rtthread_v2m_mps2\../../src/components.c\150 + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 1 + 10000000 + + + + + + Applications + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + applications\main.c + main.c + 0 + 0 + + + + + Drivers + 0 + 0 + 0 + 0 + + 2 + 2 + 1 + 0 + 0 + 0 + drivers\board.c + board.c + 0 + 0 + + + 2 + 3 + 1 + 0 + 0 + 0 + drivers\drv_uart.c + drv_uart.c + 0 + 0 + + + + + Kernel + 0 + 0 + 0 + 0 + + 3 + 4 + 1 + 0 + 0 + 0 + ..\..\src\clock.c + clock.c + 0 + 0 + + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\src\components.c + components.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\src\device.c + device.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\src\idle.c + idle.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\src\ipc.c + ipc.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\..\src\irq.c + irq.c + 0 + 0 + + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\src\kservice.c + kservice.c + 0 + 0 + + + 3 + 11 + 1 + 0 + 0 + 0 + ..\..\src\memheap.c + memheap.c + 0 + 0 + + + 3 + 12 + 1 + 0 + 0 + 0 + ..\..\src\object.c + object.c + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 3 + 14 + 1 + 0 + 0 + 0 + ..\..\src\signal.c + signal.c + 0 + 0 + + + 3 + 15 + 1 + 0 + 0 + 0 + ..\..\src\thread.c + thread.c + 0 + 0 + + + 3 + 16 + 1 + 0 + 0 + 0 + ..\..\src\timer.c + timer.c + 0 + 0 + + + + + CORTEX-M7 + 0 + 0 + 0 + 0 + + 4 + 17 + 1 + 0 + 0 + 0 + ..\..\libcpu\arm\cortex-m7\cpuport.c + cpuport.c + 0 + 0 + + + 4 + 18 + 2 + 0 + 0 + 0 + ..\..\libcpu\arm\cortex-m7\context_rvds.S + context_rvds.S + 0 + 0 + + + 4 + 19 + 1 + 0 + 0 + 0 + ..\..\libcpu\arm\common\backtrace.c + backtrace.c + 0 + 0 + + + 4 + 20 + 1 + 0 + 0 + 0 + ..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 4 + 21 + 1 + 0 + 0 + 0 + ..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 5 + 22 + 1 + 0 + 0 + 0 + ..\..\components\drivers\serial\serial.c + serial.c + 0 + 0 + + + 5 + 23 + 1 + 0 + 0 + 0 + ..\..\components\drivers\src\completion.c + completion.c + 0 + 0 + + + 5 + 24 + 1 + 0 + 0 + 0 + ..\..\components\drivers\src\dataqueue.c + dataqueue.c + 0 + 0 + + + 5 + 25 + 1 + 0 + 0 + 0 + ..\..\components\drivers\src\pipe.c + pipe.c + 0 + 0 + + + 5 + 26 + 1 + 0 + 0 + 0 + ..\..\components\drivers\src\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 5 + 27 + 1 + 0 + 0 + 0 + ..\..\components\drivers\src\waitqueue.c + waitqueue.c + 0 + 0 + + + 5 + 28 + 1 + 0 + 0 + 0 + ..\..\components\drivers\src\workqueue.c + workqueue.c + 0 + 0 + + + + + finsh + 0 + 0 + 0 + 0 + + 6 + 29 + 1 + 0 + 0 + 0 + ..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 6 + 30 + 1 + 0 + 0 + 0 + ..\..\components\finsh\symbol.c + symbol.c + 0 + 0 + + + 6 + 31 + 1 + 0 + 0 + 0 + ..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + 6 + 32 + 1 + 0 + 0 + 0 + ..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + 6 + 33 + 1 + 0 + 0 + 0 + ..\..\components\finsh\msh_cmd.c + msh_cmd.c + 0 + 0 + + + 6 + 34 + 1 + 0 + 0 + 0 + ..\..\components\finsh\msh_file.c + msh_file.c + 0 + 0 + + + 6 + 35 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_compiler.c + finsh_compiler.c + 0 + 0 + + + 6 + 36 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_error.c + finsh_error.c + 0 + 0 + + + 6 + 37 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_heap.c + finsh_heap.c + 0 + 0 + + + 6 + 38 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_init.c + finsh_init.c + 0 + 0 + + + 6 + 39 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_node.c + finsh_node.c + 0 + 0 + + + 6 + 40 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_ops.c + finsh_ops.c + 0 + 0 + + + 6 + 41 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_parser.c + finsh_parser.c + 0 + 0 + + + 6 + 42 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_var.c + finsh_var.c + 0 + 0 + + + 6 + 43 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_vm.c + finsh_vm.c + 0 + 0 + + + 6 + 44 + 1 + 0 + 0 + 0 + ..\..\components\finsh\finsh_token.c + finsh_token.c + 0 + 0 + + + + + libc + 0 + 0 + 0 + 0 + + 7 + 45 + 1 + 0 + 0 + 0 + ..\..\components\libc\compilers\armlibc\libc.c + libc.c + 0 + 0 + + + 7 + 46 + 1 + 0 + 0 + 0 + ..\..\components\libc\compilers\armlibc\libc_syms.c + libc_syms.c + 0 + 0 + + + 7 + 47 + 1 + 0 + 0 + 0 + ..\..\components\libc\compilers\armlibc\mem_std.c + mem_std.c + 0 + 0 + + + 7 + 48 + 1 + 0 + 0 + 0 + ..\..\components\libc\compilers\armlibc\stdio.c + stdio.c + 0 + 0 + + + 7 + 49 + 1 + 0 + 0 + 0 + ..\..\components\libc\compilers\armlibc\stubs.c + stubs.c + 0 + 0 + + + 7 + 50 + 1 + 0 + 0 + 0 + ..\..\components\libc\compilers\armlibc\time.c + time.c + 0 + 0 + + + + + ::Board Support + 0 + 0 + 0 + 1 + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/bsp/v2m-mps2/project.uvprojx b/bsp/v2m-mps2/project.uvprojx new file mode 100644 index 0000000000..cd325e7a74 --- /dev/null +++ b/bsp/v2m-mps2/project.uvprojx @@ -0,0 +1,728 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + RT-Thread V2M-MPS2 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + CMSDK_CM7_SP + ARM + Keil.V2M-MPS2_CMx_BSP.1.6.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00400000) IROM(0x00000000,0x00400000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:CMSDK_CM7_SP$Device\CMSDK_CM7\Include\CMSDK_CM7_SP.h + + + + + + + + + + $$Device:CMSDK_CM7_SP$SVD\CMSDK_CM7_SP.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\ + rtthread-v2m-mps2 + 1 + 0 + 0 + 1 + 0 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread-mdk.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4099 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M7" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x400000 + + + 1 + 0x0 + 0x400000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x400000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x400000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + --library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186 + RT_USING_ARM_LIBC + + applications;.;drivers;..\..\include;..\..\libcpu\arm\cortex-m7;..\..\libcpu\arm\common;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + .\rtthread-v2m-mps2.sct + + + --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) + + + + + + + + Applications + + + main.c + 1 + applications\main.c + + + + + Drivers + + + board.c + 1 + drivers\board.c + + + drv_uart.c + 1 + drivers\drv_uart.c + + + + + Kernel + + + clock.c + 1 + ..\..\src\clock.c + + + components.c + 1 + ..\..\src\components.c + + + device.c + 1 + ..\..\src\device.c + + + idle.c + 1 + ..\..\src\idle.c + + + ipc.c + 1 + ..\..\src\ipc.c + + + irq.c + 1 + ..\..\src\irq.c + + + kservice.c + 1 + ..\..\src\kservice.c + + + memheap.c + 1 + ..\..\src\memheap.c + + + object.c + 1 + ..\..\src\object.c + + + scheduler.c + 1 + ..\..\src\scheduler.c + + + signal.c + 1 + ..\..\src\signal.c + + + thread.c + 1 + ..\..\src\thread.c + + + timer.c + 1 + ..\..\src\timer.c + + + + + CORTEX-M7 + + + cpuport.c + 1 + ..\..\libcpu\arm\cortex-m7\cpuport.c + + + context_rvds.S + 2 + ..\..\libcpu\arm\cortex-m7\context_rvds.S + + + backtrace.c + 1 + ..\..\libcpu\arm\common\backtrace.c + + + div0.c + 1 + ..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\libcpu\arm\common\showmem.c + + + + + DeviceDrivers + + + serial.c + 1 + ..\..\components\drivers\serial\serial.c + + + completion.c + 1 + ..\..\components\drivers\src\completion.c + + + dataqueue.c + 1 + ..\..\components\drivers\src\dataqueue.c + + + pipe.c + 1 + ..\..\components\drivers\src\pipe.c + + + ringbuffer.c + 1 + ..\..\components\drivers\src\ringbuffer.c + + + waitqueue.c + 1 + ..\..\components\drivers\src\waitqueue.c + + + workqueue.c + 1 + ..\..\components\drivers\src\workqueue.c + + + + + finsh + + + shell.c + 1 + ..\..\components\finsh\shell.c + + + symbol.c + 1 + ..\..\components\finsh\symbol.c + + + cmd.c + 1 + ..\..\components\finsh\cmd.c + + + msh.c + 1 + ..\..\components\finsh\msh.c + + + msh_cmd.c + 1 + ..\..\components\finsh\msh_cmd.c + + + msh_file.c + 1 + ..\..\components\finsh\msh_file.c + + + finsh_compiler.c + 1 + ..\..\components\finsh\finsh_compiler.c + + + finsh_error.c + 1 + ..\..\components\finsh\finsh_error.c + + + finsh_heap.c + 1 + ..\..\components\finsh\finsh_heap.c + + + finsh_init.c + 1 + ..\..\components\finsh\finsh_init.c + + + finsh_node.c + 1 + ..\..\components\finsh\finsh_node.c + + + finsh_ops.c + 1 + ..\..\components\finsh\finsh_ops.c + + + finsh_parser.c + 1 + ..\..\components\finsh\finsh_parser.c + + + finsh_var.c + 1 + ..\..\components\finsh\finsh_var.c + + + finsh_vm.c + 1 + ..\..\components\finsh\finsh_vm.c + + + finsh_token.c + 1 + ..\..\components\finsh\finsh_token.c + + + + + libc + + + libc.c + 1 + ..\..\components\libc\compilers\armlibc\libc.c + + + libc_syms.c + 1 + ..\..\components\libc\compilers\armlibc\libc_syms.c + + + mem_std.c + 1 + ..\..\components\libc\compilers\armlibc\mem_std.c + + + stdio.c + 1 + ..\..\components\libc\compilers\armlibc\stdio.c + + + stubs.c + 1 + ..\..\components\libc\compilers\armlibc\stubs.c + + + time.c + 1 + ..\..\components\libc\compilers\armlibc\time.c + + + + + ::Board Support + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\CMSDK_CM7_SP\RTE_Device.h + + + + + + + + RTE\Device\CMSDK_CM7_SP\startup_CMSDK_CM7.s + + + + + + + + RTE\Device\CMSDK_CM7_SP\system_CMSDK_CM7.c + + + + + + + + + + diff --git a/bsp/v2m-mps2/rtconfig.h b/bsp/v2m-mps2/rtconfig.h new file mode 100644 index 0000000000..3700ea92aa --- /dev/null +++ b/bsp/v2m-mps2/rtconfig.h @@ -0,0 +1,226 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +/* RT_THREAD_PRIORITY_8 is not set */ +#define RT_THREAD_PRIORITY_32 +/* RT_THREAD_PRIORITY_256 is not set */ +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 100 +#define RT_DEBUG +#define RT_USING_OVERFLOW_CHECK +#define RT_DEBUG_INIT 0 +#define RT_DEBUG_THREAD 0 +#define RT_USING_HOOK +#define IDLE_THREAD_STACK_SIZE 256 +/* RT_USING_TIMER_SOFT is not set */ + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE +/* RT_USING_SIGNALS is not set */ + +/* Memory Management */ + +/* RT_USING_MEMPOOL is not set */ +#define RT_USING_MEMHEAP +/* RT_USING_NOHEAP is not set */ +/* RT_USING_SMALL_MEM is not set */ +/* RT_USING_SLAB is not set */ +#define RT_USING_MEMHEAP_AS_HEAP +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +/* RT_USING_INTERRUPT_INFO is not set */ +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart0" +/* RT_USING_MODULE is not set */ +#define ARCH_ARM +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M7 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 + +/* C++ features */ + +/* RT_USING_CPLUSPLUS is not set */ + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_CMD_SIZE 80 +/* FINSH_USING_AUTH is not set */ +#define FINSH_USING_MSH +/* FINSH_USING_MSH_DEFAULT is not set */ +/* FINSH_USING_MSH_ONLY is not set */ + +/* Device virtual file system */ + +/* RT_USING_DFS is not set */ + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_USING_SERIAL +/* RT_USING_CAN is not set */ +/* RT_USING_HWTIMER is not set */ +/* RT_USING_CPUTIME is not set */ +/* RT_USING_I2C is not set */ +/* RT_USING_PIN is not set */ +/* RT_USING_MTD_NOR is not set */ +/* RT_USING_MTD_NAND is not set */ +/* RT_USING_RTC is not set */ +/* RT_USING_SDIO is not set */ +/* RT_USING_SPI is not set */ +/* RT_USING_WDT is not set */ +/* RT_USING_WIFI is not set */ + +/* Using USB */ + +/* RT_USING_USB_HOST is not set */ +/* RT_USING_USB_DEVICE is not set */ + +/* POSIX layer and C standard library */ + +#define RT_USING_LIBC +/* RT_USING_PTHREADS is not set */ + +/* Network stack */ + +/* light weight TCP/IP stack */ + +/* RT_USING_LWIP is not set */ + +/* Modbus master and slave stack */ + +/* RT_USING_MODBUS is not set */ + +/* RT-Thread UI Engine */ + +/* RT_USING_GUIENGINE is not set */ + +/* VBUS(Virtual Software BUS) */ + +/* RT_USING_VBUS is not set */ + +/* Utilities */ + +/* RT_USING_LOGTRACE is not set */ +/* RT_USING_RYM is not set */ + +/* ARM CMSIS */ + +/* RT_USING_CMSIS_OS is not set */ +/* RT_USING_RTT_CMSIS is not set */ + +/* RT-Thread online packages */ + +/* system packages */ + +/* PKG_USING_PARTITION is not set */ +/* PKG_USING_PERSIMMON is not set */ +/* PKG_USING_SQLITE is not set */ +/* PKG_USING_RTI is not set */ + +/* IoT - internet of things */ + +/* PKG_USING_PAHOMQTT is not set */ +/* PKG_USING_WEBCLIENT is not set */ +/* PKG_USING_MONGOOSE is not set */ +/* PKG_USING_WEBTERMINAL is not set */ +/* PKG_USING_CJSON is not set */ +/* PKG_USING_LJSON is not set */ +/* PKG_USING_EZXML is not set */ +/* PKG_USING_NANOPB is not set */ +/* PKG_USING_GAGENT_CLOUD is not set */ + +/* Wi-Fi */ + +/* Marvell WiFi */ + +/* PKG_USING_WLANMARVELL is not set */ + +/* Wiced WiFi */ + +/* PKG_USING_WLAN_WICED is not set */ +/* PKG_USING_COAP is not set */ + +/* security packages */ + +/* PKG_USING_MBEDTLS is not set */ +/* PKG_USING_libsodium is not set */ +/* PKG_USING_TINYCRYPT is not set */ + +/* language packages */ + +/* PKG_USING_JERRYSCRIPT is not set */ +/* PKG_USING_MICROPYTHON is not set */ + +/* multimedia packages */ + +/* PKG_USING_OPENMV is not set */ + +/* tools packages */ + +/* PKG_USING_CMBACKTRACE is not set */ +/* PKG_USING_EASYLOGGER is not set */ +/* PKG_USING_SYSTEMVIEW is not set */ +/* PKG_USING_IPERF is not set */ + +/* miscellaneous packages */ + +/* PKG_USING_FASTLZ is not set */ +/* PKG_USING_MINILZO is not set */ + +/* example package: hello */ + +/* PKG_USING_HELLO is not set */ + +/* Privated Packages of RealThread */ + +/* PKG_USING_CODEC is not set */ +/* PKG_USING_PLAYER is not set */ +/* PKG_USING_PERSIMMON_SRC is not set */ + +/* Network Utilities */ + +/* PKG_USING_WLAN_WICED_SRC is not set */ + +/* Cloudsdk: RT_thread IOT Cloudsdk */ + +/* PKG_USING_CLOUDSDK is not set */ + +/* Webnet: A web server package for rt-thread */ + +/* PKG_USING_WEBNET is not set */ +/* PKG_USING_COREMARK is not set */ +/* PKG_USING_POWER_MANAGER is not set */ +#define SOC_V2M_MPS2 +#define RT_USING_UART +#define RT_USING_UART0 + +#endif diff --git a/bsp/v2m-mps2/rtconfig.py b/bsp/v2m-mps2/rtconfig.py new file mode 100644 index 0000000000..b63ea11a91 --- /dev/null +++ b/bsp/v2m-mps2/rtconfig.py @@ -0,0 +1,54 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m7' +CROSS_TOOL='keil' + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') + +if CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = 'C:/Keil_v5' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +#BUILD = 'debug' +BUILD = 'release' + +if PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M7.fp.sp' + CFLAGS = DEVICE + ' --apcs=interwork' + AFLAGS = DEVICE + LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-v2m-mps2.map ' + + CFLAGS += ' --diag_suppress=66,1296,186' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC' + LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB' + + EXEC_PATH += '/arm/bin40/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' --c99' + + POST_ACTION = 'fromelf -z $TARGET' + # POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' +else: + print("only support armcc in this bsp") + exit(-1) diff --git a/bsp/v2m-mps2/rtthread-v2m-mps2.sct b/bsp/v2m-mps2/rtthread-v2m-mps2.sct new file mode 100644 index 0000000000..5fafe7146d --- /dev/null +++ b/bsp/v2m-mps2/rtthread-v2m-mps2.sct @@ -0,0 +1,26 @@ +#! armcc -E +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +#define ROM_START 0x00000000 +#define ROM_SIZE 0x00400000 + +#define RAM1_START 0x20000000 +#define RAM1_SIZE 0x00400000 + +#define RTT_HEAP_SIZE \ + (RAM1_SIZE - ImageLength(RW_IRAM1)) + +LR_IROM1 ROM_START ROM_SIZE { ; load region size_region + ER_IROM1 ROM_START ROM_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 RAM1_START RAM1_SIZE { ; RW data + .ANY (+RW +ZI) + } + RTT_HEAP +0 EMPTY RTT_HEAP_SIZE { + } +} diff --git a/bsp/v2m-mps2/template.uvoptx b/bsp/v2m-mps2/template.uvoptx new file mode 100644 index 0000000000..647795d1ff --- /dev/null +++ b/bsp/v2m-mps2/template.uvoptx @@ -0,0 +1,244 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + RT-Thread V2M-MPS2 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 5 + + + + + + + + + + .\Libraries\Dbg_MPS2.ini + BIN\DbgFM.DLL + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0) + + + 0 + DbgFM + -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + + + 0 + 0 + 150 + 1 +
2206
+ 0 + 0 + 0 + 0 + 0 + 1 + E:\git\rt-thread\rtthread-pr\src\components.c + + \\rtthread_v2m_mps2\../../src/components.c\150 + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 1 + 10000000 + + + + + + ::Board Support + 0 + 0 + 0 + 1 + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 1 + 0 + 0 + 1 + + + diff --git a/bsp/v2m-mps2/template.uvprojx b/bsp/v2m-mps2/template.uvprojx new file mode 100644 index 0000000000..ff1e9daa05 --- /dev/null +++ b/bsp/v2m-mps2/template.uvprojx @@ -0,0 +1,443 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + RT-Thread V2M-MPS2 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + CMSDK_CM7_SP + ARM + Keil.V2M-MPS2_CMx_BSP.1.6.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00400000) IROM(0x00000000,0x00400000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:CMSDK_CM7_SP$Device\CMSDK_CM7\Include\CMSDK_CM7_SP.h + + + + + + + + + + $$Device:CMSDK_CM7_SP$SVD\CMSDK_CM7_SP.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\ + rtthread-v2m-mps2 + 1 + 0 + 0 + 1 + 0 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread-mdk.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4099 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M7" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x400000 + + + 1 + 0x0 + 0x400000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x400000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x400000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + --library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186 + RT_USING_ARM_LIBC + + applications;.;drivers;..\..\include;..\..\libcpu\arm\cortex-m7;..\..\libcpu\arm\common;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + .\rtthread-v2m-mps2.sct + + + --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) + + + + + + + + ::Board Support + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\CMSDK_CM7_SP\RTE_Device.h + + + + + + + + RTE\Device\CMSDK_CM7_SP\startup_CMSDK_CM7.s + + + + + + + + RTE\Device\CMSDK_CM7_SP\system_CMSDK_CM7.c + + + + + + + + + +