From 764a9ca5daee44b840fd492d09d1617c2e485c2a Mon Sep 17 00:00:00 2001 From: supperthomas <78900636@qq.com> Date: Tue, 10 Aug 2021 20:06:09 +0800 Subject: [PATCH 1/4] [bsp/stm32] add the bsp of sensor_tile_box --- bsp/stm32/stm32l4r9-st-sensortile-box/.config | 578 ++++ .../stm32l4r9-st-sensortile-box/.gitignore | 42 + bsp/stm32/stm32l4r9-st-sensortile-box/Kconfig | 21 + .../stm32l4r9-st-sensortile-box/README.md | 123 + .../stm32l4r9-st-sensortile-box/SConscript | 15 + .../stm32l4r9-st-sensortile-box/SConstruct | 60 + .../applications/SConscript | 9 + .../applications/main.c | 29 + .../board/CubeMX_Config/.mxproject | 70 + .../Core/Inc/stm32l4xx_hal_conf.h | 483 +++ .../Core/Src/stm32l4xx_hal_msp.c | 161 + .../board/CubeMX_Config/CubeMX_Config.ioc | 644 ++++ .../stm32l4r9-st-sensortile-box/board/Kconfig | 38 + .../board/SConscript | 41 + .../stm32l4r9-st-sensortile-box/board/board.c | 84 + .../stm32l4r9-st-sensortile-box/board/board.h | 42 + .../board/linker_scripts/link.icf | 45 + .../board/linker_scripts/link.lds | 154 + .../board/linker_scripts/link.sct | 19 + .../figures/board.png | Bin 0 -> 539903 bytes .../stm32l4r9-st-sensortile-box/project.ewd | 3030 +++++++++++++++++ .../stm32l4r9-st-sensortile-box/project.ewp | 2328 +++++++++++++ .../stm32l4r9-st-sensortile-box/project.eww | 10 + .../project.uvoptx | 936 +++++ .../project.uvprojx | 718 ++++ .../stm32l4r9-st-sensortile-box/rtconfig.h | 183 + .../stm32l4r9-st-sensortile-box/rtconfig.py | 150 + .../stm32l4r9-st-sensortile-box/template.ewd | 2966 ++++++++++++++++ .../stm32l4r9-st-sensortile-box/template.ewp | 2088 ++++++++++++ .../stm32l4r9-st-sensortile-box/template.eww | 10 + .../template.uvoptx | 192 ++ .../template.uvprojx | 396 +++ 32 files changed, 15665 insertions(+) create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/.config create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/.gitignore create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/Kconfig create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/README.md create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/SConscript create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/SConstruct create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/applications/SConscript create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/applications/main.c create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/.mxproject create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/Core/Inc/stm32l4xx_hal_conf.h create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/Core/Src/stm32l4xx_hal_msp.c create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/CubeMX_Config.ioc create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/Kconfig create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/SConscript create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/board.c create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.icf create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.lds create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.sct create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/figures/board.png create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/project.ewd create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/project.ewp create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/project.eww create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/project.uvoptx create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/project.uvprojx create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/rtconfig.h create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/rtconfig.py create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/template.ewd create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/template.ewp create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/template.eww create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/template.uvoptx create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/template.uvprojx diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/.config b/bsp/stm32/stm32l4r9-st-sensortile-box/.config new file mode 100644 index 0000000000..fea9d8c932 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/.config @@ -0,0 +1,578 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_MEMHEAP=y +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_SMALL_MEM is not set +# CONFIG_RT_USING_SLAB is not set +CONFIG_RT_USING_MEMHEAP_AS_HEAP=y +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=256 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +# CONFIG_RT_PRINTF_LONGLONG is not set +CONFIG_RT_VER_NUM=0x40004 +CONFIG_ARCH_ARM=y +CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M4=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_USING_MSH_DEFAULT=y +CONFIG_FINSH_USING_MSH_ONLY=y +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +# CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_LIBC_USING_TIME is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_RT_LINK is not set +# CONFIG_RT_USING_LWP is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_SEGGER_RTT_V100 is not set +# CONFIG_PKG_USING_SEGGER_RTT_V110 is not set +# CONFIG_PKG_USING_SEGGER_RTT_LATEST_VERSION is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set + +# +# system packages +# + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32L4=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_STM32L4R9ZI=y + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_USING_USBD is not set +# CONFIG_BSP_USING_CRC is not set +# CONFIG_BSP_USING_RNG is not set +# CONFIG_BSP_USING_UDID is not set diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/.gitignore b/bsp/stm32/stm32l4r9-st-sensortile-box/.gitignore new file mode 100644 index 0000000000..7221bde019 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/.gitignore @@ -0,0 +1,42 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/Kconfig b/bsp/stm32/stm32l4r9-st-sensortile-box/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/README.md b/bsp/stm32/stm32l4r9-st-sensortile-box/README.md new file mode 100644 index 0000000000..c09f2a0552 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/README.md @@ -0,0 +1,123 @@ +# STM32L4R9ZI-MKSBOX1V1 开发板bsp说明 + +## 简介 + +由 supperthomas 为 STM32L4R9ZI-MKSBOX1V1 开发板提供的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +开发板外观如下图所示： + +![board](figures/board.png) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32L4R9，主频 120MHz，2048KB FLASH ，640KB RAM +- 常用外设 + - 状态指示灯：2个，LED1（PB5）LED 2(PF2) + - UART1: RX(PA9) TX(PA10) + - 按键：1个，USER_PB1（PG1） + - 板载 BLE 模组SPBTLE-1S（SPI/UART) + - 温度传感器STTS751(I2C3_SDA PG8 I2C3_SCL PG7 ) + - 温湿度HTS221 压力传感器LPS22HH I2C3_SDA(PB7) I2C3_SCL(PB6) + - 加速度LIS2DW12 CS_ACC(PE11) + - +- 常用接口：SD 卡接口、USB OTG Micro USB 接口 +- 调试接口，ST-LINK Micro USB 接口 +开发板更多详细信息请参考 ST 的 [STM32L4R9ZI-MKSBOX1V1](https://www.st.com/zh/evaluation-tools/steval-mksbox1v1.html)介绍。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| ---- | ---- | ---- | +| 板载 ST-LINK 转串口 | 支持 | RX(PA9) TX(PA10) 需要外接ST-LINK 有ST-LINK插槽 | +| BLE 模组SPBTLE-1S | 待支持 | | +| 传感器 | 待支持 | | +| | | | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | LED1（PB5）LED 2(PF2) USER_PB1（PG1） | +| UART | 支持 | UART1: RX(PA9) TX(PA10) CONSOLE | +| USBD | 支持 | USBD CDC 虚拟串口已验证 | +| SPI1 | 待支持 | SPI1_MOSI(PE15) SPI1_MISO(PE14) SPI1_CLK(PE13) | +| SPI2 | 待支持 | SPI2_MOSI(PC3) SPI2_MISO(PD3) SPI2_SCK(PD1) SPI2_CS(PD0) | +| IIC1 | 待支持 | I2C1_SCL(PB6) I2C_SDA(PB7) | + + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 STLINK 仿真器下载程序，你可以在你的其他NUCLEO板上接一个STLINK到开发板的SWD接口上 + +下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果， LED 会周期性闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（由STLINK连接的串口）（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.3 build Mar 22 2020 + 2006 - 2020 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口1的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 调试串口为串口1 映射到PA9 PA10，由ST-LINK连接 +- 板子上的外接接口有限，建议使用官方提供的转接板ST-LINK进行调试，也可以用DFU的方式进行烧入 + + +## 联系人信息 + +- 维护人: + + - [super_mcu] 邮箱：[super_mcu@qq.com](mailto:super_mcu@qq.com) + +- 更详细的资料会整理在 + + [STM32L4R9ZI-MKSBOX1V1](https://github.com/supperthomas/BSP_BOARD_STM32L4R9ZI_MKSBOX1V1.git) + diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/SConscript b/bsp/stm32/stm32l4r9-st-sensortile-box/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/SConstruct b/bsp/stm32/stm32l4r9-st-sensortile-box/SConstruct new file mode 100644 index 0000000000..44df6b339e --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +stm32_library = 'STM32L4xx_HAL' +rtconfig.BSP_LIBRARY_TYPE = stm32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/applications/SConscript b/bsp/stm32/stm32l4r9-st-sensortile-box/applications/SConscript new file mode 100644 index 0000000000..3ec48cc840 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/applications/SConscript @@ -0,0 +1,9 @@ +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/applications/main.c b/bsp/stm32/stm32l4r9-st-sensortile-box/applications/main.c new file mode 100644 index 0000000000..e7f57327e0 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/applications/main.c @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-09 supperthomas first version + */ + +#include +#include +#include + +/* defined the LED0 pin: PB15 */ +#define LED0_PIN GET_PIN(B, 15) + +int main(void) +{ + /* set LED0 pin mode to output */ + rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + while (1) + { + rt_pin_write(LED0_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED0_PIN, PIN_LOW); + rt_thread_mdelay(500); + } +} diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/.mxproject new file mode 100644 index 0000000000..682d6171c6 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/.mxproject @@ -0,0 +1,70 @@ +[PreviousLibFiles] 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+ +[PreviousUsedKeilFiles] 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+SourcePath#4=F:/04_git_repo/GITEE/rt-thread_github/bsp/stm32/stm32l4r9-st-eval/board/CubeMX_Config/USB_DEVICE/Target +SourceFiles=; + diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/Core/Inc/stm32l4xx_hal_conf.h b/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/Core/Inc/stm32l4xx_hal_conf.h new file mode 100644 index 0000000000..b925035e23 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/Core/Inc/stm32l4xx_hal_conf.h @@ -0,0 +1,483 @@ +/** + ****************************************************************************** + * @file stm32l4xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32l4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32L4xx_HAL_CONF_H +#define STM32L4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +#define HAL_ADC_MODULE_ENABLED +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DCMI_MODULE_ENABLED */ +/*#define HAL_DMA2D_MODULE_ENABLED */ +#define HAL_DFSDM_MODULE_ENABLED +/*#define HAL_DSI_MODULE_ENABLED */ +/*#define HAL_FIREWALL_MODULE_ENABLED */ +/*#define HAL_GFXMMU_MODULE_ENABLED */ +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_HASH_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_LTDC_MODULE_ENABLED */ +/*#define HAL_LCD_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/*#define HAL_PKA_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +#define HAL_RTC_MODULE_ENABLED +/*#define HAL_SAI_MODULE_ENABLED */ +#define HAL_SD_MODULE_ENABLED +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_SWPMI_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED +/*#define HAL_TSC_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_EXTI_MODULE_ENABLED */ +/*#define HAL_PSSI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)16000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Multiple Speed oscillator (MSI) default value. + * This value is the default MSI range value after Reset. + */ +#if !defined (MSI_VALUE) + #define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined (HSI48_VALUE) + #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for SAI1 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) + #define EXTERNAL_SAI1_CLOCK_VALUE 2097000U /*!< Value of the SAI1 External clock source in Hz*/ +#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ + +/** + * @brief External clock source for SAI2 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) + #define EXTERNAL_SAI2_CLOCK_VALUE 2097000U /*!< Value of the SAI2 External clock source in Hz*/ +#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Register callback feature configuration ############### */ +/** + * @brief Set below the peripheral configuration to "1U" to add the support + * of HAL callback registration/deregistration feature for the HAL + * driver(s). This allows user application to provide specific callback + * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting + * the default weak callback functions (see each stm32l4xx_hal_ppp.h file + * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef + * for each PPP peripheral). + */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U +#define USE_HAL_COMP_REGISTER_CALLBACKS 0U +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U +#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U +#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U +#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U +#define USE_HAL_SD_REGISTER_CALLBACKS 0U +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U +#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U +#define USE_HAL_TSC_REGISTER_CALLBACKS 0U +#define USE_HAL_UART_REGISTER_CALLBACKS 0U +#define USE_HAL_USART_REGISTER_CALLBACKS 0U +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32l4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32l4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32l4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32l4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32l4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32l4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32l4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CAN_LEGACY_MODULE_ENABLED + #include "Legacy/stm32l4xx_hal_can_legacy.h" +#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32l4xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32l4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32l4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32l4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32l4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32l4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32l4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32l4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32l4xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +#ifdef HAL_FIREWALL_MODULE_ENABLED + #include "stm32l4xx_hal_firewall.h" +#endif /* HAL_FIREWALL_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32l4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32l4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32l4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32l4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32l4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32l4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LCD_MODULE_ENABLED + #include "stm32l4xx_hal_lcd.h" +#endif /* HAL_LCD_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32l4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32l4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32l4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32l4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32l4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED + #include "stm32l4xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32l4xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32l4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_PKA_MODULE_ENABLED + #include "stm32l4xx_hal_pka.h" +#endif /* HAL_PKA_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32l4xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32l4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32l4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32l4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32l4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32l4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32l4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32l4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32l4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32l4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32l4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_SWPMI_MODULE_ENABLED + #include "stm32l4xx_hal_swpmi.h" +#endif /* HAL_SWPMI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32l4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32l4xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32l4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32l4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32l4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t *file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32L4xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/Core/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/Core/Src/stm32l4xx_hal_msp.c new file mode 100644 index 0000000000..4f7f4205b6 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/Core/Src/stm32l4xx_hal_msp.c @@ -0,0 +1,161 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_hal_msp.c + * @brief This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2021 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under Ultimate Liberty license + * SLA0044, the "License"; You may not use this file except in compliance with + * the License. You may obtain a copy of the License at: + * www.st.com/SLA0044 + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "board.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/* USER CODE BEGIN 1 */ +#ifdef RT_USING_USB_DEVICE +void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(pcdHandle->Instance==USB_OTG_FS) + { + /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */ + + /* USER CODE END USB_OTG_FS_MspInit 0 */ + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USB_OTG_FS GPIO Configuration + PA12 ------> USB_OTG_FS_DP + PA11 ------> USB_OTG_FS_DM + */ + GPIO_InitStruct.Pin = USB_OTG_DP_Pin|USB_OTG_DM_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Peripheral clock enable */ + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + + /* Enable VDDUSB */ + if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + { + __HAL_RCC_PWR_CLK_ENABLE(); + HAL_PWREx_EnableVddUSB(); + __HAL_RCC_PWR_CLK_DISABLE(); + } + else + { + HAL_PWREx_EnableVddUSB(); + } + + /* Peripheral interrupt init */ + HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(OTG_FS_IRQn); + /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */ + + /* USER CODE END USB_OTG_FS_MspInit 1 */ + } +} +#endif + +#ifdef BSP_USING_UART +void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(uartHandle->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + /* USART1 clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART1 GPIO Configuration + PA10 ------> USART1_RX + PA9 ------> USART1_TX + */ + GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } +} +#endif +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/CubeMX_Config.ioc new file mode 100644 index 0000000000..ca1dbcc84b --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/CubeMX_Config/CubeMX_Config.ioc @@ -0,0 +1,644 @@ +#MicroXplorer Configuration settings - do not modify +ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_8 +ADC1.ContinuousConvMode=ENABLE +ADC1.EnableInjectedConversion=ENABLE +ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag,NbrOfConversion,master,ContinuousConvMode,Overrun,OversamplingMode,EnableInjectedConversion +ADC1.NbrOfConversion=1 +ADC1.NbrOfConversionFlag=1 +ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN +ADC1.OversamplingMode=DISABLE +ADC1.Rank-0\#ChannelRegularConversion=1 +ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_12CYCLES_5 +ADC1.master=1 +DFSDM1.DmaMode_reg_FIL0=ENABLE +DFSDM1.FastMode_reg_FIL0=ENABLE +DFSDM1.Filter_injChannel0_FIL0=__NULL +DFSDM1.Filter_regChannel_FIL0=DFSDM_CHANNEL_0 +DFSDM1.Fosr_FIL0=192 +DFSDM1.IPParameters=Filter_injChannel0_FIL0,Filter_regChannel_FIL0,Multiplexer_internal_CH0,FastMode_reg_FIL0,DmaMode_reg_FIL0,Fosr_FIL0,SincOrder_FIL0,RightBitShift_CH0 +DFSDM1.Multiplexer_internal_CH0=DFSDM_CHANNEL_ADC_OUTPUT +DFSDM1.RightBitShift_CH0=7 +DFSDM1.SincOrder_FIL0=DFSDM_FILTER_SINC2_ORDER +Dma.DFSDM1_FLT0.0.Direction=DMA_PERIPH_TO_MEMORY +Dma.DFSDM1_FLT0.0.EventEnable=DISABLE +Dma.DFSDM1_FLT0.0.Instance=DMA1_Channel4 +Dma.DFSDM1_FLT0.0.MemDataAlignment=DMA_MDATAALIGN_WORD +Dma.DFSDM1_FLT0.0.MemInc=DMA_MINC_ENABLE +Dma.DFSDM1_FLT0.0.Mode=DMA_CIRCULAR +Dma.DFSDM1_FLT0.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD +Dma.DFSDM1_FLT0.0.PeriphInc=DMA_PINC_DISABLE +Dma.DFSDM1_FLT0.0.Polarity=HAL_DMAMUX_REQUEST_GEN_RISING +Dma.DFSDM1_FLT0.0.Priority=DMA_PRIORITY_HIGH +Dma.DFSDM1_FLT0.0.RequestNumber=1 +Dma.DFSDM1_FLT0.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber +Dma.DFSDM1_FLT0.0.SignalID=NONE +Dma.DFSDM1_FLT0.0.SyncEnable=DISABLE +Dma.DFSDM1_FLT0.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT +Dma.DFSDM1_FLT0.0.SyncRequestNumber=1 +Dma.DFSDM1_FLT0.0.SyncSignalID=NONE +Dma.Request0=DFSDM1_FLT0 +Dma.RequestsNb=1 +FATFS.BSP.number=1 +FATFS.IPParameters=_USE_LFN,_FS_NORTC,USE_DMA_CODE_SD +FATFS.USE_DMA_CODE_SD=1 +FATFS._FS_NORTC=0 +FATFS._USE_LFN=3 +FATFS0.BSP.STBoard=false +FATFS0.BSP.api=Unknown +FATFS0.BSP.component= +FATFS0.BSP.condition= +FATFS0.BSP.i2caddr=0 +FATFS0.BSP.i2creg= +FATFS0.BSP.instance=PB12 +FATFS0.BSP.ip=GPIO +FATFS0.BSP.mode=Input +FATFS0.BSP.name=Detect_SDIO +FATFS0.BSP.semaphore= +FATFS0.BSP.solution=PB12 +File.Version=6 +I2C1.I2C_Speed_Mode=I2C_Fast +I2C1.IPParameters=Timing,I2C_Speed_Mode +I2C1.Timing=0x00B03FDB +I2C3.I2C_Speed_Mode=I2C_Fast +I2C3.IPParameters=Timing,I2C_Speed_Mode +I2C3.Timing=0x00B03FDB +KeepUserPlacement=false +Mcu.Family=STM32L4 +Mcu.IP0=ADC1 +Mcu.IP1=DFSDM1 +Mcu.IP10=SPI1 +Mcu.IP11=SPI2 +Mcu.IP12=SPI3 +Mcu.IP13=SYS +Mcu.IP14=TIM2 +Mcu.IP15=TIM6 +Mcu.IP16=TIM7 +Mcu.IP17=USART1 +Mcu.IP18=USB_DEVICE +Mcu.IP19=USB_OTG_FS +Mcu.IP2=DMA +Mcu.IP3=FATFS +Mcu.IP4=I2C1 +Mcu.IP5=I2C3 +Mcu.IP6=NVIC +Mcu.IP7=RCC +Mcu.IP8=RTC +Mcu.IP9=SDMMC1 +Mcu.IPNb=20 +Mcu.Name=STM32L4R9Z(G-I)Jx +Mcu.Package=UFBGA144 +Mcu.Pin0=PB9 +Mcu.Pin1=PB4 (NJTRST) +Mcu.Pin10=PA15 (JTDI) +Mcu.Pin11=PA12 +Mcu.Pin12=PA11 +Mcu.Pin13=PE5 +Mcu.Pin14=PB7 +Mcu.Pin15=PC10 +Mcu.Pin16=PA10 +Mcu.Pin17=PC9 +Mcu.Pin18=PC14-OSC32_IN (PC14) +Mcu.Pin19=PC15-OSC32_OUT (PC15) +Mcu.Pin2=PD3 +Mcu.Pin20=PE4 +Mcu.Pin21=PE6 +Mcu.Pin22=PB6 +Mcu.Pin23=PD5 +Mcu.Pin24=PD2 +Mcu.Pin25=PC12 +Mcu.Pin26=PA9 +Mcu.Pin27=PC6 +Mcu.Pin28=PF2 +Mcu.Pin29=PF0 +Mcu.Pin3=PC11 +Mcu.Pin30=PG10 +Mcu.Pin31=PG8 +Mcu.Pin32=PC7 +Mcu.Pin33=PC8 +Mcu.Pin34=PG7 +Mcu.Pin35=PF7 +Mcu.Pin36=PG3 +Mcu.Pin37=PG4 +Mcu.Pin38=PD15 +Mcu.Pin39=PD14 +Mcu.Pin4=PE3 +Mcu.Pin40=PD13 +Mcu.Pin41=PH0-OSC_IN (PH0) +Mcu.Pin42=PH1-OSC_OUT (PH1) +Mcu.Pin43=PE11 +Mcu.Pin44=PC3 +Mcu.Pin45=PE13 +Mcu.Pin46=PB15 +Mcu.Pin47=PC5 +Mcu.Pin48=PE15 +Mcu.Pin49=PA2 +Mcu.Pin5=PB8 +Mcu.Pin50=PC4 +Mcu.Pin51=PE10 +Mcu.Pin52=PB12 +Mcu.Pin53=PA3 +Mcu.Pin54=PG1 +Mcu.Pin55=PE12 +Mcu.Pin56=PE14 +Mcu.Pin57=VP_DFSDM1_VS_IN0 +Mcu.Pin58=VP_FATFS_VS_SDIO +Mcu.Pin59=VP_RTC_VS_RTC_Activate +Mcu.Pin6=PB5 +Mcu.Pin60=VP_RTC_VS_RTC_Calendar +Mcu.Pin61=VP_SYS_VS_Systick +Mcu.Pin62=VP_TIM2_VS_ClockSourceINT +Mcu.Pin63=VP_TIM6_VS_ClockSourceINT +Mcu.Pin64=VP_TIM7_VS_ClockSourceINT +Mcu.Pin65=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS +Mcu.Pin7=PB3 (JTDO/TRACESWO) +Mcu.Pin8=PD6 +Mcu.Pin9=PD1 +Mcu.PinsNb=66 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32L4R9ZIJx +MxCube.Version=6.1.1 +MxDb.Version=DB.6.0.10 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:false\:true\:false\:true +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:false\:true +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SDMMC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true +NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:true\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +PA10.Mode=Asynchronous +PA10.Signal=USART1_RX +PA11.GPIOParameters=GPIO_Label +PA11.GPIO_Label=USB OTG DM +PA11.Locked=true +PA11.Mode=Device_Only +PA11.Signal=USB_OTG_FS_DM +PA12.GPIOParameters=GPIO_Label +PA12.GPIO_Label=USB OTG DP +PA12.Locked=true +PA12.Mode=Device_Only +PA12.Signal=USB_OTG_FS_DP +PA15\ (JTDI).GPIOParameters=GPIO_Speed,PinState,GPIO_Label,GPIO_ModeDefaultOutputPP +PA15\ (JTDI).GPIO_Label=CS_LIS2MDL +PA15\ (JTDI).GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PA15\ (JTDI).GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PA15\ (JTDI).Locked=true +PA15\ (JTDI).PinState=GPIO_PIN_SET +PA15\ (JTDI).Signal=GPIO_Output +PA2.GPIOParameters=GPIO_Label +PA2.GPIO_Label=INT1_LSM6DSOX +PA2.Locked=true +PA2.Signal=GPXTI2 +PA3.GPIOParameters=GPIO_Label +PA3.GPIO_Label=ADC1_IN8 [MICROPHONE] +PA3.Locked=true +PA3.Signal=ADCx_IN8 +PA9.Mode=Asynchronous +PA9.Signal=USART1_TX +PB12.GPIOParameters=GPIO_Label +PB12.GPIO_Label=SD_DETECT +PB12.Locked=true +PB12.Signal=GPIO_Input +PB15.GPIOParameters=GPIO_Label +PB15.GPIO_Label=CPU_LED +PB15.Locked=true +PB15.Signal=GPIO_Output +PB3\ (JTDO/TRACESWO).GPIOParameters=GPIO_PuPd,GPIO_Label +PB3\ (JTDO/TRACESWO).GPIO_Label=SPI3_SCK [SENSORS] +PB3\ (JTDO/TRACESWO).GPIO_PuPd=GPIO_PULLUP +PB3\ (JTDO/TRACESWO).Locked=true +PB3\ (JTDO/TRACESWO).Mode=Full_Duplex_Master +PB3\ (JTDO/TRACESWO).Signal=SPI3_SCK +PB4\ (NJTRST).GPIOParameters=GPIO_Label +PB4\ (NJTRST).GPIO_Label=SPI3_MISO [SENSORS] +PB4\ (NJTRST).Locked=true +PB4\ (NJTRST).Mode=Full_Duplex_Master +PB4\ (NJTRST).Signal=SPI3_MISO +PB5.GPIOParameters=GPIO_Label +PB5.GPIO_Label=SPI3_MOSI [SENSORS] +PB5.Locked=true +PB5.Mode=Full_Duplex_Master +PB5.Signal=SPI3_MOSI +PB6.GPIOParameters=GPIO_Label +PB6.GPIO_Label=I2C1_SCL [ENV SENSORS] +PB6.Locked=true +PB6.Mode=I2C +PB6.Signal=I2C1_SCL +PB7.GPIOParameters=GPIO_Label +PB7.GPIO_Label=I2C1_SDA [ENV SENSORS] +PB7.Locked=true +PB7.Mode=I2C +PB7.Signal=I2C1_SDA +PB8.GPIOParameters=GPIO_Label +PB8.GPIO_Label=SDMMC1_CKIN +PB8.Locked=true +PB8.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PB8.Signal=SDMMC1_CKIN +PB9.GPIOParameters=GPIO_Label +PB9.GPIO_Label=SDMMC1_CDIR +PB9.Locked=true +PB9.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PB9.Signal=SDMMC1_CDIR +PC10.GPIOParameters=GPIO_Label +PC10.GPIO_Label=SDMMC1_D2 +PC10.Locked=true +PC10.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PC10.Signal=SDMMC1_D2 +PC11.GPIOParameters=GPIO_Label +PC11.GPIO_Label=SDMMC1_D3 +PC11.Locked=true +PC11.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PC11.Signal=SDMMC1_D3 +PC12.GPIOParameters=GPIO_Label +PC12.GPIO_Label=SDMMC1_CK +PC12.Locked=true +PC12.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PC12.Signal=SDMMC1_CK +PC14-OSC32_IN\ (PC14).GPIOParameters=GPIO_Label +PC14-OSC32_IN\ (PC14).GPIO_Label=RCC_OSC32_IN +PC14-OSC32_IN\ (PC14).Locked=true +PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator +PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN +PC15-OSC32_OUT\ (PC15).GPIOParameters=GPIO_Label +PC15-OSC32_OUT\ (PC15).GPIO_Label=RCC-OSC32_OUT +PC15-OSC32_OUT\ (PC15).Locked=true +PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator +PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT +PC3.GPIOParameters=GPIO_Label +PC3.GPIO_Label=SPI2_MOSI [BLE] +PC3.Locked=true +PC3.Mode=Full_Duplex_Master +PC3.Signal=SPI2_MOSI +PC4.GPIOParameters=GPIO_Label +PC4.GPIO_Label=AN_VBATT +PC4.Locked=true +PC4.Signal=ADCx_IN13 +PC5.GPIOParameters=GPIO_Label +PC5.GPIO_Label=INT1_LIS2DW12 +PC5.Locked=true +PC5.Signal=GPXTI5 +PC6.GPIOParameters=GPIO_Label +PC6.GPIO_Label=SDMMC1_D0DIR +PC6.Locked=true +PC6.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PC6.Signal=SDMMC1_D0DIR +PC7.GPIOParameters=GPIO_Label +PC7.GPIO_Label=SDMMC1_D123DIR +PC7.Locked=true +PC7.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PC7.Signal=SDMMC1_D123DIR +PC8.GPIOParameters=GPIO_Label +PC8.GPIO_Label=SDMMC1_D0 +PC8.Locked=true +PC8.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PC8.Signal=SDMMC1_D0 +PC9.GPIOParameters=GPIO_Label +PC9.GPIO_Label=SDMMC1_D1 +PC9.Locked=true +PC9.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PC9.Signal=SDMMC1_D1 +PD1.GPIOParameters=GPIO_Label +PD1.GPIO_Label=SPI2_SCK [BLE] +PD1.Locked=true +PD1.Mode=Full_Duplex_Master +PD1.Signal=SPI2_SCK +PD13.GPIOParameters=GPIO_Label +PD13.GPIO_Label=INT_HTS221 +PD13.Locked=true +PD13.Signal=GPXTI13 +PD14.GPIOParameters=GPIO_Label +PD14.GPIO_Label=INT2_LIS2DW12 +PD14.Locked=true +PD14.Signal=GPXTI14 +PD15.GPIOParameters=GPIO_Label +PD15.GPIO_Label=INT_LPS22HH +PD15.Locked=true +PD15.Signal=GPXTI15 +PD2.GPIOParameters=GPIO_Label +PD2.GPIO_Label=SDMMC1_CMD +PD2.Locked=true +PD2.Mode=SD_4_bits_Wide_bus_dir_voltage_converter +PD2.Signal=SDMMC1_CMD +PD3.GPIOParameters=GPIO_Label +PD3.GPIO_Label=SPI2_MISO [BLE] +PD3.Locked=true +PD3.Mode=Full_Duplex_Master +PD3.Signal=SPI2_MISO +PD5.GPIOParameters=GPIO_Label +PD5.GPIO_Label=USART2_TX [SERIAL PORT] +PD5.Locked=true +PD5.Signal=USART2_TX +PD6.GPIOParameters=GPIO_Label +PD6.GPIO_Label=USART2_RX [SERIAL PORT] +PD6.Locked=true +PD6.Signal=USART2_RX +PE10.GPIOParameters=GPIO_Speed,PinState,GPIO_Label,GPIO_ModeDefaultOutputPP +PE10.GPIO_Label=CS_IIS3DHHC +PE10.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PE10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PE10.Locked=true +PE10.PinState=GPIO_PIN_SET +PE10.Signal=GPIO_Output +PE11.GPIOParameters=GPIO_Speed,PinState,GPIO_Label,GPIO_ModeDefaultOutputPP +PE11.GPIO_Label=CS_LIS2DW12 +PE11.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PE11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PE11.Locked=true +PE11.PinState=GPIO_PIN_SET +PE11.Signal=GPIO_Output +PE12.GPIOParameters=GPIO_Speed,PinState,GPIO_Label,GPIO_ModeDefaultOutputPP +PE12.GPIO_Label=CS_LSM6DSOX +PE12.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PE12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PE12.Locked=true +PE12.PinState=GPIO_PIN_SET +PE12.Signal=GPIO_Output +PE13.GPIOParameters=GPIO_PuPd,GPIO_Label +PE13.GPIO_Label=SPI2_SCK [BLE] +PE13.GPIO_PuPd=GPIO_PULLUP +PE13.Locked=true +PE13.Mode=Full_Duplex_Master +PE13.Signal=SPI1_SCK +PE14.Locked=true +PE14.Mode=Full_Duplex_Master +PE14.Signal=SPI1_MISO +PE15.GPIOParameters=GPIO_Label +PE15.GPIO_Label=SPI1_MOSI [SENSORS] +PE15.Locked=true +PE15.Mode=Full_Duplex_Master +PE15.Signal=SPI1_MOSI +PE3.GPIOParameters=GPIO_Label +PE3.GPIO_Label=INT2_LSM6DSOX +PE3.Locked=true +PE3.Signal=GPXTI3 +PE4.GPIOParameters=PinState,GPIO_Label +PE4.GPIO_Label=SD_EN +PE4.Locked=true +PE4.PinState=GPIO_PIN_SET +PE4.Signal=GPIO_Output +PE5.GPIOParameters=PinState,GPIO_Label +PE5.GPIO_Label=SD_SEL +PE5.Locked=true +PE5.PinState=GPIO_PIN_SET +PE5.Signal=GPIO_Output +PE6.GPIOParameters=GPIO_Label +PE6.GPIO_Label=INT2_IIS3DHHC +PE6.Locked=true +PE6.Signal=GPXTI6 +PF0.GPIOParameters=PinState,GPIO_Label +PF0.GPIO_Label=BB_MODE +PF0.Locked=true +PF0.PinState=GPIO_PIN_RESET +PF0.Signal=GPIO_Output +PF2.GPIOParameters=GPIO_Label,GPIO_ModeDefaultOutputPP +PF2.GPIO_Label=USER_LED +PF2.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP +PF2.Locked=true +PF2.Signal=GPIO_Output +PF7.GPIOParameters=PinState,GPIO_Label +PF7.GPIO_Label=LDO_2V7_EN +PF7.Locked=true +PF7.PinState=GPIO_PIN_SET +PF7.Signal=GPIO_Output +PG1.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI +PG1.GPIO_Label=USER_PB1 +PG1.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING +PG1.Locked=true +PG1.Signal=GPXTI1 +PG10.GPIOParameters=PinState,GPIO_Label +PG10.GPIO_Label=CHG_LED2 +PG10.Locked=true +PG10.PinState=GPIO_PIN_SET +PG10.Signal=GPIO_Output +PG3.GPIOParameters=GPIO_Label +PG3.GPIO_Label=CHG_LED +PG3.Locked=true +PG3.Signal=GPIO_Input +PG4.GPIOParameters=GPIO_Label +PG4.GPIO_Label=SW_SEL +PG4.Locked=true +PG4.Signal=GPIO_Output +PG7.GPIOParameters=GPIO_Label +PG7.GPIO_Label=I2C3_SCL [TEMPERATURE] +PG7.Locked=true +PG7.Mode=I2C +PG7.Signal=I2C3_SCL +PG8.GPIOParameters=GPIO_Label +PG8.GPIO_Label=I2C3_SDA [TEMPERATURE] +PG8.Locked=true +PG8.Mode=I2C +PG8.Signal=I2C3_SDA +PH0-OSC_IN\ (PH0).GPIOParameters=GPIO_Label +PH0-OSC_IN\ (PH0).GPIO_Label=RCC_OSC_IN +PH0-OSC_IN\ (PH0).Locked=true +PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator +PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN +PH1-OSC_OUT\ (PH1).GPIOParameters=GPIO_Label +PH1-OSC_OUT\ (PH1).GPIO_Label=RCC_OSC_OUT +PH1-OSC_OUT\ (PH1).Locked=true +PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator +PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +PinOutPanel.CurrentBGAView=Top +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=true +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32L4R9ZIJx +ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.16.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=1 +ProjectManager.MainLocation=Core/Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=CubeMX_Config.ioc +ProjectManager.ProjectName=CubeMX_Config +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=MDK-ARM V5 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_DFSDM1_Init-DFSDM1-false-HAL-true,6-MX_I2C1_Init-I2C1-false-HAL-true,7-MX_I2C3_Init-I2C3-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,10-MX_SPI1_Init-SPI1-false-HAL-true,11-MX_SPI2_Init-SPI2-false-HAL-true,12-MX_SPI3_Init-SPI3-false-HAL-true,13-MX_TIM2_Init-TIM2-false-HAL-true,14-MX_TIM6_Init-TIM6-false-HAL-true,15-MX_TIM7_Init-TIM7-false-HAL-true,16-MX_FATFS_Init-FATFS-false-HAL-false,17-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,18-MX_USART1_UART_Init-USART1-false-HAL-true +RCC.ADCFreq_Value=76800000 +RCC.AHBFreq_Value=120000000 +RCC.APB1Freq_Value=120000000 +RCC.APB1TimFreq_Value=120000000 +RCC.APB2Freq_Value=120000000 +RCC.APB2TimFreq_Value=120000000 +RCC.CK48CLockSelection=RCC_USBCLKSOURCE_HSI48 +RCC.CRSFreq_Value=48000000 +RCC.CortexFreq_Value=120000000 +RCC.DFSDMFreq_Value=120000000 +RCC.DSIFreq_Value=40000000 +RCC.DSIRXEscFreq_Value=40000000 +RCC.DSITXEscFreq_Value=10000000 +RCC.FCLKCortexFreq_Value=120000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=120000000 +RCC.HSE_VALUE=16000000 +RCC.HSI48_VALUE=48000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=120000000 +RCC.I2C2Freq_Value=120000000 +RCC.I2C3Freq_Value=120000000 +RCC.I2C4Freq_Value=120000000 +RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CK48CLockSelection,CRSFreq_Value,CortexFreq_Value,DFSDMFreq_Value,DSIFreq_Value,DSIRXEscFreq_Value,DSITXEscFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,OCTOSPIMFreq_Value,PLLDSIFreq_Value,PLLDSIVCOFreq_Value,PLLM1,PLLM2,PLLN,PLLP,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1Q,PLLSAI1QoutputFreq_Value,PLLSAI1R,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2QoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value +RCC.LCDTFTFreq_Value=32000000 +RCC.LPTIM1Freq_Value=120000000 +RCC.LPTIM2Freq_Value=120000000 +RCC.LPUART1Freq_Value=120000000 +RCC.LSCOPinFreq_Value=32000 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=120000000 +RCC.MSI_VALUE=4000000 +RCC.OCTOSPIMFreq_Value=120000000 +RCC.PLLDSIFreq_Value=320000000 +RCC.PLLDSIVCOFreq_Value=640000000 +RCC.PLLM1=4 +RCC.PLLM2=5 +RCC.PLLN=60 +RCC.PLLP=RCC_PLLP_DIV5 +RCC.PLLPoutputFreq_Value=48000000 +RCC.PLLQoutputFreq_Value=120000000 +RCC.PLLRCLKFreq_Value=120000000 +RCC.PLLSAI1N=96 +RCC.PLLSAI1PoutputFreq_Value=153600000 +RCC.PLLSAI1Q=RCC_PLLQ_DIV4 +RCC.PLLSAI1QoutputFreq_Value=76800000 +RCC.PLLSAI1R=RCC_PLLR_DIV4 +RCC.PLLSAI1RoutputFreq_Value=76800000 +RCC.PLLSAI2PoutputFreq_Value=64000000 +RCC.PLLSAI2QoutputFreq_Value=64000000 +RCC.PLLSAI2RoutputFreq_Value=64000000 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.PWRFreq_Value=120000000 +RCC.RNGFreq_Value=48000000 +RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE +RCC.RTCFreq_Value=32768 +RCC.SAI1Freq_Value=153600000 +RCC.SAI2Freq_Value=153600000 +RCC.SDMMCFreq_Value=48000000 +RCC.SYSCLKFreq_VALUE=120000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.UART4Freq_Value=120000000 +RCC.UART5Freq_Value=120000000 +RCC.USART1Freq_Value=120000000 +RCC.USART2Freq_Value=120000000 +RCC.USART3Freq_Value=120000000 +RCC.USBFreq_Value=48000000 +RCC.VCOInput2Freq_Value=3200000 +RCC.VCOInput3Freq_Value=16000000 +RCC.VCOInputFreq_Value=4000000 +RCC.VCOOutputFreq_Value=240000000 +RCC.VCOSAI1OutputFreq_Value=307200000 +RCC.VCOSAI2OutputFreq_Value=128000000 +RTC.Date=3 +RTC.Format=RTC_FORMAT_BIN +RTC.IPParameters=Format,WeekDay,Month,Date,Year +RTC.IPParametersWithoutCheck=Year +RTC.Month=RTC_MONTH_APRIL +RTC.WeekDay=RTC_WEEKDAY_TUESDAY +RTC.Year=20 +SH.ADCx_IN13.0=ADC1_IN13,IN13-Single-Ended +SH.ADCx_IN13.ConfNb=1 +SH.ADCx_IN8.0=ADC1_IN8,IN8-Single-Ended +SH.ADCx_IN8.ConfNb=1 +SH.GPXTI1.0=GPIO_EXTI1 +SH.GPXTI1.ConfNb=1 +SH.GPXTI13.0=GPIO_EXTI13 +SH.GPXTI13.ConfNb=1 +SH.GPXTI14.0=GPIO_EXTI14 +SH.GPXTI14.ConfNb=1 +SH.GPXTI15.0=GPIO_EXTI15 +SH.GPXTI15.ConfNb=1 +SH.GPXTI2.0=GPIO_EXTI2 +SH.GPXTI2.ConfNb=1 +SH.GPXTI3.0=GPIO_EXTI3 +SH.GPXTI3.ConfNb=1 +SH.GPXTI5.0=GPIO_EXTI5 +SH.GPXTI5.ConfNb=1 +SH.GPXTI6.0=GPIO_EXTI6 +SH.GPXTI6.ConfNb=1 +SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_16 +SPI1.CLKPhase=SPI_PHASE_2EDGE +SPI1.CLKPolarity=SPI_POLARITY_HIGH +SPI1.CalculateBaudRate=7.5 MBits/s +SPI1.DataSize=SPI_DATASIZE_8BIT +SPI1.Direction=SPI_DIRECTION_2LINES +SPI1.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate,DataSize,CLKPolarity,CLKPhase +SPI1.Mode=SPI_MODE_MASTER +SPI1.VirtualType=VM_MASTER +SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_128 +SPI2.CLKPhase=SPI_PHASE_2EDGE +SPI2.CalculateBaudRate=937.5 KBits/s +SPI2.DataSize=SPI_DATASIZE_8BIT +SPI2.Direction=SPI_DIRECTION_2LINES +SPI2.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate,DataSize,CLKPhase +SPI2.Mode=SPI_MODE_MASTER +SPI2.VirtualType=VM_MASTER +SPI3.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_16 +SPI3.CLKPhase=SPI_PHASE_2EDGE +SPI3.CLKPolarity=SPI_POLARITY_HIGH +SPI3.CalculateBaudRate=7.5 MBits/s +SPI3.DataSize=SPI_DATASIZE_8BIT +SPI3.Direction=SPI_DIRECTION_2LINES +SPI3.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate,DataSize,CLKPolarity,CLKPhase +SPI3.Mode=SPI_MODE_MASTER +SPI3.VirtualType=VM_MASTER +TIM2.IPParameters=Prescaler,Period +TIM2.Period=0xFFFFFFFF +TIM2.Prescaler=119 +TIM6.IPParameters=Prescaler,Period +TIM6.Period=1000 +TIM6.Prescaler=119 +TIM7.IPParameters=Prescaler,Period +TIM7.Period=0xFFFF +TIM7.Prescaler=119 +USART1.IPParameters=VirtualMode-Asynchronous +USART1.VirtualMode-Asynchronous=VM_ASYNC +USB_DEVICE.CLASS_NAME_FS=CDC +USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS +USB_DEVICE.VirtualMode=Cdc +USB_DEVICE.VirtualModeFS=Cdc_FS +USB_OTG_FS.IPParameters=VirtualMode,battery_charging_enable,use_dedicated_ep1 +USB_OTG_FS.VirtualMode=Device_Only +USB_OTG_FS.battery_charging_enable=ENABLE +USB_OTG_FS.use_dedicated_ep1=DISABLE +VP_DFSDM1_VS_IN0.Mode=Parallel_Input_ch0 +VP_DFSDM1_VS_IN0.Signal=DFSDM1_VS_IN0 +VP_FATFS_VS_SDIO.Mode=SDIO +VP_FATFS_VS_SDIO.Signal=FATFS_VS_SDIO +VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled +VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate +VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar +VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM2_VS_ClockSourceINT.Mode=Internal +VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT +VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer +VP_TIM6_VS_ClockSourceINT.Signal=TIM6_VS_ClockSourceINT +VP_TIM7_VS_ClockSourceINT.Mode=Enable_Timer +VP_TIM7_VS_ClockSourceINT.Signal=TIM7_VS_ClockSourceINT +VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS +VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS +board=STEVAL-MKSBOX1V1 +boardIOC=true diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/Kconfig b/bsp/stm32/stm32l4r9-st-sensortile-box/board/Kconfig new file mode 100644 index 0000000000..eedcda70f3 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/Kconfig @@ -0,0 +1,38 @@ +menu "Hardware Drivers Config" + +config SOC_STM32L4R9ZI + bool + select SOC_SERIES_STM32L4 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART1 + bool "Enable UART1" + default y + endif + + config BSP_USING_USBD + bool "Enable Full-Speed USB Device Controller(USBD)" + select RT_USING_USB_DEVICE + default y + + + source "../libraries/HAL_Drivers/Kconfig" + +endmenu + +endmenu diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/SConscript b/bsp/stm32/stm32l4r9-st-sensortile-box/board/SConscript new file mode 100644 index 0000000000..ef43bfc5c0 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/SConscript @@ -0,0 +1,41 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +CubeMX_Config/Core/Src/stm32l4xx_hal_msp.c +''') + + +path = [cwd] +path += [cwd + '/CubeMX_Config/Core/Inc'] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l4r9xx.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/arm/startup_stm32l4r9xx.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/startup_stm32l4r9xx.s'] + +# STM32L412xx || STM32L422xx || STM32L431xx +# STM32L432xx || STM32L433xx || STM32L442xx +# STM32L443xx || STM32L451xx || STM32L452xx +# STM32L462xx || STM32L471xx || STM32L475xx +# STM32L476xx || STM32L485xx || STM32L486xx +# STM32L496xx || STM32L4A6xx || STM32L4R5xx +# STM32L4R7xx || STM32L4R9xx || STM32L4S5xx +# STM32L4S7xx || STM32L4S9xx +# You can select chips from the list above +CPPDEFINES = ['STM32L4R9xx'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') + diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.c b/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.c new file mode 100644 index 0000000000..beacd7ac14 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.c @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-09 supperthomas first version + */ + +#include "board.h" + +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK) + { + Error_Handler(); + } + /** Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE + |RCC_OSCILLATORTYPE_LSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 4; + RCC_OscInitStruct.PLL.PLLN = 60; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV5; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1 + |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_I2C3 + |RCC_PERIPHCLK_DFSDM1|RCC_PERIPHCLK_USB + |RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_ADC; + PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; + PeriphClkInit.I2c3ClockSelection = RCC_I2C3CLKSOURCE_PCLK1; + PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; + PeriphClkInit.Dfsdm1ClockSelection = RCC_DFSDM1CLKSOURCE_PCLK; + PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLP; + PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; + PeriphClkInit.PLLSAI1.PLLSAI1M = 5; + PeriphClkInit.PLLSAI1.PLLSAI1N = 96; + PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV4; + PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV4; + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_ADC1CLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } +} diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h b/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h new file mode 100644 index 0000000000..7d85022bb4 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-5 SummerGift first version + * 2019-04-09 jhb + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include +#include +#include "drv_common.h" +#include "drv_gpio.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define STM32_FLASH_SIZE (2048 * 1024) +#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) + +#define STM32_SRAM3_SIZE (384) +#define STM32_SRAM3_START (0x20040000) +#define STM32_SRAM3_END (STM32_SRAM3_START + STM32_SRAM3_SIZE * 1024) + +#define HEAP_BEGIN STM32_SRAM3_START +#define HEAP_END STM32_SRAM3_END + +void SystemClock_Config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.icf b/bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.icf new file mode 100644 index 0000000000..838fae1cef --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.icf @@ -0,0 +1,45 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_1.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_IROM1_start__ = 0x08000000; +define symbol __ICFEDIT_region_IROM1_end__ = 0x081FFFFF; +define symbol __ICFEDIT_region_IRAM1_start__ = 0x20000000; +define symbol __ICFEDIT_region_IRAM1_end__ = 0x2002FFFF; +define symbol __ICFEDIT_region_IRAM2_start__ = 0x20030000; +define symbol __ICFEDIT_region_IRAM2_end__ = 0x2003FFFF; + +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x2000; +define symbol __ICFEDIT_size_heap__ = 0x2000; +/**** End of ICF editor section. ###ICF###*/ + +define symbol IRAM3_region_start = 0x20040000; +define symbol IRAM3_region_end = 0x2009FFFF; + +define memory mem with size = 4G; +define region IROM_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__]; + +define region IRAM_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__] + | mem:[from __ICFEDIT_region_IRAM2_start__ to __ICFEDIT_region_IRAM2_end__] + | mem:[from IRAM3_region_start to IRAM3_region_end ]; + + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; + +if (isdefinedsymbol(__USE_DLIB_PERTHREAD)) +{ + // Required in a multi-threaded application + initialize by copy with packing = none { section __DLIB_PERTHREAD }; +} + + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in IROM_region { readonly }; +place in IRAM_region { readwrite, block CSTACK, block HEAP }; \ No newline at end of file diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.lds b/bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.lds new file mode 100644 index 0000000000..d75d77b242 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.lds @@ -0,0 +1,154 @@ +/* + * linker script for STM32L4XX with GNU ld + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 2048k /* 2048KB flash */ + RAM1 (rw) : ORIGIN = 0x20000000, LENGTH = 256k /* 256k sram */ + RAM2 (rw) : ORIGIN = 0x20040000, LENGTH = 384k /* 384k sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + PROVIDE(__ctors_start__ = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE(__ctors_end__ = .); + + . = ALIGN(4); + _etext = .; + } > ROM = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > ROM + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM2 + + .stack : + { + . = ALIGN(4); + _sstack = .; + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >RAM2 + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > RAM2 + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.sct b/bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.sct new file mode 100644 index 0000000000..1789d52d63 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/linker_scripts/link.sct @@ -0,0 +1,19 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00200000 { ; load region size_region + ER_IROM1 0x08000000 0x00200000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_IRAM1 0x20000000 0x000A0000 { ; RW data + .ANY (+RW +ZI) + } + + + +} + diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/figures/board.png b/bsp/stm32/stm32l4r9-st-sensortile-box/figures/board.png new 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### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::ARMCC + 0 + + + STM32L4R9ZIJx + STMicroelectronics + Keil.STM32L4xx_DFP.2.5.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x000A0000) IROM(0x08000000,0x00200000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048_Dual -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9ZIJx$CMSIS\Flash\STM32L4Rx_2048_Dual.FLM)) + 0 + $$Device:STM32L4R9ZIJx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L4R9ZIJx$CMSIS\SVD\STM32L4R9.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rtthread + 1 + 0 + 0 + 1 + 0 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0xa0000 + + + 1 + 0x8000000 + 0x200000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x200000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0xa0000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + USE_HAL_DRIVER, STM32L4R9xx, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND + + applications;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\CubeMX_Config\Core\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\none-gcc;..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc;..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include;..\libraries\STM32L4xx_HAL\CMSIS\Include;..\..\..\examples\utest\testcases\kernel + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Applications + + + main.c + 1 + applications\main.c + + + + + CPU + + + div0.c + 1 + ..\..\..\libcpu\arm\common\div0.c + + + backtrace.c + 1 + ..\..\..\libcpu\arm\common\backtrace.c + + + showmem.c + 1 + ..\..\..\libcpu\arm\common\showmem.c + + + cpuport.c + 1 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + context_rvds.S + 2 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + + + + + DeviceDrivers + + + pin.c + 1 + ..\..\..\components\drivers\misc\pin.c + + + serial.c + 1 + ..\..\..\components\drivers\serial\serial.c + + + workqueue.c + 1 + ..\..\..\components\drivers\src\workqueue.c + + + ringblk_buf.c + 1 + ..\..\..\components\drivers\src\ringblk_buf.c + + + dataqueue.c + 1 + ..\..\..\components\drivers\src\dataqueue.c + + + ringbuffer.c + 1 + ..\..\..\components\drivers\src\ringbuffer.c + + + pipe.c + 1 + ..\..\..\components\drivers\src\pipe.c + + + completion.c + 1 + ..\..\..\components\drivers\src\completion.c + + + waitqueue.c + 1 + ..\..\..\components\drivers\src\waitqueue.c + + + + + Drivers + + + stm32l4xx_hal_msp.c + 1 + board\CubeMX_Config\Core\Src\stm32l4xx_hal_msp.c + + + startup_stm32l4r9xx.s + 2 + ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l4r9xx.s + + + board.c + 1 + board\board.c + + + drv_gpio.c + 1 + ..\libraries\HAL_Drivers\drv_gpio.c + + + drv_usart.c + 1 + ..\libraries\HAL_Drivers\drv_usart.c + + + drv_common.c + 1 + ..\libraries\HAL_Drivers\drv_common.c + + + + + finsh + + + shell.c + 1 + ..\..\..\components\finsh\shell.c + + + cmd.c + 1 + ..\..\..\components\finsh\cmd.c + + + msh.c + 1 + ..\..\..\components\finsh\msh.c + + + + + Kernel + + + object.c + 1 + ..\..\..\src\object.c + + + idle.c + 1 + ..\..\..\src\idle.c + + + irq.c + 1 + ..\..\..\src\irq.c + + + memheap.c + 1 + ..\..\..\src\memheap.c + + + thread.c + 1 + ..\..\..\src\thread.c + + + clock.c + 1 + ..\..\..\src\clock.c + + + timer.c + 1 + ..\..\..\src\timer.c + + + scheduler.c + 1 + ..\..\..\src\scheduler.c + + + kservice.c + 1 + ..\..\..\src\kservice.c + + + components.c + 1 + ..\..\..\src\components.c + + + device.c + 1 + ..\..\..\src\device.c + + + mempool.c + 1 + ..\..\..\src\mempool.c + + + ipc.c + 1 + ..\..\..\src\ipc.c + + + + + Libraries + + + stm32l4xx_hal_cryp.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp.c + + + stm32l4xx_hal_uart.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + stm32l4xx_hal_usart.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart.c + + + stm32l4xx_hal_cortex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_gpio.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + stm32l4xx_hal_dma.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_pwr.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + stm32l4xx_hal_rcc.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_exti.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c + + + stm32l4xx_hal_crc.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c + + + stm32l4xx_hal.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_usart_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c + + + stm32l4xx_hal_uart_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + stm32l4xx_hal_crc_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c + + + stm32l4xx_hal_comp.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_comp.c + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + stm32l4xx_hal_rng.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c + + + system_stm32l4xx.c + 1 + ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c + + + stm32l4xx_hal_cryp_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp_ex.c + + + + + + + + + + + + + + diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/rtconfig.h b/bsp/stm32/stm32l4r9-st-sensortile-box/rtconfig.h new file mode 100644 index 0000000000..2b1740bc1c --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/rtconfig.h @@ -0,0 +1,183 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_MEMHEAP +#define RT_USING_MEMHEAP_AS_HEAP +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 256 +#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_VER_NUM 0x40004 +#define ARCH_ARM +#define RT_USING_CPU_FFS +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M4 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_CMD_SIZE 80 +#define FINSH_USING_MSH +#define FINSH_USING_MSH_DEFAULT +#define FINSH_USING_MSH_ONLY +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* AI packages */ + + +/* miscellaneous packages */ + + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + +#define SOC_FAMILY_STM32 +#define SOC_SERIES_STM32L4 + +/* Hardware Drivers Config */ + +#define SOC_STM32L4R9ZI + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART1 + +#endif diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/rtconfig.py b/bsp/stm32/stm32l4r9-st-sensortile-box/rtconfig.py new file mode 100644 index 0000000000..db96c15631 --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/rtconfig.py @@ -0,0 +1,150 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread.map --strict --scatter "board\linker_scripts\link.sct"' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M4' + CFLAGS += ' -e' + CFLAGS += ' --fpu=VFPv4_sp' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M4' + AFLAGS += ' --fpu VFPv4_sp' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/template.ewd b/bsp/stm32/stm32l4r9-st-sensortile-box/template.ewd new file mode 100644 index 0000000000..d420552e8b --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/template.ewd @@ -0,0 +1,2966 @@ + + + 3 + + rt-thread + + ARM + + 1 + + C-SPY + 2 + + 30 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + + Release + + ARM + + 0 + + C-SPY + 2 + + 30 + 1 + 0 + + + + + + + + + + + + + + + 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### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32L4Rx_2048_Dual -FL0200000 -FS08000000 -FP0($$Device:STM32L4R9ZIJx$CMSIS\Flash\STM32L4Rx_2048_Dual.FLM) + + + 0 + ST-LINKIII-KEIL_SWO + -U066DFF565251887067022235 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048_Dual.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9ZIJx$CMSIS\Flash\STM32L4Rx_2048_Dual.FLM) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + Source Group 1 + 0 + 0 + 0 + 0 + + + diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/template.uvprojx b/bsp/stm32/stm32l4r9-st-sensortile-box/template.uvprojx new file mode 100644 index 0000000000..d8760f590a --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/template.uvprojx @@ -0,0 +1,396 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32L4R9ZIJx + STMicroelectronics + Keil.STM32L4xx_DFP.2.5.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x000A0000) IROM(0x08000000,0x00200000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048_Dual -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9ZIJx$CMSIS\Flash\STM32L4Rx_2048_Dual.FLM)) + 0 + $$Device:STM32L4R9ZIJx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L4R9ZIJx$CMSIS\SVD\STM32L4R9.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rtthread + 1 + 0 + 0 + 1 + 0 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0xa0000 + + + 1 + 0x8000000 + 0x200000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x200000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0xa0000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Source Group 1 + + + + + + + + + + + + From 5b28191510f5d3a4cf0130e46c7a1b6284433d69 Mon Sep 17 00:00:00 2001 From: supperthomas <78900636@qq.com> Date: Tue, 10 Aug 2021 20:09:29 +0800 Subject: [PATCH 2/4] fix the startup.s to the newest version --- .../Source/Templates/arm/startup_stm32l4r9xx.s | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/bsp/stm32/libraries/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/arm/startup_stm32l4r9xx.s b/bsp/stm32/libraries/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/arm/startup_stm32l4r9xx.s index 8c35ea53ee..c476aa275f 100644 --- a/bsp/stm32/libraries/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/arm/startup_stm32l4r9xx.s +++ b/bsp/stm32/libraries/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/arm/startup_stm32l4r9xx.s @@ -10,26 +10,25 @@ ;* calls main()). ;* After Reset the Cortex-M4 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ;* ;*

© Copyright (c) 2017 STMicroelectronics. ;* All rights reserved.

;* -;* This software component is licensed by ST under BSD 3-Clause license, +;* This software component is licensed by ST under Apache License, Version 2.0, ;* the "License"; You may not use this file except in compliance with the ;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* opensource.org/licenses/Apache-2.0 ;* ;******************************************************************************* -; +;* <<< Use Configuration Wizard in Context Menu >>> ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; Stack Configuration ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; -Stack_Size EQU 0x400; +Stack_Size EQU 0x400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size @@ -40,7 +39,7 @@ __initial_sp ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; -Heap_Size EQU 0x200; +Heap_Size EQU 0x200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base From a2320f78b607542ec2fb2a50a0dd50b4e19e18af Mon Sep 17 00:00:00 2001 From: supperthomas <78900636@qq.com> Date: Tue, 10 Aug 2021 20:15:33 +0800 Subject: [PATCH 3/4] fix the RAM size --- .../stm32l4r9-st-sensortile-box/board/board.h | 23 +++++++++++++------ 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h b/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h index 7d85022bb4..049be64f38 100644 --- a/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/board.h @@ -5,8 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-5 SummerGift first version - * 2019-04-09 jhb + * 2021-08-09 supperthomas first version */ #ifndef __BOARD_H__ @@ -25,12 +24,22 @@ extern "C" { #define STM32_FLASH_SIZE (2048 * 1024) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) -#define STM32_SRAM3_SIZE (384) -#define STM32_SRAM3_START (0x20040000) -#define STM32_SRAM3_END (STM32_SRAM3_START + STM32_SRAM3_SIZE * 1024) +#define STM32_SRAM1_SIZE (640) +#define STM32_SRAM1_START (0x20000000) +#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) -#define HEAP_BEGIN STM32_SRAM3_START -#define HEAP_END STM32_SRAM3_END +#if defined(__CC_ARM) || defined(__CLANG_ARM) +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __bss_end; +#define HEAP_BEGIN ((void *)&__bss_end) +#endif + +#define HEAP_END STM32_SRAM1_END void SystemClock_Config(void); From 4a2f68589eb7d42e9d2fba286ef0a53d703ff9c6 Mon Sep 17 00:00:00 2001 From: supperthomas <78900636@qq.com> Date: Tue, 10 Aug 2021 21:30:07 +0800 Subject: [PATCH 4/4] add the ci build --- .github/workflows/action.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/action.yml b/.github/workflows/action.yml index 2959a63c07..1e80f1841a 100644 --- a/.github/workflows/action.yml +++ b/.github/workflows/action.yml @@ -108,6 +108,7 @@ jobs: - {RTT_BSP: "stm32/stm32h747-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "stm32/stm32h750-artpi-h750", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "stm32/stm32l4r9-st-eval", RTT_TOOL_CHAIN: "sourcery-arm"} + - {RTT_BSP: "stm32/stm32l4r9-st-sensortile-box", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "stm32/stm32l010-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "stm32/stm32l053-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "stm32/stm32l412-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}