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[bsp][essemi] add bsp es32f365x

This commit is contained in:
liuhy 2021-10-15 14:47:01 +08:00
parent 7516c14fa5
commit 2e5fb6bf7e
51 changed files with 23816 additions and 0 deletions
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570
bsp/essemi/es32f365x/.config Normal file
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#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=512
# CONFIG_RT_USING_TIMER_SOFT is not set
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
CONFIG_RT_USING_SIGNALS=y
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_USERHEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40003
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
CONFIG_FINSH_USING_MSH_ONLY=y
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_LIBC_USING_TIME=y
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_MEMORYPERF is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_PPOOL is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
# CONFIG_PKG_USING_LY68L6400 is not set
# CONFIG_PKG_USING_DM9051 is not set
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_NES is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_LZMA is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
#
# games: games run on RT-Thread console
#
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
CONFIG_SOC_ES32F3656LT=y
#
# Hardware Drivers Config
#
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
#
# UART Drivers
#
CONFIG_BSP_USING_UART0=y
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_UART4 is not set
# CONFIG_BSP_USING_UART5 is not set
#
# SPI Drivers
#
# CONFIG_BSP_USING_SPI0 is not set
# CONFIG_BSP_USING_SPI1 is not set
# CONFIG_BSP_USING_SPI2 is not set
#
# I2C Drivers
#
# CONFIG_BSP_USING_I2C0 is not set
# CONFIG_BSP_USING_I2C1 is not set
#
# CAN Drivers
#
# CONFIG_BSP_USING_CAN0 is not set
#
# ADC Drivers
#
# CONFIG_BSP_USING_ADC0 is not set
# CONFIG_BSP_USING_ADC1 is not set
#
# RTC Drivers
#
# CONFIG_BSP_USING_RTC is not set
#
# HWTIMER Drivers
#
# CONFIG_BSP_USING_AD16C4T0_HWTIMER is not set
# CONFIG_BSP_USING_AD16C4T1_HWTIMER is not set
# CONFIG_BSP_USING_GP32C4T0_HWTIMER is not set
# CONFIG_BSP_USING_GP32C4T1_HWTIMER is not set
# CONFIG_BSP_USING_GP16C4T0_HWTIMER is not set
# CONFIG_BSP_USING_GP16C4T1_HWTIMER is not set
# CONFIG_BSP_USING_BS16T0_HWTIMER is not set
# CONFIG_BSP_USING_BS16T1_HWTIMER is not set
#
# PWM Drivers
#
# CONFIG_BSP_USING_AD16C4T0_PWM is not set
# CONFIG_BSP_USING_AD16C4T1_PWM is not set
# CONFIG_BSP_USING_GP32C4T0_PWM is not set
# CONFIG_BSP_USING_GP32C4T1_PWM is not set
# CONFIG_BSP_USING_GP16C4T0_PWM is not set
# CONFIG_BSP_USING_GP16C4T1_PWM is not set
#
# PM Drivers
#
# CONFIG_BSP_USING_PM is not set
#
# Onboard Peripheral Drivers
#
#
# Offboard Peripheral Drivers
#
#
# Peripheral Drivers test example
#
# CONFIG_BSP_USING_EXAMPLE_ADC_VOL is not set
# CONFIG_BSP_USING_EXAMPLE_HWTIMER is not set
# CONFIG_BSP_USING_EXAMPLE_I2C is not set
# CONFIG_BSP_USING_EXAMPLE_LED_BLINK is not set
# CONFIG_BSP_USING_EXAMPLE_PIN_BEEP is not set
# CONFIG_BSP_USING_EXAMPLE_PWM_LED is not set
# CONFIG_BSP_USING_EXAMPLE_RTC is not set
# CONFIG_BSP_USING_EXAMPLE_SPI is not set
# CONFIG_BSP_USING_EXAMPLE_UART is not set
# CONFIG_BSP_USING_EXAMPLE_CAN is not set
# CONFIG_BSP_USING_EXAMPLE_PM is not set

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bsp/essemi/es32f365x/Kconfig Normal file
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mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
config SOC_ES32F3696LT
bool
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
default y
source "drivers/Kconfig"

104
bsp/essemi/es32f365x/README.md Normal file
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# ES-PDS-ES32F365x 开发板 BSP 说明
标签： EastSoft、国产MCU、Cortex-M3、ES32F365x
## 1. 简介
本文档为上海东软载波微电子开发团队为 ES-PDS-ES32F365x 开发板提供的 BSP (板级支持包) 说明。
通过阅读本文档，开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
### 1.1 开发板介绍
主要内容如下：
ES-PDS-ES32F365x 是东软载波微电子官方推出的一款基于 ARM Cortex-M3 内核的开发板，最高主频为 96MHz，可满足基础功能测试及高端功能扩展等开发需求。
该开发板常用 **板载资源** 如下：
- MCU：ES32F3656LT，主频 96MHz，64KB SRAM，512KB FLASH，50 GPIOs
- 外部模块：SPI FLASH (MX25L64，8MB)、I2C EEPROM (M24C04，512B)
- 常用接口：GPIO、UART、SPI、I2C、CAN
- 调试接口，ESLinkⅡ(EastSoft 官方推出的开发工具，有标准版和mini版两种版本，均自带 CDC 串口功能) SWD 下载
外设支持:
本 BSP 目前对外设的支持情况如下：
| **板载外设** | **支持情况** | **备注** |
| :----------- | :----------: | :-------------- |
| SPI FLASH | 支持 | SPI0 |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | 50 GPIOs |
| UART | 支持 | UART0/1/2/3/4/5 |
| SPI | 支持 | SPI0/1/2 |
| I2C | 支持 | I2C0/1 |
| CAN | 支持 | CAN0 |
| PWM | 支持 | PWM0/1 |
| TIMER | 支持 | TIMER0/1 |
| RTC | 支持 | RTC |
| ADC | 支持 | ADC0 |
### 1.2 注意事项
更多详细信息请咨询[上海东软载波微电子技术支持](http://www.essemi.com/)
## 2. 快速上手
本 BSP 为开发者提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
**注意**：es32f365x的bsp 依赖 es32f369x的bsp。（ es32f369x的bsp中的库为es32f36xx）
​ es32f365x与es32f369x相比，SRAM较小，且没有USB。
### 编译下载
双击 project.uvprojx 文件，打开 MDK5 工程，工程默认配置使用 JLink 下载程序，在通过 JLink 连接开发板的基础上，点击下载按钮即可下载程序到开发板，如果使用 ESLinkⅡ，则选择 "CMSIS-DAP Debugger"，连接正常后即可编译并下载程序到开发板。
### 运行结果
下载程序成功之后，系统会自动运行，观察串口输出的信息，同时开发板LED闪烁。
```bash
\ | /
- RT - Thread Operating System
/ | \ 4.0.3 build Oct 11 2021
2006 - 2021 Copyright by rt-thread team
msh >
```
## 3. 进阶使用
此 BSP 默认只开启了 GPIO 和 uart0 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下：
1. 在 bsp 下打开 env 工具。
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
a）如果需要使用内核用例，先配置rt-thread内核，如图：
![kernel_config](../es32f369x/figures/k_conf.jpg)
然后配置内核用例，如图：
![kernel_samples](../es32f369x/figures/k_ex.jpg)
b）如果需要使用驱动用例：先使能驱动，如图：
![driver_config](../es32f369x/figures/d_conf.jpg)
然后配置驱动用例，如图：
![d_ex](../es32f369x/figures/d_ex.jpg)
3. 输入`pkgs --update`命令更新软件包。
4. 输入`scons --target=mdk5/iar` 命令重新生成工程。
更多 Env 工具的详细介绍请参考 [RT-Thread 文档中心](https://www.rt-thread.org/document/site/)
## 4. 联系人信息
- [liuhongyan](https://gitee.com/liuhongyan98)
## 5. 参考
- [ EastSoft 官网](http://www.essemi.com)

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# for module compiling
import os
Import('RTT_ROOT')
objs = []
cwd = str(Dir('#'))
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')

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import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
print(RTT_ROOT)
exit(-1)
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
Export('RTT_ROOT')
Export('rtconfig')
ESSEMI_ROOT = os.path.abspath('./')
es32f36xx_lib_path_prefix = os.path.dirname(ESSEMI_ROOT) + '/es32f369x'
ES32F36XX_DRV_ROOT = es32f36xx_lib_path_prefix + '/drivers'
Export('ES32F36XX_DRV_ROOT')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
es32f36xx_library = 'libraries'
rtconfig.BSP_LIBRARY_TYPE = es32f36xx_library
# include libraries
objs.extend(SConscript(os.path.join(es32f36xx_lib_path_prefix, es32f36xx_library, 'SConscript')))
# make a building
DoBuilding(TARGET, objs)

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Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-01-14 wangyq the first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "drv_gpio.h"
#define LED_PIN GET_PIN( F , 0 )
int main(void)
{
int count = 1;
/* set pin mode to output */
rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
while (count++)
{
rt_pin_write(LED_PIN, PIN_HIGH);
rt_thread_mdelay(500);
rt_pin_write(LED_PIN, PIN_LOW);
rt_thread_mdelay(500);
}
return RT_EOK;
}

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menu "UART Drivers"
config BSP_USING_UART0
bool "Register UART0 "
select RT_USING_SERIAL
default y
if BSP_USING_UART0
config BSP_UART0_TX_USING_DMA
bool "UART0 using DMA TX"
select RT_SERIAL_USING_DMA
default n
config BSP_UART0_RX_USING_DMA
bool "UART0 using DMA RX"
select RT_SERIAL_USING_DMA
default n
endif
config BSP_USING_UART1
bool "Register UART1 "
select RT_USING_SERIAL
default n
if BSP_USING_UART1
config BSP_UART1_TX_USING_DMA
bool "UART1 using DMA TX"
select RT_SERIAL_USING_DMA
default n
config BSP_UART1_RX_USING_DMA
bool "UART1 using DMA RX"
select RT_SERIAL_USING_DMA
default n
endif
config BSP_USING_UART2
bool "Register UART2 "
select RT_USING_SERIAL
default n
if BSP_USING_UART2
config BSP_UART2_TX_USING_DMA
bool "UART2 using DMA TX"
select RT_SERIAL_USING_DMA
default n
config BSP_UART2_RX_USING_DMA
bool "UART2 using DMA RX"
select RT_SERIAL_USING_DMA
default n
endif
config BSP_USING_UART3
bool "Register UART3 "
select RT_USING_SERIAL
default n
if BSP_USING_UART3
config BSP_UART3_TX_USING_DMA
bool "UART3 using DMA TX"
default n
config BSP_UART3_RX_USING_DMA
bool "UART3 using DMA RX"
default n
endif
config BSP_USING_UART4
bool "Register UART4 "
select RT_USING_SERIAL
default n
if BSP_USING_UART4
config BSP_UART4_TX_USING_DMA
bool "UART4 using DMA TX"
select RT_SERIAL_USING_DMA
default n
config BSP_UART4_RX_USING_DMA
bool "UART4 using DMA RX"
select RT_SERIAL_USING_DMA
default n
endif
config BSP_USING_UART5
bool "Register UART5 "
select RT_USING_SERIAL
default n
if BSP_USING_UART5
config BSP_UART5_TX_USING_DMA
bool "UART5 using DMA TX"
select RT_SERIAL_USING_DMA
default n
config BSP_UART5_RX_USING_DMA
bool "UART5 using DMA RX"
select RT_SERIAL_USING_DMA
default n
endif
endmenu
menu "SPI Drivers"
config BSP_USING_SPI0
bool "Register SPI0 "
select RT_USING_SPI
select RT_USING_PIN
default n
config BSP_USING_SPI1
bool "Register SPI1 "
select RT_USING_SPI
select RT_USING_PIN
default n
config BSP_USING_SPI2
bool "Register SPI2 "
select RT_USING_SPI
select RT_USING_PIN
default n
endmenu
menu "I2C Drivers"
config BSP_USING_I2C0
bool "Register I2C0 "
select RT_USING_I2C
default n
config BSP_USING_I2C1
bool "Register I2C1 "
select RT_USING_I2C
default n
endmenu
menu "CAN Drivers"
config BSP_USING_CAN0
bool "Register CAN0 "
select RT_USING_CAN
select RT_CAN_USING_HDR
select BSP_USING_CAN
default n
endmenu
menu "ADC Drivers"
config BSP_USING_ADC0
bool "Register ADC0 "
select RT_USING_ADC
default n
config BSP_USING_ADC1
bool "Register ADC1 "
select RT_USING_ADC
default n
endmenu
menu "RTC Drivers"
config BSP_USING_RTC
bool "Register RTC "
select RT_USING_RTC
default n
endmenu
menu "HWTIMER Drivers"
config BSP_USING_AD16C4T0_HWTIMER
bool "Register HWTIMER0 "
select RT_USING_HWTIMER
default n
config BSP_USING_AD16C4T1_HWTIMER
bool "Register HWTIMER1 "
select RT_USING_HWTIMER
default n
config BSP_USING_GP32C4T0_HWTIMER
bool "Register HWTIMER2 "
select RT_USING_HWTIMER
default n
config BSP_USING_GP32C4T1_HWTIMER
bool "Register HWTIMER3 "
select RT_USING_HWTIMER
default n
config BSP_USING_GP16C4T0_HWTIMER
bool "Register HWTIMER4 "
select RT_USING_HWTIMER
default n
config BSP_USING_GP16C4T1_HWTIMER
bool "Register HWTIMER5 "
select RT_USING_HWTIMER
default n
config BSP_USING_BS16T0_HWTIMER
bool "Register HWTIMER6 "
select RT_USING_HWTIMER
default n
config BSP_USING_BS16T1_HWTIMER
bool "Register HWTIMER7 "
select RT_USING_HWTIMER
default n
endmenu
menu "PWM Drivers"
config BSP_USING_AD16C4T0_PWM
bool "Register PWM0 "
select RT_USING_PWM
default n
depends on !BSP_USING_AD16C4T0_HWTIMER
config BSP_USING_AD16C4T1_PWM
bool "Register PWM1 "
select RT_USING_PWM
default n
depends on !BSP_USING_AD16C4T1_HWTIMER
config BSP_USING_GP32C4T0_PWM
bool "Register PWM2 "
select RT_USING_PWM
default n
depends on !BSP_USING_GP32C4T0_HWTIMER
config BSP_USING_GP32C4T1_PWM
bool "Register PWM3 "
select RT_USING_PWM
default n
depends on !BSP_USING_GP32C4T1_HWTIMER
config BSP_USING_GP16C4T0_PWM
bool "Register PWM4 "
select RT_USING_PWM
default n
depends on !BSP_USING_GP16C4T0_HWTIMER
config BSP_USING_GP16C4T1_PWM
bool "Register PWM5 "
select RT_USING_PWM
default n
depends on !BSP_USING_GP16C4T1_HWTIMER
endmenu
menu "PM Drivers"
config BSP_USING_PM
bool "Register PM "
select RT_USING_PM
default n
endmenu
menu "DMA Drivers"
config BSP_USING_DMA0
bool "Using DMA0 "
select ES_CONF_DMA_ENABLE
default n
endmenu

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/*
* Change Logs:
* Date Author Notes
* 2021-04-20 liuhy the first version
*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_ADC_H__
#define __ES_CONF_INFO_ADC_H__
#include "es_conf_info_map.h"
#include <ald_adc.h>
#define ES_C_ADC_CLK_DIV_1 ADC_CKDIV_1
#define ES_C_ADC_CLK_DIV_2 ADC_CKDIV_2
#define ES_C_ADC_CLK_DIV_4 ADC_CKDIV_4
#define ES_C_ADC_CLK_DIV_8 ADC_CKDIV_8
#define ES_C_ADC_CLK_DIV_16 ADC_CKDIV_16
#define ES_C_ADC_CLK_DIV_32 ADC_CKDIV_32
#define ES_C_ADC_CLK_DIV_64 ADC_CKDIV_64
#define ES_C_ADC_CLK_DIV_128 ADC_CKDIV_128
#define ES_C_ADC_ALIGN_RIGHT ADC_DATAALIGN_RIGHT
#define ES_C_ADC_ALIGN_LEFT ADC_DATAALIGN_LEFT
#define ES_C_ADC_CONV_BIT_6 ADC_CONV_BIT_6
#define ES_C_ADC_CONV_BIT_8 ADC_CONV_BIT_8
#define ES_C_ADC_CONV_BIT_10 ADC_CONV_BIT_10
#define ES_C_ADC_CONV_BIT_12 ADC_CONV_BIT_12
#define ES_C_ADC_SAMPLE_TIME_1 ADC_SAMPLETIME_1
#define ES_C_ADC_SAMPLE_TIME_2 ADC_SAMPLETIME_2
#define ES_C_ADC_SAMPLE_TIME_4 ADC_SAMPLETIME_4
#define ES_C_ADC_SAMPLE_TIME_15 ADC_SAMPLETIME_15
/* ADC 配置 */
/* codes_main */
#define ES_ADC0_ALIGN ES_C_ADC_ALIGN_RIGHT
#define ES_ADC1_ALIGN ES_C_ADC_ALIGN_RIGHT
#define ES_ADC1_DATA_BIT ES_C_ADC_CONV_BIT_12
#define ES_ADC0_DATA_BIT ES_C_ADC_CONV_BIT_12
#ifndef ES_DEVICE_NAME_ADC0
#define ES_DEVICE_NAME_ADC0 "adc0"
#endif
#ifndef ES_DEVICE_NAME_ADC1
#define ES_DEVICE_NAME_ADC1 "adc1"
#endif
#ifndef ES_ADC0_CLK_DIV
#define ES_ADC0_CLK_DIV ES_C_ADC_CLK_DIV_128
#endif
#ifndef ES_ADC0_ALIGN
#define ES_ADC0_ALIGN ES_C_ADC_ALIGN_RIGHT
#endif
#ifndef ES_ADC0_DATA_BIT
#define ES_ADC0_DATA_BIT ES_C_ADC_CONV_BIT_12
#endif
#ifndef ES_ADC0_NCH_SAMPLETIME
#define ES_ADC0_NCH_SAMPLETIME ES_C_ADC_SAMPLE_TIME_4
#endif
#ifndef ES_ADC1_CLK_DIV
#define ES_ADC1_CLK_DIV ES_C_ADC_CLK_DIV_128
#endif
#ifndef ES_ADC1_ALIGN
#define ES_ADC1_ALIGN ES_C_ADC_ALIGN_RIGHT
#endif
#ifndef ES_ADC1_DATA_BIT
#define ES_ADC1_DATA_BIT ES_C_ADC_CONV_BIT_12
#endif
#ifndef ES_ADC1_NCH_SAMPLETIME
#define ES_ADC1_NCH_SAMPLETIME ES_C_ADC_SAMPLE_TIME_4
#endif
#endif

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/*
* Change Logs:
* Date Author Notes
* 2021-04-20 liuhy the first version
*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_CAN_H__
#define __ES_CONF_INFO_CAN_H__
#include "es_conf_info_map.h"
#include <ald_can.h>
#include <ald_gpio.h>
/*默认的CAN硬件过滤器的编号 0 */
#define ES_C_CAN_DEFAULT_FILTER_NUMBER 0
/*硬件过滤器，过滤帧类型*/
#define ES_C_CAN_FILTER_FRAME_TYPE 0
#define ES_C_CAN_SJW_NUM_1 CAN_SJW_1
#define ES_C_CAN_SJW_NUM_2 CAN_SJW_2
#define ES_C_CAN_SJW_NUM_3 CAN_SJW_3
#define ES_C_CAN_SJW_NUM_4 CAN_SJW_4
/* CAN 配置 */
/* codes_main */
#ifndef ES_DEVICE_NAME_CAN0
#define ES_DEVICE_NAME_CAN0 "can0"
#endif
#ifndef ES_CAN0_AUTO_BAN_RE_T
#define ES_CAN0_AUTO_BAN_RE_T ES_C_DISABLE
#endif
#ifndef ES_CAN0_SPEED
#define ES_CAN0_SPEED 1000000
#endif
#ifndef ES_CAN0_SJW
#define ES_CAN0_SJW ES_C_CAN_SJW_NUM_4
#endif
#define ES_CAN0_CONFIG \
{ \
ES_CAN0_SPEED, \
RT_CANMSG_BOX_SZ, \
RT_CANSND_BOX_NUM, \
RT_CAN_MODE_NORMAL, \
};
#endif

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/*
* Change Logs:
* Date Author Notes
* 2021-04-20 liuhy the first version
*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_CMU_H__
#define __ES_CONF_INFO_CMU_H__
#include <ald_cmu.h>
/* 时钟树 配置 */
#define ES_C_MUL_9 CMU_PLL1_OUTPUT_36M
#define ES_C_MUL_12 CMU_PLL1_OUTPUT_48M
#define ES_C_MUL_18 CMU_PLL1_OUTPUT_72M
#define ES_C_MUL_24 CMU_PLL1_OUTPUT_96M
#define ES_C_DIV_1 CMU_DIV_1
#define ES_C_DIV_2 CMU_DIV_2
#define ES_C_DIV_4 CMU_DIV_4
#define ES_C_DIV_8 CMU_DIV_8
#define ES_C_DIV_16 CMU_DIV_16
#define ES_C_DIV_32 CMU_DIV_32
#define ES_C_DIV_64 CMU_DIV_64
#define ES_C_DIV_128 CMU_DIV_128
#define ES_C_DIV_256 CMU_DIV_256
#define ES_C_DIV_512 CMU_DIV_512
#define ES_C_DIV_1024 CMU_DIV_1024
#define ES_C_DIV_2048 CMU_DIV_2048
#define ES_C_DIV_4096 CMU_DIV_4096
#define ES_C_HOSC_DIV_1 CMU_PLL1_INPUT_HOSC
#define ES_C_HOSC_DIV_2 CMU_PLL1_INPUT_HOSC_2
#define ES_C_HOSC_DIV_3 CMU_PLL1_INPUT_HOSC_3
#define ES_C_HOSC_DIV_4 CMU_PLL1_INPUT_HOSC_4
#define ES_C_HOSC_DIV_5 CMU_PLL1_INPUT_HOSC_5
#define ES_C_HOSC_DIV_6 CMU_PLL1_INPUT_HOSC_6
#define ES_C_HRC_DIV_6 CMU_PLL1_INPUT_HRC_6
#define ES_PLL1_REFER_CLK ES_C_HOSC_DIV_3
#define ES_PLL1_OUT_CLK ES_C_MUL_18
#define ES_CMU_PLL1_EN ES_C_ENABLE
#define ES_CMU_PLL1_SAFE_EN ES_C_DISABLE
#define ES_CMU_LOSC_EN ES_C_ENABLE
#define ES_CMU_LRC_EN ES_C_ENABLE
#define ES_CMU_HOSC_EN ES_C_ENABLE
#define ES_CMU_HRC_EN ES_C_ENABLE
#define ES_CMU_SYS_DIV ES_C_DIV_1
#define ES_CMU_HCLK_1_DIV ES_C_DIV_2
#define ES_CMU_HCLK_2_DIV ES_C_DIV_2
#define ES_CMU_PCLK_1_DIV ES_C_DIV_2
#define ES_CMU_PCLK_2_DIV ES_C_DIV_4
#define ES_SYS_CLK_SOURSE CMU_CLOCK_PLL1
#define ES_PLL_CLK 72000000
#define ES_SYS_SOURCE_CLK 72000000
#define ES_SYS_CLK 72000000
#define ES_PCLK1_CLK 36000000
#define ES_PCLK2_CLK 18000000
#define ES_HCLK1_CLK 36000000
#define ES_HCLK2_CLK 36000000
#define ES_CMU_EXTERN_CLK_LOSC 32768
#define ES_CMU_EXTERN_CLK_HOSC 12000000
#endif

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/*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd.
*
*/
#ifndef __ES_CONF_INFO_DMA_H__
#define __ES_CONF_INFO_DMA_H__
#include "es_conf_info_map.h"
#include <rtdevice.h>
#include <ald_dma.h>
#ifdef BSP_USING_DMA0
#define ES_CONF_DMA_ENABLE
#endif
enum ES_DMA_CHANNELS
{
#if defined(ES_CONF_UART0_DMA_TX)||defined(BSP_UART0_TX_USING_DMA)
ES_UART0_DMATX_CHANNEL,
#endif
#if defined(ES_CONF_UART0_DMA_RX)||defined(BSP_UART0_RX_USING_DMA)
ES_UART0_DMARX_CHANNEL,
#endif
#if defined(ES_CONF_UART1_DMA_TX)||defined(BSP_UART1_TX_USING_DMA)
ES_UART1_DMATX_CHANNEL,
#endif
#if defined(ES_CONF_UART1_DMA_RX)||defined(BSP_UART1_RX_USING_DMA)
ES_UART1_DMARX_CHANNEL,
#endif
#if defined(ES_CONF_UART2_DMA_TX)||defined(BSP_UART2_TX_USING_DMA)
ES_UART2_DMATX_CHANNEL,
#endif
#if defined(ES_CONF_UART2_DMA_RX)||defined(BSP_UART2_RX_USING_DMA)
ES_UART2_DMARX_CHANNEL,
#endif
#if defined(ES_CONF_UART3_DMA_TX)||defined(BSP_UART3_TX_USING_DMA)
ES_UART3_DMATX_CHANNEL,
#endif
#if defined(ES_CONF_UART3_DMA_RX)||defined(BSP_UART3_RX_USING_DMA)
ES_UART3_DMARX_CHANNEL,
#endif
#if defined(ES_CONF_UART4_DMA_TX)||defined(BSP_UART4_TX_USING_DMA)
ES_UART4_DMATX_CHANNEL,
#endif
#if defined(ES_CONF_UART4_DMA_RX)||defined(BSP_UART4_RX_USING_DMA)
ES_UART4_DMARX_CHANNEL,
#endif
#if defined(ES_CONF_UART5_DMA_TX)||defined(BSP_UART5_TX_USING_DMA)
ES_UART5_DMATX_CHANNEL,
#endif
#if defined(ES_CONF_UART5_DMA_RX)||defined(BSP_UART5_RX_USING_DMA)
ES_UART5_DMARX_CHANNEL,
#endif
ES_DMA_CHANNEL_NUM
};
#define ES_DMA_INVAILD_CHANNEL (DMA_CH_COUNT)
#define ES_DMA_USER_CHANNEL (ES_DMA_CHANNEL_NUM)
#endif /* __ES_CONF_INFO_DMA_H__ */

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/*
* Change Logs:
* Date Author Notes
* 2021-04-20 liuhy the first version
*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_HWTIMER_H__
#define __ES_CONF_INFO_HWTIMER_H__
#include <ald_cmu.h>
#include <ald_timer.h>
#define ES_C_HWTIMER_MODE_UP HWTIMER_CNTMODE_UP
#define ES_C_HWTIMER_MODE_DOWN HWTIMER_CNTMODE_DW
/* HWTIMER 配置 */
/* codes_main */
#ifndef ES_AD16C4T0_HWTIMER_MODE
#define ES_AD16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP
#endif
#ifndef ES_AD16C4T1_HWTIMER_MODE
#define ES_AD16C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP
#endif
#ifndef ES_GP32C4T0_HWTIMER_MODE
#define ES_GP32C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP
#endif
#ifndef ES_GP32C4T1_HWTIMER_MODE
#define ES_GP32C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP
#endif
#ifndef ES_GP16C4T0_HWTIMER_MODE
#define ES_GP16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP
#endif
#ifndef ES_GP16C4T1_HWTIMER_MODE
#define ES_GP16C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP
#endif
#ifndef ES_BS16T0_HWTIMER_MODE
#define ES_BS16T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP
#endif
#ifndef ES_BS16T1_HWTIMER_MODE
#define ES_BS16T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP
#endif
#define ES_AD16C4T0_HWTIMER_PRES 1
#define ES_AD16C4T1_HWTIMER_PRES 1
#define ES_GP16C4T0_HWTIMER_PRES 1
#define ES_GP16C4T1_HWTIMER_PRES 1
#define ES_GP32C4T0_HWTIMER_PRES 1
#define ES_GP32C4T1_HWTIMER_PRES 1
#define ES_BS16T0_HWTIMER_PRES 1
#define ES_BS16T1_HWTIMER_PRES 1
#ifndef ES_DEVICE_NAME_AD16C4T0_HWTIMER
#define ES_DEVICE_NAME_AD16C4T0_HWTIMER "timer0"
#endif
#ifndef ES_DEVICE_NAME_AD16C4T1_HWTIMER
#define ES_DEVICE_NAME_AD16C4T1_HWTIMER "timer1"
#endif
#ifndef ES_DEVICE_NAME_GP32C4T0_HWTIMER
#define ES_DEVICE_NAME_GP32C4T0_HWTIMER "timer2"
#endif
#ifndef ES_DEVICE_NAME_GP32C4T1_HWTIMER
#define ES_DEVICE_NAME_GP32C4T1_HWTIMER "timer3"
#endif
#ifndef ES_DEVICE_NAME_GP16C4T0_HWTIMER
#define ES_DEVICE_NAME_GP16C4T0_HWTIMER "timer4"
#endif
#ifndef ES_DEVICE_NAME_GP16C4T1_HWTIMER
#define ES_DEVICE_NAME_GP16C4T1_HWTIMER "timer5"
#endif
#ifndef ES_DEVICE_NAME_BS16T0_HWTIMER
#define ES_DEVICE_NAME_BS16T0_HWTIMER "timer6"
#endif
#ifndef ES_DEVICE_NAME_BS16T1_HWTIMER
#define ES_DEVICE_NAME_BS16T1_HWTIMER "timer7"
#endif
#endif

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/*
* Change Logs:
* Date Author Notes
* 2021-04-20 liuhy the first version
*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_I2C_H__
#define __ES_CONF_INFO_I2C_H__
#include "es_conf_info_map.h"
#include <ald_i2c.h>
#include <ald_gpio.h>
#include <rtdbg.h>
#define ES_C_I2C_STRETCH I2C_NOSTRETCH_DISABLE
#define ES_C_I2C_NO_STRETCH I2C_NOSTRETCH_ENABLE
#define ES_C_I2C_GENERALCALL I2C_GENERALCALL_ENABLE
#define ES_C_I2C_NO_GENERALCALL I2C_GENERALCALL_DISABLE
#define ES_C_I2C_ADDR_7_MODE I2C_ADDR_7BIT
#define ES_C_I2C_ADDR_10_MODE I2C_ADDR_10BIT
/* I2C 配置 */
/* codes_main */
#ifndef ES_DEVICE_NAME_I2C0
#define ES_DEVICE_NAME_I2C0 "i2c0"
#endif
#ifndef ES_DEVICE_NAME_I2C1
#define ES_DEVICE_NAME_I2C1 "i2c1"
#endif
#ifndef ES_I2C0_CLK_SPEED
#define ES_I2C0_CLK_SPEED 100000
#endif
#ifndef ES_I2C0_OWN_ADDR1
#define ES_I2C0_OWN_ADDR1 0x20
#endif
#ifndef ES_I2C0_GENERAL_CALL
#define ES_I2C0_GENERAL_CALL ES_C_I2C_NO_GENERALCALL
#endif
#ifndef ES_I2C0_STRETCH
#define ES_I2C0_STRETCH ES_C_I2C_STRETCH
#endif
#ifndef ES_I2C0_ADDR_MODE
#define ES_I2C0_ADDR_MODE ES_C_I2C_ADDR_7_MODE
#endif
#ifndef ES_I2C1_CLK_SPEED
#define ES_I2C1_CLK_SPEED 100000
#endif
#ifndef ES_I2C1_OWN_ADDR1
#define ES_I2C1_OWN_ADDR1 0x20
#endif
#ifndef ES_I2C1_GENERAL_CALL
#define ES_I2C1_GENERAL_CALL ES_C_I2C_NO_GENERALCALL
#endif
#ifndef ES_I2C1_STRETCH
#define ES_I2C1_STRETCH ES_C_I2C_STRETCH
#endif
#ifndef ES_I2C1_ADDR_MODE
#define ES_I2C1_ADDR_MODE ES_C_I2C_ADDR_7_MODE
#endif
#endif

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/*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_PM_H__
#define __ES_CONF_INFO_PM_H__
#include <ald_cmu.h>
#include <ald_pmu.h>
#define ES_PMU_SAVE_LOAD_UART
/* PM 配置 */
#endif

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/*
* Change Logs:
* Date Author Notes
* 2021-04-20 liuhy the first version
*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_PWM_H__
#define __ES_CONF_INFO_PWM_H__
#include "es_conf_info_map.h"
#include <ald_cmu.h>
#include <ald_timer.h>
#include <ald_gpio.h>
#define ES_C_PWM_OC_POL_HIGH TIMER_OC_POLARITY_HIGH
#define ES_C_PWM_OC_POL_LOW TIMER_OC_POLARITY_LOW
#define ES_C_PWM_OC_MODE_PWM1 TIMER_OC_MODE_PWM1
#define ES_C_PWM_OC_MODE_PWM2 TIMER_OC_MODE_PWM2
/* PWM 配置 */
/* codes_main */
#define ES_PWM_OC_POLARITY ES_C_PWM_OC_POL_HIGH
#define ES_PWM_OC_MODE ES_C_PWM_OC_MODE_PWM2
#ifndef ES_PWM_OC_POLARITY
#define ES_PWM_OC_POLARITY ES_C_PWM_OC_POL_HIGH
#endif
#ifndef ES_PWM_OC_MODE
#define ES_PWM_OC_MODE ES_C_PWM_OC_MODE_PWM2
#endif
#ifndef ES_DEVICE_NAME_AD16C4T0_PWM
#define ES_DEVICE_NAME_AD16C4T0_PWM "pwm0"
#endif
#ifndef ES_DEVICE_NAME_AD16C4T1_PWM
#define ES_DEVICE_NAME_AD16C4T1_PWM "pwm1"
#endif
#ifndef ES_DEVICE_NAME_GP32C4T0_PWM
#define ES_DEVICE_NAME_GP32C4T0_PWM "pwm2"
#endif
#ifndef ES_DEVICE_NAME_GP32C4T1_PWM
#define ES_DEVICE_NAME_GP32C4T1_PWM "pwm3"
#endif
#ifndef ES_DEVICE_NAME_GP16C4T0_PWM
#define ES_DEVICE_NAME_GP16C4T0_PWM "pwm4"
#endif
#ifndef ES_DEVICE_NAME_GP16C4T1_PWM
#define ES_DEVICE_NAME_GP16C4T1_PWM "pwm5"
#endif
#endif

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/*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_RTC_H__
#define __ES_CONF_INFO_RTC_H__
#include <ald_cmu.h>
#include <ald_rtc.h>
/* RTC 配置 */
#define ES_C_RTC_SOURCE_LRC RTC_SOURCE_LRC
#define ES_C_RTC_SOURCE_LOSC RTC_SOURCE_LOSC
#define ES_RTC_CLK_SOURCE ES_C_RTC_SOURCE_LOSC
/* codes_main */
#ifndef ES_DEVICE_NAME_RTC
#define ES_DEVICE_NAME_RTC "rtc"
#endif
#endif

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/*
* Change Logs:
* Date Author Notes
* 2021-04-20 liuhy the first version
*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_SELECT_H__
#define __ES_CONF_INFO_SELECT_H__
#define ES_C_ENABLE 1
#define ES_C_DISABLE 0
/* codes_main */
#ifndef ES_USE_ASSERT
#define ES_USE_ASSERT ES_C_DISABLE
#endif
#if ES_USE_ASSERT
#define USE_ASSERT
#endif
#endif

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bsp/essemi/es32f365x/drivers/ES/es_conf_info_spi.h Normal file
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/*
* Change Logs:
* Date Author Notes
* 2021-04-20 liuhy the first version
*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_SPI_H__
#define __ES_CONF_INFO_SPI_H__
#include "es_conf_info_map.h"
#include <ald_spi.h>
#include <ald_gpio.h>
#include <ald_cmu.h>
/* SPI 配置 */
#define SPI_BUS_CONFIG(_CONF_,_I_) do{_CONF_.mode = 0U; \
_CONF_.mode |= ( ES_SPI##_I_##_MASTER_SLAVE | \
ES_SPI##_I_##_WIRE_3_4 | \
ES_SPI##_I_##_CPHA_1_2 | \
ES_SPI##_I_##_CPOL_H_L | \
ES_SPI##_I_##_CS | \
ES_SPI##_I_##_M_L_SB ); \
_CONF_.data_width = ES_SPI##_I_##_DATA_W; \
_CONF_.max_hz = ES_SPI##_I_##_MAX_HZ; \
}while(0)
// spi_config.mode &= ~RT_SPI_SLAVE; /* 主机模式 */
// spi_config.mode &= ~RT_SPI_3WIRE; /* 4线，双向传输 */
// spi_config.mode |= RT_SPI_CPHA; /* 第二边沿采样 */
// spi_config.mode |= RT_SPI_CPOL; /* 空闲高电平 */
// spi_config.mode |= RT_SPI_NO_CS; /* 禁用软件从机选择管理 */
// spi_config.mode |= RT_SPI_MSB; /* 高位在前 */
// spi_config.data_width = 8; /* 数据长度：8 */
// spi_config.max_hz = 2000000; /* 最快时钟频率 */
#define ES_C_SPI_CLK_POL_HIGH RT_SPI_CPOL
#define ES_C_SPI_CLK_POL_LOW !RT_SPI_CPOL
#define ES_C_SPI_CLK_PHA_FIRST !RT_SPI_CPHA
#define ES_C_SPI_CLK_PHA_SECOND RT_SPI_CPHA
#define ES_C_SPI_MSB RT_SPI_MSB
#define ES_C_SPI_LSB RT_SPI_LSB
#define ES_C_SPI_CS_LOW_LEVEL 0
#define ES_C_SPI_CS_HIGH_LEVEL 1
/* codes_main */
#ifndef ES_DEVICE_NAME_SPI0_BUS
#define ES_DEVICE_NAME_SPI0_BUS "spi0"
#endif
#ifndef ES_DEVICE_NAME_SPI0_DEV0
#define ES_DEVICE_NAME_SPI0_DEV0 "spi00"
#endif
#ifndef ES_DEVICE_NAME_SPI1_BUS
#define ES_DEVICE_NAME_SPI1_BUS "spi1"
#endif
#ifndef ES_DEVICE_NAME_SPI1_DEV0
#define ES_DEVICE_NAME_SPI1_DEV0 "spi10"
#endif
#ifndef ES_DEVICE_NAME_SPI2_BUS
#define ES_DEVICE_NAME_SPI2_BUS "spi2"
#endif
#ifndef ES_DEVICE_NAME_SPI2_DEV0
#define ES_DEVICE_NAME_SPI2_DEV0 "spi20"
#endif
#define ES_SPI_CS_LEVEL ES_C_SPI_CS_LOW_LEVEL
#ifndef ES_SPI0_CPHA_1_2
#define ES_SPI0_CPHA_1_2 ES_C_SPI_CLK_PHA_SECOND
#endif
#ifndef ES_SPI0_CPOL_H_L
#define ES_SPI0_CPOL_H_L ES_C_SPI_CLK_POL_HIGH
#endif
#ifndef ES_SPI0_M_L_SB
#define ES_SPI0_M_L_SB RT_SPI_MSB
#endif
#ifndef ES_SPI0_MAX_HZ
#define ES_SPI0_MAX_HZ 2000000
#endif
#ifndef ES_SPI0_NSS_PIN
#define ES_SPI0_NSS_PIN 0xFFFFFFFF
#endif
#ifndef ES_SPI1_CPHA_1_2
#define ES_SPI1_CPHA_1_2 ES_C_SPI_CLK_PHA_SECOND
#endif
#ifndef ES_SPI1_CPOL_H_L
#define ES_SPI1_CPOL_H_L ES_C_SPI_CLK_POL_HIGH
#endif
#ifndef ES_SPI1_M_L_SB
#define ES_SPI1_M_L_SB RT_SPI_MSB
#endif
#ifndef ES_SPI1_MAX_HZ
#define ES_SPI1_MAX_HZ 2000000
#endif
#ifndef ES_SPI1_NSS_PIN
#define ES_SPI1_NSS_PIN 0xFFFFFFFF
#endif
#ifndef ES_SPI2_CPHA_1_2
#define ES_SPI2_CPHA_1_2 ES_C_SPI_CLK_PHA_SECOND
#endif
#ifndef ES_SPI2_CPOL_H_L
#define ES_SPI2_CPOL_H_L ES_C_SPI_CLK_POL_HIGH
#endif
#ifndef ES_SPI2_M_L_SB
#define ES_SPI2_M_L_SB RT_SPI_MSB
#endif
#ifndef ES_SPI2_MAX_HZ
#define ES_SPI2_MAX_HZ 2000000
#endif
#ifndef ES_SPI2_NSS_PIN
#define ES_SPI2_NSS_PIN 0xFFFFFFFF
#endif
#define ES_SPI0_MASTER_SLAVE !RT_SPI_SLAVE
#define ES_SPI0_WIRE_3_4 !RT_SPI_3WIRE
#define ES_SPI0_CS RT_SPI_NO_CS
#define ES_SPI0_DATA_W 8
#define ES_SPI1_MASTER_SLAVE !RT_SPI_SLAVE
#define ES_SPI1_WIRE_3_4 !RT_SPI_3WIRE
#define ES_SPI1_CS RT_SPI_NO_CS
#define ES_SPI1_DATA_W 8
#define ES_SPI2_MASTER_SLAVE !RT_SPI_SLAVE
#define ES_SPI2_WIRE_3_4 !RT_SPI_3WIRE
#define ES_SPI2_CS RT_SPI_NO_CS
#define ES_SPI2_DATA_W 8
#endif

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/*
* Change Logs:
* Date Author Notes
* 2021-04-20 liuhy the first version
*
* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef __ES_CONF_INFO_UART_H__
#define __ES_CONF_INFO_UART_H__
#include "es_conf_info_map.h"
#include <ald_gpio.h>
#include <ald_uart.h>
#include <ald_cmu.h>
#define ES_C_UART_PARITY_NONE PARITY_NONE
#define ES_C_UART_PARITY_ODD PARITY_ODD
#define ES_C_UART_PARITY_EVEN PARITY_EVEN
#define ES_C_UART_STOP_1 STOP_BITS_1
#define ES_C_UART_STOP_2 STOP_BITS_2
/* UART 配置 */
/* codes_main */
#ifndef ES_DEVICE_NAME_UART0
#define ES_DEVICE_NAME_UART0 "uart0"
#endif
#ifndef ES_DEVICE_NAME_UART1
#define ES_DEVICE_NAME_UART1 "uart1"
#endif
#ifndef ES_DEVICE_NAME_UART2
#define ES_DEVICE_NAME_UART2 "uart2"
#endif
#ifndef ES_DEVICE_NAME_UART3
#define ES_DEVICE_NAME_UART3 "uart3"
#endif
#ifndef ES_DEVICE_NAME_UART4
#define ES_DEVICE_NAME_UART4 "uart4"
#endif
#ifndef ES_DEVICE_NAME_UART5
#define ES_DEVICE_NAME_UART5 "uart5"
#endif
#ifndef ES_CONF_UART0_BAUD_RATE
#define ES_CONF_UART0_BAUD_RATE 115200
#endif
#ifndef ES_CONF_UART0_PARITY
#define ES_CONF_UART0_PARITY ES_C_UART_PARITY_NONE
#endif
#ifndef ES_CONF_UART0_STOP_BITS
#define ES_CONF_UART0_STOP_BITS ES_C_UART_STOP_1
#endif
#ifndef ES_CONF_UART1_BAUD_RATE
#define ES_CONF_UART1_BAUD_RATE 115200
#endif
#ifndef ES_CONF_UART1_PARITY
#define ES_CONF_UART1_PARITY ES_C_UART_PARITY_NONE
#endif
#ifndef ES_CONF_UART1_STOP_BITS
#define ES_CONF_UART1_STOP_BITS ES_C_UART_STOP_1
#endif
#ifndef ES_CONF_UART2_BAUD_RATE
#define ES_CONF_UART2_BAUD_RATE 115200
#endif
#ifndef ES_CONF_UART2_PARITY
#define ES_CONF_UART2_PARITY ES_C_UART_PARITY_NONE
#endif
#ifndef ES_CONF_UART2_STOP_BITS
#define ES_CONF_UART2_STOP_BITS ES_C_UART_STOP_1
#endif
#ifndef ES_CONF_UART3_BAUD_RATE
#define ES_CONF_UART3_BAUD_RATE 115200
#endif
#ifndef ES_CONF_UART3_PARITY
#define ES_CONF_UART3_PARITY ES_C_UART_PARITY_NONE
#endif
#ifndef ES_CONF_UART3_STOP_BITS
#define ES_CONF_UART3_STOP_BITS ES_C_UART_STOP_1
#endif
#ifndef ES_CONF_UART4_BAUD_RATE
#define ES_CONF_UART4_BAUD_RATE 115200
#endif
#ifndef ES_CONF_UART4_PARITY
#define ES_CONF_UART4_PARITY ES_C_UART_PARITY_NONE
#endif
#ifndef ES_CONF_UART4_STOP_BITS
#define ES_CONF_UART4_STOP_BITS ES_C_UART_STOP_1
#endif
#ifndef ES_CONF_UART5_BAUD_RATE
#define ES_CONF_UART5_BAUD_RATE 115200
#endif
#ifndef ES_CONF_UART5_PARITY
#define ES_CONF_UART5_PARITY ES_C_UART_PARITY_NONE
#endif
#ifndef ES_CONF_UART5_STOP_BITS
#define ES_CONF_UART5_STOP_BITS ES_C_UART_STOP_1
#endif
#define ES_UART0_CONFIG \
{ \
ES_CONF_UART0_BAUD_RATE, \
DATA_BITS_8, \
ES_CONF_UART0_STOP_BITS, \
ES_CONF_UART0_PARITY, \
BIT_ORDER_LSB, \
NRZ_NORMAL, \
RT_SERIAL_RB_BUFSZ, \
0 \
}
#define ES_UART1_CONFIG \
{ \
ES_CONF_UART1_BAUD_RATE, \
DATA_BITS_8, \
ES_CONF_UART1_STOP_BITS, \
ES_CONF_UART1_PARITY, \
BIT_ORDER_LSB, \
NRZ_NORMAL, \
RT_SERIAL_RB_BUFSZ, \
0 \
}
#define ES_UART2_CONFIG \
{ \
ES_CONF_UART2_BAUD_RATE, \
DATA_BITS_8, \
ES_CONF_UART2_STOP_BITS, \
ES_CONF_UART2_PARITY, \
BIT_ORDER_LSB, \
NRZ_NORMAL, \
RT_SERIAL_RB_BUFSZ, \
0 \
}
#define ES_UART3_CONFIG \
{ \
ES_CONF_UART3_BAUD_RATE, \
DATA_BITS_8, \
ES_CONF_UART3_STOP_BITS, \
ES_CONF_UART3_PARITY, \
BIT_ORDER_LSB, \
NRZ_NORMAL, \
RT_SERIAL_RB_BUFSZ, \
0 \
}
#define ES_UART4_CONFIG \
{ \
ES_CONF_UART4_BAUD_RATE, \
DATA_BITS_8, \
ES_CONF_UART4_STOP_BITS, \
ES_CONF_UART4_PARITY, \
BIT_ORDER_LSB, \
NRZ_NORMAL, \
RT_SERIAL_RB_BUFSZ, \
0 \
}
#define ES_UART5_CONFIG \
{ \
ES_CONF_UART5_BAUD_RATE, \
DATA_BITS_8, \
ES_CONF_UART5_STOP_BITS, \
ES_CONF_UART5_PARITY, \
BIT_ORDER_LSB, \
NRZ_NORMAL, \
RT_SERIAL_RB_BUFSZ, \
0 \
}
#endif

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menu "Hardware Drivers Config"
menu "On-chip Peripheral Drivers"
config BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
default y
source "drivers/ES/Kconfig"
endmenu
menu "Onboard Peripheral Drivers"
config BSP_USING_SPI_FLASH
bool "Enable SPI FLASH (W25Q64 spi0)"
select BSP_USING_SPI
select RT_USING_SFUD
select RT_SFUD_USING_SFDP
default n
if BSP_USING_SPI_FLASH
config ES_DEVICE_NAME_SPI_DEV
string "The name of spi device (registered)"
default "spi00"
config ES_DEVICE_NAME_SPI_FALSH_DEV
string "The name of spi flash device"
default "W25Q64"
endif
endmenu
menu "Offboard Peripheral Drivers"
endmenu
menu "Peripheral Drivers test example"
config BSP_USING_EXAMPLE_ADC_VOL
bool "BSP_USING_EXAMPLE_ADC_VOL"
default n
config BSP_USING_EXAMPLE_HWTIMER
bool "BSP_USING_EXAMPLE_HWTIMER"
default n
config BSP_USING_EXAMPLE_I2C
bool "BSP_USING_EXAMPLE_I2C"
default n
config BSP_USING_EXAMPLE_I2C_E2PROM
bool "BSP_USING_EXAMPLE_I2C_E2PROM"
default n
config BSP_USING_EXAMPLE_LED_BLINK
bool "BSP_USING_EXAMPLE_LED_BLINK"
default n
config BSP_USING_EXAMPLE_PIN_BEEP
bool "BSP_USING_EXAMPLE_PIN_BEEP"
default n
config BSP_USING_EXAMPLE_PWM_LED
bool "BSP_USING_EXAMPLE_PWM_LED"
default n
config BSP_USING_EXAMPLE_RTC
bool "BSP_USING_EXAMPLE_RTC"
default n
config BSP_USING_EXAMPLE_SPI
bool "BSP_USING_EXAMPLE_SPI"
default n
config BSP_USING_EXAMPLE_UART
bool "BSP_USING_EXAMPLE_UART"
default n
config BSP_USING_EXAMPLE_UART_DMA
bool "BSP_USING_EXAMPLE_UART_DMA"
default n
config BSP_USING_EXAMPLE_CAN
bool "BSP_USING_EXAMPLE_CAN"
default n
config BSP_USING_EXAMPLE_PM
bool "BSP_USING_EXAMPLE_PM"
default n
endmenu
endmenu

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from building import *
Import('ES32F36XX_DRV_ROOT')
cwd = GetCurrentDir()
objs = []
# add the general drivers.
src = Split('''
board.c
''')
# add gpio code
if GetDepend('RT_USING_PIN'):
src += [ES32F36XX_DRV_ROOT+'/drv_gpio.c']
# add serial driver code
if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2') or GetDepend('BSP_USING_UART3') or \
GetDepend('BSP_USING_UART4') or GetDepend('BSP_USING_UART5') or \
GetDepend('BSP_USING_USART0') or GetDepend('BSP_USING_USART1') or GetDepend('BSP_USING_USART2') or GetDepend('BSP_USING_USART3') or \
GetDepend('BSP_USING_USART4') or GetDepend('BSP_USING_USART5'):
src += [ES32F36XX_DRV_ROOT+'/drv_uart.c']
# add spi driver code
if GetDepend('BSP_USING_SPI0') or GetDepend('BSP_USING_SPI1') or GetDepend('BSP_USING_SPI2'):
src += [ES32F36XX_DRV_ROOT+'/drv_spi.c']
# add i2c driver code
if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'):
src += [ES32F36XX_DRV_ROOT+'/drv_i2c.c']
# add can driver code
if GetDepend('BSP_USING_CAN') or GetDepend('BSP_USING_CAN0') or GetDepend('RT_USING_CAN'):
src += [ES32F36XX_DRV_ROOT+'/drv_can.c']
# add adc driver code
if GetDepend(['BSP_USING_ADC0']) or GetDepend('BSP_USING_ADC1'):
src += [ES32F36XX_DRV_ROOT+'/drv_adc.c']
# add rtc driver code
if GetDepend(['BSP_USING_RTC']):
src += [ES32F36XX_DRV_ROOT+'/drv_rtc.c']
# add spi flash driver code
if GetDepend('BSP_USING_SPI_FLASH'):
src += [ES32F36XX_DRV_ROOT+'/drv_spiflash.c']
# add hwtimer driver code
if GetDepend('BSP_USING_AD16C4T0_HWTIMER') or GetDepend('BSP_USING_AD16C4T1_HWTIMER') or \
GetDepend('BSP_USING_GP32C4T0_HWTIMER') or GetDepend('BSP_USING_GP32C4T1_HWTIMER') or \
GetDepend('BSP_USING_GP16C4T0_HWTIMER') or GetDepend('BSP_USING_GP16C4T1_HWTIMER') or \
GetDepend('BSP_USING_BS16T0_HWTIMER') or GetDepend('BSP_USING_BS16T1_HWTIMER'):
src += [ES32F36XX_DRV_ROOT+'/drv_hwtimer.c']
# add pwm driver code
if GetDepend('BSP_USING_AD16C4T0_PWM') or GetDepend('BSP_USING_AD16C4T1_PWM') or \
GetDepend('BSP_USING_GP32C4T0_PWM') or GetDepend('BSP_USING_GP32C4T1_PWM') or \
GetDepend('BSP_USING_GP16C4T0_PWM') or GetDepend('BSP_USING_GP16C4T1_PWM'):
src += [ES32F36XX_DRV_ROOT+'/drv_pwm.c']
# add pm driver code
if GetDepend(['BSP_USING_PM']):
src += [ES32F36XX_DRV_ROOT+'/drv_pm.c']
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
objs = objs + group
src = []
cwd = GetCurrentDir()
include_path = [cwd + '/ES']
if GetDepend('BSP_USING_EXAMPLE_ADC_VOL'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/adc_vol_sample.c']
if GetDepend('BSP_USING_EXAMPLE_HWTIMER'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/hwtimer_sample.c']
if GetDepend('BSP_USING_EXAMPLE_I2C'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/i2c_sample.c']
if GetDepend('BSP_USING_EXAMPLE_I2C_E2PROM'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/i2c_e2_sample.c']
if GetDepend('BSP_USING_EXAMPLE_LED_BLINK'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/led_blink_sample.c']
if GetDepend('BSP_USING_EXAMPLE_PIN_BEEP'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/pin_beep_sample.c']
if GetDepend('BSP_USING_EXAMPLE_PWM_LED'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/pwm_led_sample.c']
if GetDepend('BSP_USING_EXAMPLE_RTC'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/rtc_sample.c']
if GetDepend('BSP_USING_EXAMPLE_UART'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/uart_sample.c']
if GetDepend('BSP_USING_EXAMPLE_UART_DMA'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/uart_dma_sample.c']
if GetDepend('BSP_USING_EXAMPLE_SPI'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/spi_sample.c']
if GetDepend('BSP_USING_EXAMPLE_CAN'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/can_sample.c']
if GetDepend('BSP_USING_EXAMPLE_PM'):
src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/pm_sample.c']
group = DefineGroup('bsp-drivers-test-samples', src, depend = [''], CPPPATH = include_path)
objs = objs + group
Return('objs')

216
bsp/essemi/es32f365x/drivers/board.c Normal file
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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2020-01-14 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#include "drv_uart.h"
#include "drv_gpio.h"
#include <ald_gpio.h>
#include "ald_dma.h"
/**
* @addtogroup es32f3
*/
/*@{*/
/*******************************************************************************
* Function Name : NVIC_Configuration
* Description : Configures Vector Table base location.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_Configuration(void)
{
}
/*******************************************************************************
* Function Name : SystemClock_Configuration
* Description : Configures the System Clock.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SystemClock_Config(void)
{
SYSCFG_UNLOCK();
#if ES_CMU_LRC_EN
SET_BIT(CMU->CLKENR, CMU_CLKENR_LRCEN_MSK);
#else
CLEAR_BIT(CMU->CLKENR, CMU_CLKENR_LRCEN_MSK);
#endif /*ES_CMU_LRC_EN*/
#if ES_CMU_LOSC_EN
SET_BIT(CMU->CLKENR, CMU_CLKENR_LOSCEN_MSK);
#else
CLEAR_BIT(CMU->CLKENR, CMU_CLKENR_LOSCEN_MSK);
#endif /*ES_CMU_LOSC_EN*/
#if ES_CMU_HRC_EN
SET_BIT(CMU->CLKENR, CMU_CLKENR_HRCEN_MSK);
#else
CLEAR_BIT(CMU->CLKENR, CMU_CLKENR_HRCEN_MSK);
#endif /*ES_CMU_HRC_EN*/
#if ES_CMU_HOSC_EN
SET_BIT(CMU->CLKENR, CMU_CLKENR_HOSCEN_MSK);
#else
CLEAR_BIT(CMU->CLKENR, CMU_CLKENR_HOSCEN_MSK);
#endif /*ES_CMU_HOSC_EN*/
SYSCFG_LOCK();
#if ES_CMU_PLL1_EN
/*PLL的源必须是4M*/
ald_cmu_pll1_config(ES_PLL1_REFER_CLK, ES_PLL1_OUT_CLK);
#if ES_CMU_PLL1_SAFE_EN
ald_cmu_pll_safe_config(ENABLE);
#else
ald_cmu_pll_safe_config(DISABLE);
#endif
#else
CLEAR_BIT(CMU->CLKENR, CMU_CLKENR_PLL1EN_MSK);
#endif /*ES_CMU_PLL1_EN*/
ald_cmu_clock_config(ES_SYS_CLK_SOURSE, ES_SYS_CLK);
ald_cmu_div_config(CMU_SYS,ES_CMU_SYS_DIV);
ald_cmu_div_config(CMU_HCLK_1,ES_CMU_HCLK_1_DIV);
ald_cmu_div_config(CMU_HCLK_2,ES_CMU_HCLK_2_DIV);
ald_cmu_div_config(CMU_PCLK_1,ES_CMU_PCLK_1_DIV);
ald_cmu_div_config(CMU_PCLK_2,ES_CMU_PCLK_2_DIV);
ald_cmu_perh_clock_config(CMU_PERH_ALL, ENABLE);
/*低功耗时钟使能*/
#ifdef RT_USING_PM
SYSCFG_UNLOCK();
SET_BIT(CMU->LPENR, CMU_LPENR_LRCEN_MSK);
SET_BIT(CMU->LPENR, CMU_LPENR_LOSCEN_MSK);
SET_BIT(CMU->LPENR, CMU_LPENR_HRCEN_MSK);
SET_BIT(CMU->LPENR, CMU_LPENR_HOSCEN_MSK);
SYSCFG_LOCK();
#endif
}
/*******************************************************************************
* Function Name : SysTick_Configuration
* Description : Configures the SysTick for OS tick.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SysTick_Configuration(void)
{
/* ticks = sysclk / RT_TICK_PER_SECOND */
SysTick_Config(ald_cmu_get_sys_clock() / RT_TICK_PER_SECOND);
__systick_interval = 1;
}
/**
* This is the timer interrupt service routine.
*
*/
void SysTick_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
ald_inc_tick();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
/**
* This is the cmu interrupt service.
*
*/
void CMU_Handler(void)
{
ald_cmu_irq_handler();
}
/**
* This is the DMA interrupt service.
*
*/
void DMA_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
ald_dma_irq_handler();
/* leave interrupt */
rt_interrupt_leave();
}
/*@}*/
/**
* This function will initial ES32F3 board.
*/
void rt_hw_board_init(void)
{
/* NVIC Configuration */
NVIC_Configuration();
/*System Clock Configuration */
SystemClock_Config();
/* Configure the SysTick */
SysTick_Configuration();
#ifdef RT_USING_HEAP
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef BSP_USING_DMA0
ald_cmu_perh_clock_config(CMU_PERH_DMA, ENABLE);
ald_dma_init(DMA0);
#endif
}
/**
* This function will delay for some us.
*
* @param us the delay time of us
*/
void rt_hw_us_delay(rt_uint32_t us)
{
unsigned int start, now, delta, reload, us_tick;
start = SysTick->VAL;
reload = SysTick->LOAD;
us_tick = ald_cmu_get_sys_clock() / 1000000UL;
do
{
now = SysTick->VAL;
delta = start > now ? start - now : reload + start - now;
}
while (delta < us_tick * us);
}

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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2021-10-11 liuhy the first version
*/
// <<< Use Configuration Wizard in Context Menu >>>
#ifndef __BOARD_H__
#define __BOARD_H__
#include <es32f36xx.h>
#include "es_conf_info_cmu.h"
#define ES32F3_SRAM_SIZE 0x10000
#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
#else
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END ES32F3_SRAM_END
void rt_hw_board_init(void);
#endif

31
bsp/essemi/es32f365x/drivers/drv_adc.h Normal file
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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2019-04-03 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#ifndef DRV_ADC_H__
#define DRV_ADC_H__
#include "es_conf_info_adc.h"
int rt_hw_adc_init(void);
#endif

44
bsp/essemi/es32f365x/drivers/drv_can.h Normal file
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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2020-01-14 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#ifndef DRV_CAN_H__
#define DRV_CAN_H__
#include <board.h>
#include <rtdevice.h>
#include <rtthread.h>
#include "es_conf_info_can.h"
#ifdef RT_USING_CAN
/* es32f3 can device */
struct es32f3_can
{
can_handle_t CanHandle;
can_filter_t FilterConfig;
struct rt_can_device device; /* inherit from can device */
};
int rt_hw_can_init(void);
#endif
#endif /*DRV_CAN_H__ */

33
bsp/essemi/es32f365x/drivers/drv_gpio.h Normal file
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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2020-01-14 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#ifndef DRV_GPIO_H__
#define DRV_GPIO_H__
#include "es_conf_info_gpio.h"
#define GET_PIN(port,pin) (ES_PIN_GPIO_##port##_##pin)
int rt_hw_pin_init(void);
#endif

30
bsp/essemi/es32f365x/drivers/drv_hwtimer.h Normal file
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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2019-3-19 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#ifndef DRV_HWTIMER_H__
#define DRV_HWTIMER_H__
#include "es_conf_info_hwtimer.h"
int rt_hw_hwtimer_init(void);
#endif

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bsp/essemi/es32f365x/drivers/drv_i2c.h Normal file
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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2020-01-14 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#ifndef DRV_I2C_H__
#define DRV_I2C_H__
#include "es_conf_info_i2c.h"
int rt_hw_i2c_init(void);
#endif

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bsp/essemi/es32f365x/drivers/drv_pm.h Normal file
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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2019-04-01 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#ifndef DRV_PM_H__
#define DRV_PM_H__
#include <rthw.h>
#include <board.h>
#include <rtdevice.h>
#include "es_conf_info_pm.h"
#include <string.h>
int rt_hw_pm_init(void);
extern void save_register(void *p_head,uint32_t size,void *p_save);
extern void load_register(void *p_head,uint32_t size,void *p_load);
#endif

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bsp/essemi/es32f365x/drivers/drv_pwm.h Normal file
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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-11 wangyq the first version
*/
#ifndef DRV_PWM_H__
#define DRV_PWM_H__
int rt_hw_pwm_init(void);
#endif

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bsp/essemi/es32f365x/drivers/drv_rtc.h Normal file
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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2019-03-22 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#ifndef DRV_RTC_H__
#define DRV_RTC_H__
#include "es_conf_info_rtc.h"
int rt_hw_rtc_init(void);
#endif

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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2020-01-14 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#ifndef DRV_SPI_H__
#define DRV_SPI_H__
#include <rtthread.h>
#include <rthw.h>
#include <rtdevice.h>
#include "es_conf_info_spi.h"
struct es32f3_hw_spi_cs
{
rt_uint32_t pin;
};
/* cannot be used before completion init */
rt_err_t es32f3_spi_device_attach(rt_uint32_t pin, const char *bus_name, const char *device_name);
int rt_hw_spi_init(void);
#endif

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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-02-15 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#ifndef DRV_NOR_FLASH_H__
#define DRV_NOR_FLASH_H__
#include "es_conf_info_spi.h"
int rt_hw_spi_flash_init(void);
#endif

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/*
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2020-01-14 wangyq the first version
*/
#ifndef DRV_UART_H__
#define DRV_UART_H__
int rt_hw_uart_init(void);
#endif

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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0007FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, last block HEAP };
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;

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; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x00000000 0x00080000 { ; load region size_region
ER_IROM1 0x00000000 0x00080000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00010000 { ; RW data
.ANY (+RW +ZI)
}
}

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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\project.ewp</path>
</project>
<batchBuild/>
</workspace>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>ES32F3656LT</Device>
<Vendor>Eastsoft</Vendor>
<PackID>Eastsoft.ES32_DFP.7.2350</PackID>
<PackURL>http://www.essemi.com</PackURL>
<Cpu>IRAM(0x20000000,0x00018000) IROM(0x00000000,0x00080000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0es32f36xx -FS00 -FL080000 -FP0($$Device:ES32F3656LT$Flash\es32f36xx.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:ES32F3656LT$Device\Include\es32f36xx.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:ES32F3656LT$SVD\es32f36xx.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\keil\</OutputDirectory>
<OutputName>rtthread</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\build\keil\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x18000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>ES32F36xx, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define>
<Undefine></Undefine>
<IncludePath>applications;.;drivers\ES;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;drivers;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\es32f369x\libraries\CMSIS\Device\EastSoft\ES32F36xx\Include;..\es32f369x\libraries\CMSIS\Include;..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Include</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Applications</GroupName>
<Files>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>applications\main.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>CPU</GroupName>
<Files>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
</File>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
</File>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>DeviceDrivers</GroupName>
<Files>
<File>
<FileName>pin.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
</File>
<File>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath>
</File>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath>
</File>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath>
</File>
<File>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\pipe.c</FilePath>
</File>
<File>
<FileName>ringblk_buf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath>
</File>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
</File>
<File>
<FileName>waitqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<Files>
<File>
<FileName>drv_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\drivers\drv_gpio.c</FilePath>
</File>
<File>
<FileName>drv_uart.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\drivers\drv_uart.c</FilePath>
</File>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\board.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>finsh</GroupName>
<Files>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Kernel</GroupName>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\device.c</FilePath>
</File>
<File>
<FileName>signal.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\signal.c</FilePath>
</File>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\thread.c</FilePath>
</File>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\scheduler.c</FilePath>
</File>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mem.c</FilePath>
</File>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\ipc.c</FilePath>
</File>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\object.c</FilePath>
</File>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\kservice.c</FilePath>
</File>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mempool.c</FilePath>
</File>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\idle.c</FilePath>
</File>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\irq.c</FilePath>
</File>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\timer.c</FilePath>
</File>
<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\clock.c</FilePath>
</File>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>libc</GroupName>
<Files>
<File>
<FileName>time.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Libraries</GroupName>
<Files>
<File>
<FileName>ald_flash_ext.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_flash_ext.c</FilePath>
</File>
<File>
<FileName>ald_iap.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_iap.c</FilePath>
</File>
<File>
<FileName>ald_acmp.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_acmp.c</FilePath>
</File>
<File>
<FileName>ald_rtc.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_rtc.c</FilePath>
</File>
<File>
<FileName>utils.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\utils.c</FilePath>
</File>
<File>
<FileName>ald_flash.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_flash.c</FilePath>
</File>
<File>
<FileName>ald_tsense.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_tsense.c</FilePath>
</File>
<File>
<FileName>ald_qspi.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_qspi.c</FilePath>
</File>
<File>
<FileName>ald_usb.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_usb.c</FilePath>
</File>
<File>
<FileName>ald_bkpc.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_bkpc.c</FilePath>
</File>
<File>
<FileName>ald_rmu.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_rmu.c</FilePath>
</File>
<File>
<FileName>ald_pmu.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_pmu.c</FilePath>
</File>
<File>
<FileName>ald_nor_lcd.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_nor_lcd.c</FilePath>
</File>
<File>
<FileName>ald_crc.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_crc.c</FilePath>
</File>
<File>
<FileName>ald_timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_timer.c</FilePath>
</File>
<File>
<FileName>ald_cmu.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_cmu.c</FilePath>
</File>
<File>
<FileName>ald_calc.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_calc.c</FilePath>
</File>
<File>
<FileName>ald_spi.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_spi.c</FilePath>
</File>
<File>
<FileName>ald_i2s.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_i2s.c</FilePath>
</File>
<File>
<FileName>ald_can.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_can.c</FilePath>
</File>
<File>
<FileName>ald_nand.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_nand.c</FilePath>
</File>
<File>
<FileName>ald_ebi.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_ebi.c</FilePath>
</File>
<File>
<FileName>ald_uart.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_uart.c</FilePath>
</File>
<File>
<FileName>ald_crypt.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_crypt.c</FilePath>
</File>
<File>
<FileName>ald_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_gpio.c</FilePath>
</File>
<File>
<FileName>ald_pis.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_pis.c</FilePath>
</File>
<File>
<FileName>startup_es32f36xx.s</FileName>
<FileType>2</FileType>
<FilePath>..\es32f369x\libraries\CMSIS\Device\EastSoft\ES32F36xx\Startup\keil\startup_es32f36xx.s</FilePath>
</File>
<File>
<FileName>ald_sram.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_sram.c</FilePath>
</File>
<File>
<FileName>ald_dac.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_dac.c</FilePath>
</File>
<File>
<FileName>ald_trng.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_trng.c</FilePath>
</File>
<File>
<FileName>ald_adc.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_adc.c</FilePath>
</File>
<File>
<FileName>ald_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_dma.c</FilePath>
</File>
<File>
<FileName>ald_i2c.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_i2c.c</FilePath>
</File>
<File>
<FileName>ald_wdt.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_wdt.c</FilePath>
</File>
<File>
<FileName>ald_rtchw.c</FileName>
<FileType>1</FileType>
<FilePath>..\es32f369x\libraries\ES32F36xx_ALD_StdPeriph_Driver\Source\ald_rtchw.c</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
</Project>

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#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 512
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_SIGNALS
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40003
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
#define FINSH_USING_MSH_ONLY
#define FINSH_ARG_MAX 10
/* Device virtual file system */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* Using USB */
/* POSIX layer and C standard library */
#define RT_LIBC_USING_TIME
/* Network */
/* Socket abstraction layer */
/* Network interface device */
/* light weight TCP/IP stack */
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* tools packages */
/* system packages */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* games: games run on RT-Thread console */
#define SOC_ES32F3656LT
/* Hardware Drivers Config */
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
/* UART Drivers */
#define BSP_USING_UART0
/* SPI Drivers */
/* I2C Drivers */
/* CAN Drivers */
/* ADC Drivers */
/* RTC Drivers */
/* HWTIMER Drivers */
/* PWM Drivers */
/* PM Drivers */
/* Onboard Peripheral Drivers */
/* Offboard Peripheral Drivers */
/* Peripheral Drivers test example */
#endif

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import os
import sys
# toolchains options
CROSS_TOOL = 'keil'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
# device options
ARCH = 'arm'
CPU = 'cortex-m3'
# cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc': # not support gcc yet
PLATFORM = 'gcc'
EXEC_PATH = 'C:/GCC'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'C:/Keil'
elif CROSS_TOOL == 'iar': # not support iar yet
PLATFORM = 'iar'
EXEC_PATH = 'C:/IAR'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
#BUILD = 'release'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=' + CPU + ' -mthumb -ffunction-sections -fdata-sections'
CFLAGS = DEVICE
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T drivers/linker_scripts/link.lds'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2 -g'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O2'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
AS = 'armasm'
AR = 'armar'
LINK = 'armlink'
TARGET_EXT = 'axf'
DEVICE = ' --device DARMSTM'
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
AFLAGS = DEVICE + ' --apcs=interwork '
LFLAGS = DEVICE + ' --scatter "drivers/linker_scripts/link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/ARMCC/lib'
CFLAGS += ' -D__MICROLIB '
AFLAGS += ' --pd "__MICROLIB SETA 1" '
LFLAGS += ' --library_type=microlib '
EXEC_PATH += '/ARM/ARMCC/bin'
if BUILD == 'debug':
CFLAGS += ' -g -O0'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2'
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
elif PLATFORM == 'iar':
# toolchains
CC = 'iccarm'
AS = 'iasmarm'
AR = 'iarchive'
LINK = 'ilinkarm'
TARGET_EXT = 'out'
DEVICE = '-Dewarm'
CFLAGS = DEVICE
CFLAGS += ' --diag_suppress Pa050'
CFLAGS += ' --no_cse'
CFLAGS += ' --no_unroll'
CFLAGS += ' --no_inline'
CFLAGS += ' --no_code_motion'
CFLAGS += ' --no_tbaa'
CFLAGS += ' --no_clustering'
CFLAGS += ' --no_scheduling'
CFLAGS += ' --endian=little'
CFLAGS += ' --cpu=Cortex-M0'
CFLAGS += ' -e'
CFLAGS += ' --fpu=None'
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
CFLAGS += ' --silent'
AFLAGS = DEVICE
AFLAGS += ' -s+'
AFLAGS += ' -w+'
AFLAGS += ' -r'
AFLAGS += ' --cpu Cortex-M0'
AFLAGS += ' --fpu None'
AFLAGS += ' -S'
LFLAGS = ' --config "drivers\linker_scripts\link.icf"'
LFLAGS += ' --redirect _Printf=_PrintfTiny'
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
if BUILD == 'debug':
CFLAGS += ' --debug'
CFLAGS += ' -On'
else:
CFLAGS += ' -Oh'
LFLAGS += ' --entry __iar_program_start'
EXEC_PATH = EXEC_PATH + '/arm/bin/'
POST_ACTION = ''

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bsp/essemi/es32f365x/template.ewd Normal file
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bsp/essemi/es32f365x/template.ewp Normal file
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bsp/essemi/es32f365x/template.eww Normal file
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\template.ewp</path>
</project>
<batchBuild/>
</workspace>

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bsp/essemi/es32f365x/template.uvoptx Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\keil\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0es32f36xx -FL080000 -FS00 -FP0($$Device:ES32F3696LT$Flash\es32f36xx.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>CMSIS_AGDI</Key>
<Name>-X"Any" -UAny -O206 -S0 -C0 -P00 -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0es32f36xx.FLM -FS00 -FL080000 -FP0($$Device:ES32F3696LT$Flash\es32f36xx.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
</ProjectOpt>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>ES32F3656LT</Device>
<Vendor>Eastsoft</Vendor>
<PackID>Eastsoft.ES32_DFP.7.2350</PackID>
<PackURL>http://www.essemi.com</PackURL>
<Cpu>IRAM(0x20000000,0x00018000) IROM(0x00000000,0x00080000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0es32f36xx -FS00 -FL080000 -FP0($$Device:ES32F3656LT$Flash\es32f36xx.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:ES32F3656LT$Device\Include\es32f36xx.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:ES32F3656LT$SVD\es32f36xx.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\keil\</OutputDirectory>
<OutputName>rtthread</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\build\keil\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x10000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x80000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
</Project>