[bsp][essemi] update es32f36xx libraries.

This commit is contained in:
liuhy 2022-05-31 14:38:18 +08:00 committed by guo
parent 093793dfe2
commit 2d62a95339
5 changed files with 8 additions and 31 deletions

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@ -1,14 +1,12 @@
/**
******************************************************************************
* @file startup_es32f36xx.s
* @author AE Team
* @brief ES32F36xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR addres
s
* - Set the vector table entries with the exceptions ISR address
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M3 processor is in Thread mode,
@ -18,8 +16,7 @@ s
* Date Author Notes
* 23 Jan 2019 AE Team The first version
*
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserve
d.
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
@ -34,8 +31,7 @@ d.
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
****
**********************************************************************************
*/
.syntax unified
@ -139,13 +135,9 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
bl sys_config
bl adc_config
bl __libc_init_array
/*bl __libc_init_array
bl main */
bl entry
bl main
LoopForever:
b LoopForever

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@ -30,9 +30,7 @@
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN sys_config
EXTERN adc_config
EXTERN __iar_program_start
PUBLIC __vector_table
@ -179,12 +177,6 @@ RESET_Handler
ldr r1, =0x40080000
str r0, [r1]
LDR R0, =sys_config
BLX R0
LDR R0, =adc_config
BLX R0
LDR R0, =__iar_program_start
BX R0

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@ -184,14 +184,6 @@ RESET_Handler PROC
ldr r0, =0x123456
ldr r1, =0x40080000
str r0, [r1]
IMPORT sys_config
LDR R0, =sys_config
BLX R0
IMPORT adc_config
LDR R0, =adc_config
BLX R0
IMPORT __main
LDR R0, =__main

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@ -78,6 +78,8 @@ ald_status_t ald_acmp_init(acmp_handle_t *hperh)
(hperh->init.inactval << ACMP_CON_INACTV_POS) | (hperh->init.hystsel << ACMP_CON_HYSTSEL_POSS));
hperh->perh->CON = tmp;
tmp = 0;
tmp |= ((hperh->init.p_port << ACMP_INPUTSEL_PSEL_POSS) | (hperh->init.n_port << ACMP_INPUTSEL_NSEL_POSS) |
(hperh->init.vdd_level << ACMP_INPUTSEL_VDDLVL_POSS));

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@ -160,7 +160,6 @@ ald_status_t ald_adc_init(adc_handle_t *hperh)
SET_BIT(ADC1->CCR, ADC_CCR_TRMEN_MSK);
MODIFY_REG(hperh->perh->CON1, ADC_CON1_NCHESEL_MSK, hperh->init.nche_sel << ADC_CON1_NCHESEL_POS);
ald_adc_interrupt_config(hperh, ADC_IT_OVR, ENABLE);
ADC_ENABLE(hperh);
hperh->error_code = ADC_ERROR_NONE;