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[cpu_cache] fix function replaced by macro

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wirano 2024-04-18 20:37:48 -04:00 committed by Rbb666
parent 5012edfcdc
commit 2d18f033a4
1 changed files with 5 additions and 0 deletions
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5
libcpu/arm/cortex-m7/cpu_cache.c
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@ -17,6 +17,8 @@
/* The L1-caches on all Cortex®-M7s are divided into lines of 32 bytes. */
#define L1CACHE_LINESIZE_BYTE (32)
#ifdef RT_USING_CACHE
void rt_hw_cpu_icache_enable(void)
{
SCB_EnableICache();
@ -89,3 +91,6 @@ void rt_hw_cpu_dcache_ops(int ops, void* addr, int size)
RT_ASSERT(0);
}
}
#endif /* RT_USING_CACHE */