mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2025-02-28 01:57:05 +08:00
Merge pull request #4174 from thread-liu/master
[update] stm32mp1 mdk link script file
This commit is contained in:
commit
2c964b5bd4
1
.github/workflows/action.yml
vendored
1
.github/workflows/action.yml
vendored
@ -140,6 +140,7 @@ jobs:
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- name: Install Tools
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shell: bash
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run: |
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sudo apt-get update
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sudo apt-get -qq install gcc-multilib libsdl-dev scons
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echo "RTT_ROOT=${{ github.workspace }}" >> $GITHUB_ENV
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echo "RTT_CC=gcc" >> $GITHUB_ENV
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@ -104,10 +104,6 @@ if GetDepend(['BSP_USING_DFSDM']):
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dfsdm.c']
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_dfsdm_ex.c']
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if GetDepend(['BSP_USING_SDMMC']):
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_sdmmc.c']
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sd.c']
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if GetDepend(['BSP_USING_HASH']):
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hash.c']
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src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_hash_ex.c']
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@ -74,10 +74,10 @@ void HAL_MspInit(void)
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/* System interrupt init*/
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/* USER CODE BEGIN MspInit 1 */
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#if !defined(BSP_USING_OPENAMP)
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__HAL_RCC_SYSRAM_CLK_ENABLE();
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__HAL_RCC_RETRAM_CLK_ENABLE();
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#endif
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if (IS_ENGINEERING_BOOT_MODE())
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{
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__HAL_RCC_SYSRAM_CLK_ENABLE();
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}
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HAL_NVIC_SetPriority(RCC_WAKEUP_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(RCC_WAKEUP_IRQn);
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@ -23,23 +23,22 @@ extern "C" {
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#endif
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#define STM32_FLASH_START_ADRESS ((uint32_t)0x10000000)
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#if defined(BSP_USING_OPENAMP)
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#define STM32_FLASH_SIZE (64 * 1024)
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#else
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#define STM32_FLASH_SIZE (256 * 1024)
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#endif
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#define STM32_FLASH_SIZE (192 * 1024)
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#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
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#define STM32_SRAM_SIZE (64)
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#define STM32_SRAM_END (0x10030000 + 64 * 1024)
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#if defined(BSP_USING_OPENAMP)
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#define STM32_SRAM_BEGIN (uint32_t)0x10030000
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="CSTACK"
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#define HEAP_BEGIN (__segment_end("CSTACK"))
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#else
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#define STM32_SRAM_BEGIN (uint32_t)0x2FFF0000
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extern int __bss_end;
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#define HEAP_BEGIN (&__bss_end)
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#endif
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#define STM32_SRAM_SIZE (64)
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#define STM32_SRAM_END (STM32_SRAM_BEGIN + (STM32_SRAM_SIZE * 1024))
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#define HEAP_BEGIN STM32_SRAM_BEGIN
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#define HEAP_END STM32_SRAM_END
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void SystemClock_Config(void);
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@ -51,4 +50,3 @@ extern void _Error_Handler(char *s, int num);
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#endif
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#endif
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@ -8,28 +8,20 @@ LR_VECTORS 0x00000000 0x00000400 { ; load region size_region
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}
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}
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LR_IROM1 0x10000000 0x00020000 { ; load region size_region
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ER_IROM1 0x10000000 0x00020000 { ; load address = execution address
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LR_IROM1 0x10000000 0x00030000 { ; load region size_region
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ER_IROM1 0x10000000 0x00030000 { ; load address = execution address
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*(InRoot$$Sections)
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.ANY (+RO)
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.ANY (+XO)
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}
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RW_IRAM1 0x10020000 0x00050000 { ; RW data
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RW_IRAM1 0x10030000 0x00010000 { ; RW data
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.ANY (+RW +ZI)
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}
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; RW_IRAM2 0x10020000 0x00020000 { ; RW data
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; .ANY (+RW +ZI)
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; }
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; RW_IRAM3 0x10040000 0x00010000 { ; RW data
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; .ANY (+RW +ZI)
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; }
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; RW_IRAM4 0x10050000 0x00010000 { ; RW data
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; .ANY (+RW +ZI)
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; }
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; ***** To uncomment these 4 lines if OPENAMP used *****
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; *** Create region for OPENAMP ***
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; ***** Create region for OPENAMP *****
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; *** These 4 lines can be commented if OPENAMP is not used *****
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.resource_table +0 ALIGN 4 { ; resource table
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*(.resource_table)
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}
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__OpenAMP_SHMEM__ 0x10050000 EMPTY 0x8000 {} ; Shared Memory area used by OpenAMP
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} __OpenAMP_SHMEM__ 0x10040000 EMPTY 0x8000 {} ; Shared Memory area used by OpenAMP
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}
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@ -10,7 +10,7 @@
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<aExt>*.s*; *.src; *.a*</aExt>
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<oExt>*.obj; *.o</oExt>
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<lExt>*.lib</lExt>
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<tExt>*.txt; *.h; *.inc</tExt>
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<tExt>*.txt; *.h; *.inc; *.md</tExt>
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<pExt>*.plm</pExt>
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<CppX>*.cpp</CppX>
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<nMigrate>0</nMigrate>
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@ -125,7 +125,7 @@
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<SetRegEntry>
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<Number>0</Number>
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<Key>ST-LINKIII-KEIL_SWO</Key>
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<Name>-U066DFF343339415043182234 -O206 -SF10000 -C0 -A2 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(6BA02477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10020000 -FC1000 -FN0</Name>
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<Name>-U0666FF343339415043182420 -O206 -SF10000 -C0 -A2 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10030000 -FC1000 -FN0</Name>
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</SetRegEntry>
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</TargetDriverDllRegistry>
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<Breakpoint/>
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@ -276,7 +276,7 @@
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<OCR_RVCT4>
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<Type>1</Type>
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<StartAddress>0x10000000</StartAddress>
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<Size>0x20000</Size>
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<Size>0x30000</Size>
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</OCR_RVCT4>
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<OCR_RVCT5>
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<Type>1</Type>
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@ -300,8 +300,8 @@
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</OCR_RVCT8>
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<OCR_RVCT9>
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<Type>0</Type>
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<StartAddress>0x10020000</StartAddress>
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<Size>0x20000</Size>
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<StartAddress>0x10030000</StartAddress>
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<Size>0x10000</Size>
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</OCR_RVCT9>
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<OCR_RVCT10>
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<Type>0</Type>
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@ -397,11 +397,6 @@
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<Layers>
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<Layer>
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<LayName><Project Info></LayName>
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<LayDesc></LayDesc>
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<LayUrl></LayUrl>
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<LayKeys></LayKeys>
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<LayCat></LayCat>
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<LayLic></LayLic>
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<LayTarg>0</LayTarg>
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<LayPrjMark>1</LayPrjMark>
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</Layer>
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@ -81,10 +81,10 @@ void HAL_MspInit(void)
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/* System interrupt init*/
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/* USER CODE BEGIN MspInit 1 */
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#if !defined(BSP_USING_OPENAMP)
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__HAL_RCC_SYSRAM_CLK_ENABLE();
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__HAL_RCC_RETRAM_CLK_ENABLE();
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#endif
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if (IS_ENGINEERING_BOOT_MODE())
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{
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__HAL_RCC_SYSRAM_CLK_ENABLE();
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}
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HAL_NVIC_SetPriority(RCC_WAKEUP_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(RCC_WAKEUP_IRQn);
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@ -77,7 +77,7 @@ menu "Onboard Peripheral Drivers"
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if BSP_USING_EMMC
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config EMMC_USING_DFS
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bool "emmc card fatfs"
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default n
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default y
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endif
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endif
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@ -12,6 +12,7 @@
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#include "board.h"
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void PeriphCommonClock_Config(void);
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/**
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* @brief System Clock Configuration
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* @retval None
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@ -124,6 +125,12 @@ void SystemClock_Config(void)
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/**Set the HSE division factor for RTC clock
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*/
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__HAL_RCC_RTC_HSEDIV(24);
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/* Configure the peripherals common clocks */
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if(IS_ENGINEERING_BOOT_MODE())
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{
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PeriphCommonClock_Config();
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}
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}
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@ -23,18 +23,23 @@ extern "C" {
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#endif
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#define STM32_FLASH_START_ADRESS ((uint32_t)0x10000000)
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#define STM32_FLASH_SIZE (191 * 1024)
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#define STM32_FLASH_SIZE (192 * 1024)
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#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
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#if defined(BSP_USING_OPENAMP)
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#define STM32_SRAM_BEGIN (uint32_t)0x10030000
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#else
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#define STM32_SRAM_BEGIN (uint32_t)0x2FFF0000
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#endif
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#define STM32_SRAM_SIZE (64)
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#define STM32_SRAM_END (STM32_SRAM_BEGIN + (STM32_SRAM_SIZE * 1024))
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#define HEAP_BEGIN STM32_SRAM_BEGIN
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#define STM32_SRAM_SIZE (64)
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#define STM32_SRAM_END (0x10030000 + 64 * 1024)
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="CSTACK"
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#define HEAP_BEGIN (__segment_end("CSTACK"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN (&__bss_end)
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#endif
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#define HEAP_END STM32_SRAM_END
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void SystemClock_Config(void);
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@ -46,4 +51,3 @@ extern void _Error_Handler(char *s, int num);
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#endif
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#endif
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@ -8,20 +8,20 @@ LR_VECTORS 0x00000000 0x00000400 { ; load region size_region
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}
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}
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LR_IROM1 0x10000000 0x00040000 { ; load region size_region
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ER_IROM1 0x10000000 0x00040000 { ; load address = execution address
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LR_IROM1 0x10000000 0x00030000 { ; load region size_region
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ER_IROM1 0x10000000 0x00030000 { ; load address = execution address
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*(InRoot$$Sections)
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.ANY (+RO)
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.ANY (+XO)
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}
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RW_IRAM1 0x10050000 0x00010000 { ; RW data
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RW_IRAM1 0x10030000 0x00010000 { ; RW data
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.ANY (+RW +ZI)
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}
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;; ***** Create region for OPENAMP *****
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;; *** These 4 lines can be commented if OPENAMP is not used *****
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; .resource_table +0 ALIGN 4 { ; resource table
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; *(.resource_table)
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; } __OpenAMP_SHMEM__ 0x10040000 EMPTY 0x8000 {} ; Shared Memory area used by OpenAMP
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; ***** Create region for OPENAMP *****
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; *** These 4 lines can be commented if OPENAMP is not used *****
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.resource_table +0 ALIGN 4 { ; resource table
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*(.resource_table)
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} __OpenAMP_SHMEM__ 0x10040000 EMPTY 0x8000 {} ; Shared Memory area used by OpenAMP
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}
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@ -10,7 +10,7 @@
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<aExt>*.s*; *.src; *.a*</aExt>
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<oExt>*.obj; *.o</oExt>
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<lExt>*.lib</lExt>
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<tExt>*.txt; *.h; *.inc</tExt>
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<tExt>*.txt; *.h; *.inc; *.md</tExt>
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<pExt>*.plm</pExt>
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<CppX>*.cpp</CppX>
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<nMigrate>0</nMigrate>
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@ -125,7 +125,7 @@
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<SetRegEntry>
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<Number>0</Number>
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<Key>ST-LINKIII-KEIL_SWO</Key>
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<Name>-U066BFF343339415043223048 -O206 -SF10000 -C0 -A2 -I0 -HNlocalhost -HP7184 -P1 -N00("") -D00(00000000) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10050000 -FC1000 -FN0</Name>
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<Name>-U0666FF343339415043182420 -O206 -SF10000 -C0 -A2 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10030000 -FC1000 -FN0</Name>
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</SetRegEntry>
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</TargetDriverDllRegistry>
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<Breakpoint/>
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@ -276,7 +276,7 @@
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<OCR_RVCT4>
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<Type>1</Type>
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<StartAddress>0x10000000</StartAddress>
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<Size>0x40000</Size>
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<Size>0x30000</Size>
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</OCR_RVCT4>
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<OCR_RVCT5>
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<Type>1</Type>
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@ -300,13 +300,13 @@
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</OCR_RVCT8>
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<OCR_RVCT9>
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<Type>0</Type>
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<StartAddress>0x10050000</StartAddress>
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<StartAddress>0x10030000</StartAddress>
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<Size>0x10000</Size>
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</OCR_RVCT9>
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<OCR_RVCT10>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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<StartAddress>0x10040000</StartAddress>
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<Size>0x20000</Size>
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</OCR_RVCT10>
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</OnChipMemories>
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<RvctStartVector></RvctStartVector>
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@ -397,11 +397,6 @@
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<Layers>
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<Layer>
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<LayName><Project Info></LayName>
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<LayDesc></LayDesc>
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<LayUrl></LayUrl>
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<LayKeys></LayKeys>
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<LayCat></LayCat>
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<LayLic></LayLic>
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<LayTarg>0</LayTarg>
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<LayPrjMark>1</LayPrjMark>
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</Layer>
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|
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