From 2c85bcb463a37ae0a1ec60281e4a23945eb046d5 Mon Sep 17 00:00:00 2001 From: Chen Wang Date: Tue, 28 May 2024 18:45:53 +0800 Subject: [PATCH] bsp:cvitek: add pinmux for spi Board level pin available info: duo & duo256: NAME SPI CV1800B/GPIO __ ---- --- ------------ --------------------- GP6 SPI2_SCK PWR_GPIO[23] SD1_CLK__SPI2_SCK GP7 SPI2_SDO PWR_GPIO[22] SD1_CMD__SPI2_SDO GP8 SPI2_SDI PWR_GPIO[21] SD1_D0__SPI2_SDI GP9 SPI2_CS_X PWR_GPIO[18] SD1_D3__SPI2_CS_X Signed-off-by: Chen Wang --- bsp/cvitek/c906_little/board/Kconfig | 78 +++++++++++++++++++ bsp/cvitek/cv18xx_risc-v/board/Kconfig | 78 +++++++++++++++++++ bsp/cvitek/drivers/drv_spi.c | 104 +++++++++++++++++++++++++ 3 files changed, 260 insertions(+) diff --git a/bsp/cvitek/c906_little/board/Kconfig b/bsp/cvitek/c906_little/board/Kconfig index 620f4039ff..95c97e725b 100755 --- a/bsp/cvitek/c906_little/board/Kconfig +++ b/bsp/cvitek/c906_little/board/Kconfig @@ -164,6 +164,84 @@ menu "General Drivers Configuration" select RT_USING_SPI default n + if BSP_USING_SPI + config BSP_USING_SPI0 + bool "Enable SPI 0" + default n + + if BSP_USING_SPI0 + config BSP_SPI0_SCK_PINNAME + string "spi0 sck pin name" + default "" + config BSP_SPI0_SDO_PINNAME + string "spi0 sdo pin name" + default "" + config BSP_SPI0_SDI_PINNAME + string "spi0 sdi pin name" + default "" + config BSP_SPI0_CS_PINNAME + string "spi0 cs pin name" + default "" + endif + + config BSP_USING_SPI1 + bool "Enable SPI 1" + default n + + if BSP_USING_SPI1 + config BSP_SPI1_SCK_PINNAME + string "spi1 sck pin name" + default "" + config BSP_SPI1_SDO_PINNAME + string "spi1 sdo pin name" + default "" + config BSP_SPI1_SDI_PINNAME + string "spi1 sdi pin name" + default "" + config BSP_SPI1_CS_PINNAME + string "spi1 cs pin name" + default "" + endif + + config BSP_USING_SPI2 + bool "Enable SPI 2" + default n + + if BSP_USING_SPI2 + config BSP_SPI2_SCK_PINNAME + string "spi2 sck pin name" + default "" + config BSP_SPI2_SDO_PINNAME + string "spi2 sdo pin name" + default "" + config BSP_SPI2_SDI_PINNAME + string "spi2 sdi pin name" + default "" + config BSP_SPI2_CS_PINNAME + string "spi2 cs pin name" + default "" + endif + + config BSP_USING_SPI3 + bool "Enable SPI 3" + default n + + if BSP_USING_SPI3 + config BSP_SPI3_SCK_PINNAME + string "spi3 sck pin name" + default "" + config BSP_SPI3_SDO_PINNAME + string "spi3 sdo pin name" + default "" + config BSP_SPI3_SDI_PINNAME + string "spi3 sdi pin name" + default "" + config BSP_SPI3_CS_PINNAME + string "spi3 cs pin name" + default "" + endif + endif + menuconfig BSP_USING_WDT bool "Enable Watchdog Timer" select RT_USING_WDT diff --git a/bsp/cvitek/cv18xx_risc-v/board/Kconfig b/bsp/cvitek/cv18xx_risc-v/board/Kconfig index 85426b7418..6ed5c54e74 100755 --- a/bsp/cvitek/cv18xx_risc-v/board/Kconfig +++ b/bsp/cvitek/cv18xx_risc-v/board/Kconfig @@ -164,6 +164,84 @@ menu "General Drivers Configuration" select RT_USING_SPI default n + if BSP_USING_SPI + config BSP_USING_SPI0 + bool "Enable SPI 0" + default n + + if BSP_USING_SPI0 + config BSP_SPI0_SCK_PINNAME + string "spi0 sck pin name" + default "" + config BSP_SPI0_SDO_PINNAME + string "spi0 sdo pin name" + default "" + config BSP_SPI0_SDI_PINNAME + string "spi0 sdi pin name" + default "" + config BSP_SPI0_CS_PINNAME + string "spi0 cs pin name" + default "" + endif + + config BSP_USING_SPI1 + bool "Enable SPI 1" + default n + + if BSP_USING_SPI1 + config BSP_SPI1_SCK_PINNAME + string "spi1 sck pin name" + default "" + config BSP_SPI1_SDO_PINNAME + string "spi1 sdo pin name" + default "" + config BSP_SPI1_SDI_PINNAME + string "spi1 sdi pin name" + default "" + config BSP_SPI1_CS_PINNAME + string "spi1 cs pin name" + default "" + endif + + config BSP_USING_SPI2 + bool "Enable SPI 2" + default n + + if BSP_USING_SPI2 + config BSP_SPI2_SCK_PINNAME + string "spi2 sck pin name" + default "" + config BSP_SPI2_SDO_PINNAME + string "spi2 sdo pin name" + default "" + config BSP_SPI2_SDI_PINNAME + string "spi2 sdi pin name" + default "" + config BSP_SPI2_CS_PINNAME + string "spi2 cs pin name" + default "" + endif + + config BSP_USING_SPI3 + bool "Enable SPI 3" + default n + + if BSP_USING_SPI3 + config BSP_SPI3_SCK_PINNAME + string "spi3 sck pin name" + default "" + config BSP_SPI3_SDO_PINNAME + string "spi3 sdo pin name" + default "" + config BSP_SPI3_SDI_PINNAME + string "spi3 sdi pin name" + default "" + config BSP_SPI3_CS_PINNAME + string "spi3 cs pin name" + default "" + endif + endif + menuconfig BSP_USING_WDT bool "Enable Watchdog Timer" select RT_USING_WDT diff --git a/bsp/cvitek/drivers/drv_spi.c b/bsp/cvitek/drivers/drv_spi.c index 82a5b31b3d..3e88af06f6 100644 --- a/bsp/cvitek/drivers/drv_spi.c +++ b/bsp/cvitek/drivers/drv_spi.c @@ -9,6 +9,7 @@ */ #include "drv_spi.h" +#include "drv_pinmux.h" #define DBG_TAG "drv.spi" #define DBG_LVL DBG_INFO @@ -209,11 +210,114 @@ const static struct rt_spi_ops drv_spi_ops = spixfer, }; +#if defined(BOARD_TYPE_MILKV_DUO) || defined(BOARD_TYPE_MILKV_DUO_SPINOR) || defined(BOARD_TYPE_MILKV_DUO256M) || defined(BOARD_TYPE_MILKV_DUO256M_SPINOR) + +#ifdef BSP_USING_SPI0 +static const char *pinname_whitelist_spi0_sck[] = { + NULL, +}; +static const char *pinname_whitelist_spi0_sdo[] = { + NULL, +}; +static const char *pinname_whitelist_spi0_sdi[] = { + NULL, +}; +static const char *pinname_whitelist_spi0_cs[] = { + NULL, +}; +#endif + +#ifdef BSP_USING_SPI1 +static const char *pinname_whitelist_spi1_sck[] = { + NULL, +}; +static const char *pinname_whitelist_spi1_sdo[] = { + NULL, +}; +static const char *pinname_whitelist_spi1_sdi[] = { + NULL, +}; +static const char *pinname_whitelist_spi1_cs[] = { + NULL, +}; +#endif + +#ifdef BSP_USING_SPI2 +static const char *pinname_whitelist_spi2_sck[] = { + "SD1_CLK", + NULL, +}; +static const char *pinname_whitelist_spi2_sdo[] = { + "SD1_CMD", + NULL, +}; +static const char *pinname_whitelist_spi2_sdi[] = { + "SD1_D0", + NULL, +}; +static const char *pinname_whitelist_spi2_cs[] = { + "SD1_D3", + NULL, +}; +#endif + +#ifdef BSP_USING_SPI3 +static const char *pinname_whitelist_spi3_sck[] = { + NULL, +}; +static const char *pinname_whitelist_spi3_sdo[] = { + NULL, +}; +static const char *pinname_whitelist_spi3_sdi[] = { + NULL, +}; +static const char *pinname_whitelist_spi3_cs[] = { + NULL, +}; +#endif + +#else + #error "Unsupported board type!" +#endif + +static void rt_hw_spi_pinmux_config() +{ +#ifdef BSP_USING_SPI0 + pinmux_config(BSP_SPI0_SCK_PINNAME, SPI0_SCK, pinname_whitelist_spi0_sck); + pinmux_config(BSP_SPI0_SDO_PINNAME, SPI0_SDO, pinname_whitelist_spi0_sdo); + pinmux_config(BSP_SPI0_SDI_PINNAME, SPI0_SDI, pinname_whitelist_spi0_sdi); + pinmux_config(BSP_SPI0_CS_PINNAME, SPI0_CS_X, pinname_whitelist_spi0_cs); +#endif /* BSP_USING_SPI0 */ + +#ifdef BSP_USING_SPI1 + pinmux_config(BSP_SPI1_SCK_PINNAME, SPI1_SCK, pinname_whitelist_spi1_sck); + pinmux_config(BSP_SPI1_SDO_PINNAME, SPI1_SDO, pinname_whitelist_spi1_sdo); + pinmux_config(BSP_SPI1_SDI_PINNAME, SPI1_SDI, pinname_whitelist_spi1_sdi); + pinmux_config(BSP_SPI1_CS_PINNAME, SPI1_CS_X, pinname_whitelist_spi1_cs); +#endif /* BSP_USING_SPI1 */ + +#ifdef BSP_USING_SPI2 + pinmux_config(BSP_SPI2_SCK_PINNAME, SPI2_SCK, pinname_whitelist_spi2_sck); + pinmux_config(BSP_SPI2_SDO_PINNAME, SPI2_SDO, pinname_whitelist_spi2_sdo); + pinmux_config(BSP_SPI2_SDI_PINNAME, SPI2_SDI, pinname_whitelist_spi2_sdi); + pinmux_config(BSP_SPI2_CS_PINNAME, SPI2_CS_X, pinname_whitelist_spi2_cs); +#endif /* BSP_USING_SPI2 */ + +#ifdef BSP_USING_SPI3 + pinmux_config(BSP_SPI3_SCK_PINNAME, SPI3_SCK, pinname_whitelist_spi3_sck); + pinmux_config(BSP_SPI3_SDO_PINNAME, SPI3_SDO, pinname_whitelist_spi3_sdo); + pinmux_config(BSP_SPI3_SDI_PINNAME, SPI3_SDI, pinname_whitelist_spi3_sdi); + pinmux_config(BSP_SPI3_CS_PINNAME, SPI3_CS_X, pinname_whitelist_spi3_cs); +#endif /* BSP_USING_SPI3 */ +} + int rt_hw_spi_init(void) { rt_err_t ret = RT_EOK; struct spi_regs *reg = NULL; + rt_hw_spi_pinmux_config(); + for (rt_size_t i = 0; i < sizeof(cv1800_spi_obj) / sizeof(struct cv1800_spi); i++) { /* set reg base addr */ reg = get_spi_base(cv1800_spi_obj[i].spi_id);