bsp:cvitek: add pinmux for spi
Board level pin available info: duo & duo256: NAME SPI CV1800B/GPIO <PINNAME>__<FUNCNAME> ---- --- ------------ --------------------- GP6 SPI2_SCK PWR_GPIO[23] SD1_CLK__SPI2_SCK GP7 SPI2_SDO PWR_GPIO[22] SD1_CMD__SPI2_SDO GP8 SPI2_SDI PWR_GPIO[21] SD1_D0__SPI2_SDI GP9 SPI2_CS_X PWR_GPIO[18] SD1_D3__SPI2_CS_X Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
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51825a5b5c
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2c85bcb463
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@ -164,6 +164,84 @@ menu "General Drivers Configuration"
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select RT_USING_SPI
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default n
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if BSP_USING_SPI
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config BSP_USING_SPI0
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bool "Enable SPI 0"
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default n
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if BSP_USING_SPI0
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config BSP_SPI0_SCK_PINNAME
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string "spi0 sck pin name"
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default ""
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config BSP_SPI0_SDO_PINNAME
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string "spi0 sdo pin name"
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default ""
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config BSP_SPI0_SDI_PINNAME
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string "spi0 sdi pin name"
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default ""
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config BSP_SPI0_CS_PINNAME
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string "spi0 cs pin name"
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default ""
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endif
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config BSP_USING_SPI1
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bool "Enable SPI 1"
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default n
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if BSP_USING_SPI1
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config BSP_SPI1_SCK_PINNAME
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string "spi1 sck pin name"
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default ""
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config BSP_SPI1_SDO_PINNAME
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string "spi1 sdo pin name"
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default ""
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config BSP_SPI1_SDI_PINNAME
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string "spi1 sdi pin name"
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default ""
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config BSP_SPI1_CS_PINNAME
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string "spi1 cs pin name"
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default ""
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endif
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config BSP_USING_SPI2
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bool "Enable SPI 2"
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default n
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if BSP_USING_SPI2
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config BSP_SPI2_SCK_PINNAME
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string "spi2 sck pin name"
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default ""
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config BSP_SPI2_SDO_PINNAME
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string "spi2 sdo pin name"
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default ""
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config BSP_SPI2_SDI_PINNAME
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string "spi2 sdi pin name"
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default ""
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config BSP_SPI2_CS_PINNAME
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string "spi2 cs pin name"
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default ""
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endif
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config BSP_USING_SPI3
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bool "Enable SPI 3"
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default n
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if BSP_USING_SPI3
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config BSP_SPI3_SCK_PINNAME
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string "spi3 sck pin name"
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default ""
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config BSP_SPI3_SDO_PINNAME
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string "spi3 sdo pin name"
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default ""
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config BSP_SPI3_SDI_PINNAME
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string "spi3 sdi pin name"
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default ""
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config BSP_SPI3_CS_PINNAME
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string "spi3 cs pin name"
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default ""
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endif
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endif
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menuconfig BSP_USING_WDT
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bool "Enable Watchdog Timer"
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select RT_USING_WDT
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@ -164,6 +164,84 @@ menu "General Drivers Configuration"
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select RT_USING_SPI
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default n
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if BSP_USING_SPI
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config BSP_USING_SPI0
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bool "Enable SPI 0"
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default n
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if BSP_USING_SPI0
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config BSP_SPI0_SCK_PINNAME
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string "spi0 sck pin name"
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default ""
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config BSP_SPI0_SDO_PINNAME
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string "spi0 sdo pin name"
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default ""
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config BSP_SPI0_SDI_PINNAME
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string "spi0 sdi pin name"
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default ""
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config BSP_SPI0_CS_PINNAME
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string "spi0 cs pin name"
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default ""
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endif
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config BSP_USING_SPI1
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bool "Enable SPI 1"
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default n
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if BSP_USING_SPI1
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config BSP_SPI1_SCK_PINNAME
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string "spi1 sck pin name"
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default ""
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config BSP_SPI1_SDO_PINNAME
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string "spi1 sdo pin name"
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default ""
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config BSP_SPI1_SDI_PINNAME
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string "spi1 sdi pin name"
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default ""
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config BSP_SPI1_CS_PINNAME
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string "spi1 cs pin name"
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default ""
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endif
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config BSP_USING_SPI2
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bool "Enable SPI 2"
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default n
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if BSP_USING_SPI2
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config BSP_SPI2_SCK_PINNAME
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string "spi2 sck pin name"
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default ""
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config BSP_SPI2_SDO_PINNAME
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string "spi2 sdo pin name"
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default ""
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config BSP_SPI2_SDI_PINNAME
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string "spi2 sdi pin name"
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default ""
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config BSP_SPI2_CS_PINNAME
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string "spi2 cs pin name"
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default ""
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endif
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config BSP_USING_SPI3
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bool "Enable SPI 3"
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default n
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if BSP_USING_SPI3
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config BSP_SPI3_SCK_PINNAME
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string "spi3 sck pin name"
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default ""
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config BSP_SPI3_SDO_PINNAME
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string "spi3 sdo pin name"
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default ""
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config BSP_SPI3_SDI_PINNAME
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string "spi3 sdi pin name"
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default ""
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config BSP_SPI3_CS_PINNAME
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string "spi3 cs pin name"
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default ""
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endif
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endif
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menuconfig BSP_USING_WDT
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bool "Enable Watchdog Timer"
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select RT_USING_WDT
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@ -9,6 +9,7 @@
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*/
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#include "drv_spi.h"
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#include "drv_pinmux.h"
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#define DBG_TAG "drv.spi"
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#define DBG_LVL DBG_INFO
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@ -209,11 +210,114 @@ const static struct rt_spi_ops drv_spi_ops =
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spixfer,
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};
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#if defined(BOARD_TYPE_MILKV_DUO) || defined(BOARD_TYPE_MILKV_DUO_SPINOR) || defined(BOARD_TYPE_MILKV_DUO256M) || defined(BOARD_TYPE_MILKV_DUO256M_SPINOR)
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#ifdef BSP_USING_SPI0
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static const char *pinname_whitelist_spi0_sck[] = {
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NULL,
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};
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static const char *pinname_whitelist_spi0_sdo[] = {
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NULL,
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};
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static const char *pinname_whitelist_spi0_sdi[] = {
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NULL,
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};
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static const char *pinname_whitelist_spi0_cs[] = {
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NULL,
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};
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#endif
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#ifdef BSP_USING_SPI1
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static const char *pinname_whitelist_spi1_sck[] = {
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NULL,
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};
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static const char *pinname_whitelist_spi1_sdo[] = {
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NULL,
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};
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static const char *pinname_whitelist_spi1_sdi[] = {
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NULL,
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};
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static const char *pinname_whitelist_spi1_cs[] = {
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NULL,
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};
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#endif
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#ifdef BSP_USING_SPI2
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static const char *pinname_whitelist_spi2_sck[] = {
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"SD1_CLK",
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NULL,
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};
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static const char *pinname_whitelist_spi2_sdo[] = {
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"SD1_CMD",
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NULL,
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};
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static const char *pinname_whitelist_spi2_sdi[] = {
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"SD1_D0",
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NULL,
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};
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static const char *pinname_whitelist_spi2_cs[] = {
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"SD1_D3",
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NULL,
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};
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#endif
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#ifdef BSP_USING_SPI3
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static const char *pinname_whitelist_spi3_sck[] = {
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NULL,
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};
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static const char *pinname_whitelist_spi3_sdo[] = {
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NULL,
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};
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static const char *pinname_whitelist_spi3_sdi[] = {
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NULL,
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};
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static const char *pinname_whitelist_spi3_cs[] = {
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NULL,
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};
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#endif
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#else
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#error "Unsupported board type!"
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#endif
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static void rt_hw_spi_pinmux_config()
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{
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#ifdef BSP_USING_SPI0
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pinmux_config(BSP_SPI0_SCK_PINNAME, SPI0_SCK, pinname_whitelist_spi0_sck);
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pinmux_config(BSP_SPI0_SDO_PINNAME, SPI0_SDO, pinname_whitelist_spi0_sdo);
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pinmux_config(BSP_SPI0_SDI_PINNAME, SPI0_SDI, pinname_whitelist_spi0_sdi);
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pinmux_config(BSP_SPI0_CS_PINNAME, SPI0_CS_X, pinname_whitelist_spi0_cs);
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#endif /* BSP_USING_SPI0 */
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#ifdef BSP_USING_SPI1
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pinmux_config(BSP_SPI1_SCK_PINNAME, SPI1_SCK, pinname_whitelist_spi1_sck);
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pinmux_config(BSP_SPI1_SDO_PINNAME, SPI1_SDO, pinname_whitelist_spi1_sdo);
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pinmux_config(BSP_SPI1_SDI_PINNAME, SPI1_SDI, pinname_whitelist_spi1_sdi);
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pinmux_config(BSP_SPI1_CS_PINNAME, SPI1_CS_X, pinname_whitelist_spi1_cs);
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#endif /* BSP_USING_SPI1 */
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#ifdef BSP_USING_SPI2
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pinmux_config(BSP_SPI2_SCK_PINNAME, SPI2_SCK, pinname_whitelist_spi2_sck);
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pinmux_config(BSP_SPI2_SDO_PINNAME, SPI2_SDO, pinname_whitelist_spi2_sdo);
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pinmux_config(BSP_SPI2_SDI_PINNAME, SPI2_SDI, pinname_whitelist_spi2_sdi);
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pinmux_config(BSP_SPI2_CS_PINNAME, SPI2_CS_X, pinname_whitelist_spi2_cs);
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#endif /* BSP_USING_SPI2 */
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#ifdef BSP_USING_SPI3
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pinmux_config(BSP_SPI3_SCK_PINNAME, SPI3_SCK, pinname_whitelist_spi3_sck);
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pinmux_config(BSP_SPI3_SDO_PINNAME, SPI3_SDO, pinname_whitelist_spi3_sdo);
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pinmux_config(BSP_SPI3_SDI_PINNAME, SPI3_SDI, pinname_whitelist_spi3_sdi);
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pinmux_config(BSP_SPI3_CS_PINNAME, SPI3_CS_X, pinname_whitelist_spi3_cs);
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#endif /* BSP_USING_SPI3 */
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}
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int rt_hw_spi_init(void)
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{
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rt_err_t ret = RT_EOK;
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struct spi_regs *reg = NULL;
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rt_hw_spi_pinmux_config();
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for (rt_size_t i = 0; i < sizeof(cv1800_spi_obj) / sizeof(struct cv1800_spi); i++) {
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/* set reg base addr */
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reg = get_spi_base(cv1800_spi_obj[i].spi_id);
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