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[rtc] use gmtime_r to replace gmtime (#6012) 

* [rtc] use gmtime_r to replace gmtime
This commit is contained in:
Man, Jianting (Meco) 2022-06-22 01:41:06 -04:00 committed by GitHub
parent 4f1f8566f4
commit 2c10d5ad01
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
56 changed files with 2873 additions and 2907 deletions
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20
bsp/acm32/acm32f0x0-nucleo/drivers/drv_rtc.c
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@ -49,21 +49,21 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp)
{
RTC_TimeTypeDef RTC_TimeStruct = {0};
RTC_DateTypeDef RTC_DateStruct = {0};
struct tm *p_tm;
struct tm now;
p_tm = gmtime(&time_stamp);
if (p_tm->tm_year < 100)
gmtime_r(&time_stamp, &now);
if (now.tm_year < 100)
{
return -RT_ERROR;
}
RTC_TimeStruct.u8_Seconds = dec2hex(p_tm->tm_sec);
RTC_TimeStruct.u8_Minutes = dec2hex(p_tm->tm_min);
RTC_TimeStruct.u8_Hours = dec2hex(p_tm->tm_hour);
RTC_DateStruct.u8_Date = dec2hex(p_tm->tm_mday);
RTC_DateStruct.u8_Month = dec2hex(p_tm->tm_mon + 1);
RTC_DateStruct.u8_Year = dec2hex(p_tm->tm_year - 100);
RTC_DateStruct.u8_WeekDay = dec2hex(p_tm->tm_wday) + 1;
RTC_TimeStruct.u8_Seconds = dec2hex(now.tm_sec);
RTC_TimeStruct.u8_Minutes = dec2hex(now.tm_min);
RTC_TimeStruct.u8_Hours = dec2hex(now.tm_hour);
RTC_DateStruct.u8_Date = dec2hex(now.tm_mday);
RTC_DateStruct.u8_Month = dec2hex(now.tm_mon + 1);
RTC_DateStruct.u8_Year = dec2hex(now.tm_year - 100);
RTC_DateStruct.u8_WeekDay = dec2hex(now.tm_wday) + 1;
HAL_RTC_SetTime(&RTC_TimeStruct);
HAL_RTC_SetDate(&RTC_DateStruct);

18
bsp/apollo2/board/rtc.c
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@ -38,7 +38,7 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
{
time_t *time;
struct tm time_temp;
struct tm* time_new;
struct tm time_new;
am_hal_rtc_time_t hal_time;
RT_ASSERT(dev != RT_NULL);
@ -71,16 +71,16 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
case RT_DEVICE_CTRL_RTC_SET_TIME:
time = (time_t *)args;
time_new = gmtime(time);
gmtime_r(time, &time_new);
hal_time.ui32Hour = time_new->tm_hour;
hal_time.ui32Minute = time_new->tm_min;
hal_time.ui32Second = time_new->tm_sec;
hal_time.ui32Hour = time_new.tm_hour;
hal_time.ui32Minute = time_new.tm_min;
hal_time.ui32Second = time_new.tm_sec;
hal_time.ui32Hundredths = 00;
hal_time.ui32Weekday = time_new->tm_wday;
hal_time.ui32DayOfMonth = time_new->tm_mday;
hal_time.ui32Month = time_new->tm_mon + 1;
hal_time.ui32Year = time_new->tm_year + 1900 - 2000;
hal_time.ui32Weekday = time_new.tm_wday;
hal_time.ui32DayOfMonth = time_new.tm_mday;
hal_time.ui32Month = time_new.tm_mon + 1;
hal_time.ui32Year = time_new.tm_year + 1900 - 2000;
hal_time.ui32Century = 0;
am_hal_rtc_time_set(&hal_time);

10
bsp/at32/libraries/rt_drivers/drv_rtc.c
View File

@ -49,22 +49,22 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp)
{
#if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
defined (SOC_SERIES_AT32F415)
struct tm *p_tm;
struct tm now;
p_tm = gmtime(&time_stamp);
if (p_tm->tm_year < 100)
gmtime_r(&time_stamp, &now);
if (now.tm_year < 100)
{
return -RT_ERROR;
}
/* set time */
if(ertc_time_set(p_tm->tm_hour, p_tm->tm_min, p_tm->tm_sec, ERTC_AM) != SUCCESS)
if(ertc_time_set(now.tm_hour, now.tm_min, now.tm_sec, ERTC_AM) != SUCCESS)
{
return -RT_ERROR;
}
/* set date */
if(ertc_date_set(p_tm->tm_year - 100, p_tm->tm_mon + 1, p_tm->tm_mday, p_tm->tm_wday + 1) != SUCCESS)
if(ertc_date_set(now.tm_year - 100, now.tm_mon + 1, now.tm_mday, now.tm_wday + 1) != SUCCESS)
{
return -RT_ERROR;
}

12
bsp/essemi/es32f0654/drivers/drv_rtc.c
View File

@ -55,9 +55,7 @@ static void __rtc_init(rtc_init_t *init)
static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
{
rt_err_t result = RT_EOK;
struct tm time_temp;
struct tm *pNow;
rtc_date_t date;
rtc_time_t time;
@ -76,15 +74,7 @@ static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
rt_enter_critical();
/* converts calendar time time into local time. */
pNow = gmtime((const time_t *)args);
/* copy the statically located variable */
memcpy(&time_temp, pNow, sizeof(struct tm));
/* unlock scheduler. */
rt_exit_critical();
gmtime_r((const time_t *)args, &time_temp);
time.hour = time_temp.tm_hour;
time.minute = time_temp.tm_min;
time.second = time_temp.tm_sec;

12
bsp/essemi/es32f369x/drivers/drv_rtc.c
View File

@ -54,9 +54,7 @@ static void __rtc_init(rtc_init_t *init)
static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
{
rt_err_t result = RT_EOK;
struct tm time_temp;
struct tm *pNow;
rtc_date_t date;
rtc_time_t time;
@ -75,15 +73,7 @@ static rt_err_t es32f0_rtc_control(rt_device_t dev, int cmd, void *args)
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
rt_enter_critical();
/* converts calendar time time into local time. */
pNow = gmtime((const time_t *)args);
/* copy the statically located variable */
memcpy(&time_temp, pNow, sizeof(struct tm));
/* unlock scheduler. */
rt_exit_critical();
gmtime_r((const time_t *)args, &time_temp);
time.hour = time_temp.tm_hour;
time.minute = time_temp.tm_min;
time.second = time_temp.tm_sec;

16
bsp/imxrt/libraries/drivers/drv_rtc.c
View File

@ -45,18 +45,18 @@ static time_t get_timestamp(void)
static int set_timestamp(time_t timestamp)
{
struct tm *p_tm;
struct tm now;
snvs_hp_rtc_datetime_t rtcDate = {0};
p_tm = gmtime(&timestamp);
gmtime_r(&timestamp, &now);
rtcDate.second = p_tm->tm_sec ;
rtcDate.minute = p_tm->tm_min ;
rtcDate.hour = p_tm->tm_hour;
rtcDate.second = now.tm_sec ;
rtcDate.minute = now.tm_min ;
rtcDate.hour = now.tm_hour;
rtcDate.day = p_tm->tm_mday;
rtcDate.month = p_tm->tm_mon + 1;
rtcDate.year = p_tm->tm_year + 1900;
rtcDate.day = now.tm_mday;
rtcDate.month = now.tm_mon + 1;
rtcDate.year = now.tm_year + 1900;
if (SNVS_HP_RTC_SetDatetime(SNVS, &rtcDate) != kStatus_Success)
{

22
bsp/loongson/ls1bdev/drivers/drv_uart.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -181,19 +181,19 @@ void rt_hw_uart_init(void)
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef RT_USING_UART5
uart = &uart5;
uart = &uart5;
serial5.ops = &ls1b_uart_ops;
serial5.config = config;
serial5.ops = &ls1b_uart_ops;
serial5.config = config;
rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial5, "UART5");
rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial5, "UART5");
/* register UART5 device */
rt_hw_serial_register(&serial5,
"uart5",
//RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
/* register UART5 device */
rt_hw_serial_register(&serial5,
"uart5",
//RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
#endif /* RT_USING_UART5 */

2
bsp/loongson/ls1cdev/drivers/display_controller.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

42
bsp/loongson/ls1cdev/drivers/display_controller.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -19,31 +19,31 @@
#define DC_BASE 0xBC301240 //Display Controller
/* Frame Buffer registers */
#define DC_FB_CONFIG __REG32(DC_BASE + 0x000)
#define DC_FB_BUFFER_ADDR0 __REG32(DC_BASE + 0x020)
#define DC_FB_BUFFER_STRIDE __REG32(DC_BASE + 0x040)
#define DC_FB_BUFFER_ORIGIN __REG32(DC_BASE + 0x060)
#define DC_DITHER_CONFIG __REG32(DC_BASE + 0x120)
#define DC_DITHER_TABLE_LOW __REG32(DC_BASE + 0x140)
#define DC_DITHER_TABLE_HIGH __REG32(DC_BASE + 0x160)
#define DC_PANEL_CONFIG __REG32(DC_BASE + 0x180)
#define DC_PANEL_TIMING __REG32(DC_BASE + 0x1A0)
#define DC_HDISPLAY __REG32(DC_BASE + 0x1C0)
#define DC_HSYNC __REG32(DC_BASE + 0x1E0)
#define DC_VDISPLAY __REG32(DC_BASE + 0x240)
#define DC_VSYNC __REG32(DC_BASE + 0x260)
#define DC_FB_BUFFER_ADDR1 __REG32(DC_BASE + 0x340)
#define DC_FB_CONFIG __REG32(DC_BASE + 0x000)
#define DC_FB_BUFFER_ADDR0 __REG32(DC_BASE + 0x020)
#define DC_FB_BUFFER_STRIDE __REG32(DC_BASE + 0x040)
#define DC_FB_BUFFER_ORIGIN __REG32(DC_BASE + 0x060)
#define DC_DITHER_CONFIG __REG32(DC_BASE + 0x120)
#define DC_DITHER_TABLE_LOW __REG32(DC_BASE + 0x140)
#define DC_DITHER_TABLE_HIGH __REG32(DC_BASE + 0x160)
#define DC_PANEL_CONFIG __REG32(DC_BASE + 0x180)
#define DC_PANEL_TIMING __REG32(DC_BASE + 0x1A0)
#define DC_HDISPLAY __REG32(DC_BASE + 0x1C0)
#define DC_HSYNC __REG32(DC_BASE + 0x1E0)
#define DC_VDISPLAY __REG32(DC_BASE + 0x240)
#define DC_VSYNC __REG32(DC_BASE + 0x260)
#define DC_FB_BUFFER_ADDR1 __REG32(DC_BASE + 0x340)
/* Display Controller driver for 1024x768 16bit */
#define FB_XSIZE 480
#define FB_YSIZE 272
#define FB_XSIZE 480
#define FB_YSIZE 272
#define CONFIG_VIDEO_16BPP
#define OSC 24000000 /* Hz */
#define OSC 24000000 /* Hz */
#define K1BASE 0xA0000000
#define KSEG1(addr) ((void *)(K1BASE | (rt_uint32_t)(addr)))
#define HW_FB_ADDR KSEG1(_rt_framebuffer)
#define K1BASE 0xA0000000
#define KSEG1(addr) ((void *)(K1BASE | (rt_uint32_t)(addr)))
#define HW_FB_ADDR KSEG1(_rt_framebuffer)
struct vga_struct
{

2
bsp/loongson/ls1cdev/drivers/drv_can.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls1cdev/drivers/drv_gpio.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls1cdev/drivers/drv_pwm.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

22
bsp/loongson/ls1cdev/drivers/drv_rtc.c
View File

@ -1,10 +1,10 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* Date Author Notes
* 2018-05-05 sundm75 first version
*/
@ -21,7 +21,7 @@
#if defined(RT_USING_RTC)
#ifdef RT_RTC_DEBUG
#define rtc_debug(format,args...) rt_kprintf(format, ##args)
#define rtc_debug(format,args...) rt_kprintf(format, ##args)
#else
#define rtc_debug(format,args...)
#endif
@ -50,18 +50,18 @@ static time_t get_timestamp(void)
static int set_timestamp(time_t timestamp)
{
struct tm *p_tm;
struct tm now;
RTC_TimeTypeDef rtcDate;
p_tm = gmtime(&timestamp);
gmtime_r(&timestamp, &now);
rtcDate.Seconds= p_tm->tm_sec ;
rtcDate.Minutes= p_tm->tm_min ;
rtcDate.Hours= p_tm->tm_hour;
rtcDate.Seconds= now.tm_sec ;
rtcDate.Minutes= now.tm_min ;
rtcDate.Hours= now.tm_hour;
rtcDate.Date= p_tm->tm_mday;
rtcDate.Month= p_tm->tm_mon + 1;
rtcDate.Year= p_tm->tm_year + 1900 - 2000;
rtcDate.Date= now.tm_mday;
rtcDate.Month= now.tm_mon + 1;
rtcDate.Year= now.tm_year + 1900 - 2000;
RTC_SetTime(RTC_Handler, &rtcDate);
rt_kprintf("\r\nrtcDate is %d.%d.%d - %d:%d:%d",rtcDate.Year, rtcDate.Month, rtcDate.Date, rtcDate.Hours, rtcDate.Minutes, rtcDate.Seconds);

4
bsp/loongson/ls1cdev/drivers/drv_rtc.h
View File

@ -1,10 +1,10 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* Date Author Notes
* 2018-05-05 sundm75 first version
*/

2
bsp/loongson/ls1cdev/drivers/drv_spi.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls1cdev/drivers/drv_touch.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls1cdev/drivers/drv_touch.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls1cdev/drivers/drv_wdt.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls1cdev/drivers/hw_i2c.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls1cdev/drivers/hw_i2c.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

184
bsp/loongson/ls1cdev/drivers/net/mii.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -14,123 +14,123 @@
static inline unsigned int mii_nway_result (unsigned int negotiated)
{
unsigned int ret;
unsigned int ret;
if (negotiated & LPA_100FULL)
ret = LPA_100FULL;
else if (negotiated & LPA_100BASE4)
ret = LPA_100BASE4;
else if (negotiated & LPA_100HALF)
ret = LPA_100HALF;
else if (negotiated & LPA_10FULL)
ret = LPA_10FULL;
else
ret = LPA_10HALF;
if (negotiated & LPA_100FULL)
ret = LPA_100FULL;
else if (negotiated & LPA_100BASE4)
ret = LPA_100BASE4;
else if (negotiated & LPA_100HALF)
ret = LPA_100HALF;
else if (negotiated & LPA_10FULL)
ret = LPA_10FULL;
else
ret = LPA_10HALF;
return ret;
return ret;
}
static int mii_check_gmii_support(struct mii_if_info *mii)
{
int reg;
int reg;
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
if (reg & BMSR_ESTATEN) {
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_ESTATUS);
if (reg & (ESTATUS_1000_TFULL | ESTATUS_1000_THALF))
return 1;
}
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
if (reg & BMSR_ESTATEN) {
reg = mii->mdio_read(mii->dev, mii->phy_id, MII_ESTATUS);
if (reg & (ESTATUS_1000_TFULL | ESTATUS_1000_THALF))
return 1;
}
return 0;
return 0;
}
static int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd)
{
struct synopGMACNetworkAdapter * dev = mii->dev;
u32 advert, bmcr, lpa, nego;
u32 advert2 = 0, bmcr2 = 0, lpa2 = 0;
struct synopGMACNetworkAdapter * dev = mii->dev;
u32 advert, bmcr, lpa, nego;
u32 advert2 = 0, bmcr2 = 0, lpa2 = 0;
ecmd->supported =
(SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
if (mii->supports_gmii)
ecmd->supported |= SUPPORTED_1000baseT_Half |
SUPPORTED_1000baseT_Full;
ecmd->supported =
(SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
if (mii->supports_gmii)
ecmd->supported |= SUPPORTED_1000baseT_Half |
SUPPORTED_1000baseT_Full;
/* only supports twisted-pair */
ecmd->port = PORT_MII;
/* only supports twisted-pair */
ecmd->port = PORT_MII;
/* only supports internal transceiver */
ecmd->transceiver = XCVR_INTERNAL;
/* only supports internal transceiver */
ecmd->transceiver = XCVR_INTERNAL;
/* this isn't fully supported at higher layers */
ecmd->phy_address = mii->phy_id;
/* this isn't fully supported at higher layers */
ecmd->phy_address = mii->phy_id;
ecmd->advertising = ADVERTISED_TP | ADVERTISED_MII;
advert = mii->mdio_read(dev, mii->phy_id, MII_ADVERTISE);
if (mii->supports_gmii)
advert2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
ecmd->advertising = ADVERTISED_TP | ADVERTISED_MII;
advert = mii->mdio_read(dev, mii->phy_id, MII_ADVERTISE);
if (mii->supports_gmii)
advert2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
if (advert & ADVERTISE_10HALF)
ecmd->advertising |= ADVERTISED_10baseT_Half;
if (advert & ADVERTISE_10FULL)
ecmd->advertising |= ADVERTISED_10baseT_Full;
if (advert & ADVERTISE_100HALF)
ecmd->advertising |= ADVERTISED_100baseT_Half;
if (advert & ADVERTISE_100FULL)
ecmd->advertising |= ADVERTISED_100baseT_Full;
if (advert2 & ADVERTISE_1000HALF)
ecmd->advertising |= ADVERTISED_1000baseT_Half;
if (advert2 & ADVERTISE_1000FULL)
ecmd->advertising |= ADVERTISED_1000baseT_Full;
if (advert & ADVERTISE_10HALF)
ecmd->advertising |= ADVERTISED_10baseT_Half;
if (advert & ADVERTISE_10FULL)
ecmd->advertising |= ADVERTISED_10baseT_Full;
if (advert & ADVERTISE_100HALF)
ecmd->advertising |= ADVERTISED_100baseT_Half;
if (advert & ADVERTISE_100FULL)
ecmd->advertising |= ADVERTISED_100baseT_Full;
if (advert2 & ADVERTISE_1000HALF)
ecmd->advertising |= ADVERTISED_1000baseT_Half;
if (advert2 & ADVERTISE_1000FULL)
ecmd->advertising |= ADVERTISED_1000baseT_Full;
bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR);
lpa = mii->mdio_read(dev, mii->phy_id, MII_LPA);
if (mii->supports_gmii) {
bmcr2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
lpa2 = mii->mdio_read(dev, mii->phy_id, MII_STAT1000);
}
if (bmcr & BMCR_ANENABLE) {
ecmd->advertising |= ADVERTISED_Autoneg;
ecmd->autoneg = AUTONEG_ENABLE;
bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR);
lpa = mii->mdio_read(dev, mii->phy_id, MII_LPA);
if (mii->supports_gmii) {
bmcr2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
lpa2 = mii->mdio_read(dev, mii->phy_id, MII_STAT1000);
}
if (bmcr & BMCR_ANENABLE) {
ecmd->advertising |= ADVERTISED_Autoneg;
ecmd->autoneg = AUTONEG_ENABLE;
nego = mii_nway_result(advert & lpa);
if ((bmcr2 & (ADVERTISE_1000HALF | ADVERTISE_1000FULL)) &
(lpa2 >> 2))
ecmd->speed = SPEED_1000;
else if (nego == LPA_100FULL || nego == LPA_100HALF)
ecmd->speed = SPEED_100;
else
ecmd->speed = SPEED_10;
if ((lpa2 & LPA_1000FULL) || nego == LPA_100FULL ||
nego == LPA_10FULL) {
ecmd->duplex = DUPLEX_FULL;
mii->full_duplex = 1;
} else {
ecmd->duplex = DUPLEX_HALF;
mii->full_duplex = 0;
}
} else {
ecmd->autoneg = AUTONEG_DISABLE;
nego = mii_nway_result(advert & lpa);
if ((bmcr2 & (ADVERTISE_1000HALF | ADVERTISE_1000FULL)) &
(lpa2 >> 2))
ecmd->speed = SPEED_1000;
else if (nego == LPA_100FULL || nego == LPA_100HALF)
ecmd->speed = SPEED_100;
else
ecmd->speed = SPEED_10;
if ((lpa2 & LPA_1000FULL) || nego == LPA_100FULL ||
nego == LPA_10FULL) {
ecmd->duplex = DUPLEX_FULL;
mii->full_duplex = 1;
} else {
ecmd->duplex = DUPLEX_HALF;
mii->full_duplex = 0;
}
} else {
ecmd->autoneg = AUTONEG_DISABLE;
ecmd->speed = ((bmcr & BMCR_SPEED1000 &&
(bmcr & BMCR_SPEED100) == 0) ? SPEED_1000 :
(bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10);
ecmd->duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
}
ecmd->speed = ((bmcr & BMCR_SPEED1000 &&
(bmcr & BMCR_SPEED100) == 0) ? SPEED_1000 :
(bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10);
ecmd->duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
}
/* ignore maxtxpkt, maxrxpkt for now */
/* ignore maxtxpkt, maxrxpkt for now */
return 0;
return 0;
}
static int mii_link_ok (struct mii_if_info *mii)
{
/* first, a dummy read, needed to latch some MII phys */
mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
if (mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR) & BMSR_LSTATUS)
return 1;
return 0;
/* first, a dummy read, needed to latch some MII phys */
mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
if (mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR) & BMSR_LSTATUS)
return 1;
return 0;
}

144
bsp/loongson/ls1cdev/drivers/net/mii.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -24,7 +24,7 @@
#define MII_EXPANSION 0x06 /* Expansion register */
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
#define MII_STAT1000 0x0a /* 1000BASE-T status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_DCOUNTER 0x12 /* Disconnect counter */
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
@ -39,7 +39,7 @@
/* Basic mode control register. */
#define BMCR_RESV 0x003f /* Unused... */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_CTST 0x0080 /* Collision test */
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
@ -58,9 +58,9 @@
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
#define BMSR_RESV 0x00c0 /* Unused... */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */
#define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */
#define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
@ -87,26 +87,26 @@
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
ADVERTISE_CSMA)
ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)
/* Indicates what features are advertised by the interface. */
#define ADVERTISED_10baseT_Half (1 << 0)
#define ADVERTISED_10baseT_Full (1 << 1)
#define ADVERTISED_100baseT_Half (1 << 2)
#define ADVERTISED_100baseT_Full (1 << 3)
#define ADVERTISED_1000baseT_Half (1 << 4)
#define ADVERTISED_1000baseT_Full (1 << 5)
#define ADVERTISED_Autoneg (1 << 6)
#define ADVERTISED_TP (1 << 7)
#define ADVERTISED_AUI (1 << 8)
#define ADVERTISED_MII (1 << 9)
#define ADVERTISED_FIBRE (1 << 10)
#define ADVERTISED_BNC (1 << 11)
#define ADVERTISED_10000baseT_Full (1 << 12)
#define ADVERTISED_Pause (1 << 13)
#define ADVERTISED_Asym_Pause (1 << 14)
#define ADVERTISED_10baseT_Half (1 << 0)
#define ADVERTISED_10baseT_Full (1 << 1)
#define ADVERTISED_100baseT_Half (1 << 2)
#define ADVERTISED_100baseT_Full (1 << 3)
#define ADVERTISED_1000baseT_Half (1 << 4)
#define ADVERTISED_1000baseT_Full (1 << 5)
#define ADVERTISED_Autoneg (1 << 6)
#define ADVERTISED_TP (1 << 7)
#define ADVERTISED_AUI (1 << 8)
#define ADVERTISED_MII (1 << 9)
#define ADVERTISED_FIBRE (1 << 10)
#define ADVERTISED_BNC (1 << 11)
#define ADVERTISED_10000baseT_Full (1 << 12)
#define ADVERTISED_Pause (1 << 13)
#define ADVERTISED_Asym_Pause (1 << 14)
/* Link partner ability register. */
#define LPA_SLCT 0x001f /* Same as advertise selector */
@ -126,8 +126,8 @@
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
@ -137,8 +137,8 @@
#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
#define EXPANSION_RESV 0xffe0 /* Unused... */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
/* N-way test register. */
#define NWAYTEST_RESV1 0x00ff /* Unused... */
@ -154,21 +154,21 @@
#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
#define SUPPORTED_10baseT_Half (1 << 0)
#define SUPPORTED_10baseT_Full (1 << 1)
#define SUPPORTED_100baseT_Half (1 << 2)
#define SUPPORTED_100baseT_Full (1 << 3)
#define SUPPORTED_1000baseT_Half (1 << 4)
#define SUPPORTED_1000baseT_Full (1 << 5)
#define SUPPORTED_Autoneg (1 << 6)
#define SUPPORTED_TP (1 << 7)
#define SUPPORTED_AUI (1 << 8)
#define SUPPORTED_MII (1 << 9)
#define SUPPORTED_FIBRE (1 << 10)
#define SUPPORTED_BNC (1 << 11)
#define SUPPORTED_10000baseT_Full (1 << 12)
#define SUPPORTED_Pause (1 << 13)
#define SUPPORTED_Asym_Pause (1 << 14)
#define SUPPORTED_10baseT_Half (1 << 0)
#define SUPPORTED_10baseT_Full (1 << 1)
#define SUPPORTED_100baseT_Half (1 << 2)
#define SUPPORTED_100baseT_Full (1 << 3)
#define SUPPORTED_1000baseT_Half (1 << 4)
#define SUPPORTED_1000baseT_Full (1 << 5)
#define SUPPORTED_Autoneg (1 << 6)
#define SUPPORTED_TP (1 << 7)
#define SUPPORTED_AUI (1 << 8)
#define SUPPORTED_MII (1 << 9)
#define SUPPORTED_FIBRE (1 << 10)
#define SUPPORTED_BNC (1 << 11)
#define SUPPORTED_10000baseT_Full (1 << 12)
#define SUPPORTED_Pause (1 << 13)
#define SUPPORTED_Asym_Pause (1 << 14)
/* Which connector port. */
@ -185,47 +185,47 @@
#define XCVR_DUMMY2 0x03
#define XCVR_DUMMY3 0x04
#define AUTONEG_DISABLE 0x00
#define AUTONEG_ENABLE 0x01
#define AUTONEG_DISABLE 0x00
#define AUTONEG_ENABLE 0x01
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
#define SPEED_2500 2500
#define SPEED_10000 10000
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
#define SPEED_2500 2500
#define SPEED_10000 10000
#define DUPLEX_HALF 0x00
#define DUPLEX_FULL 0x01
#define DUPLEX_HALF 0x00
#define DUPLEX_FULL 0x01
struct ethtool_cmd {
u32 cmd;
u32 supported; /* Features this interface supports */
u32 advertising; /* Features this interface advertises */
u16 speed; /* The forced speed, 10Mb, 100Mb, gigabit */
u8 duplex; /* Duplex, half or full */
u8 port; /* Which connector port */
u8 phy_address;
u8 transceiver; /* Which transceiver to use */
u8 autoneg; /* Enable or disable autonegotiation */
u32 maxtxpkt; /* Tx pkts before generating tx int */
u32 maxrxpkt; /* Rx pkts before generating rx int */
u32 reserved[4];
u32 cmd;
u32 supported; /* Features this interface supports */
u32 advertising; /* Features this interface advertises */
u16 speed; /* The forced speed, 10Mb, 100Mb, gigabit */
u8 duplex; /* Duplex, half or full */
u8 port; /* Which connector port */
u8 phy_address;
u8 transceiver; /* Which transceiver to use */
u8 autoneg; /* Enable or disable autonegotiation */
u32 maxtxpkt; /* Tx pkts before generating tx int */
u32 maxrxpkt; /* Rx pkts before generating rx int */
u32 reserved[4];
};
struct mii_if_info {
int phy_id;
int advertising;
int phy_id_mask;
int reg_num_mask;
int phy_id;
int advertising;
int phy_id_mask;
int reg_num_mask;
unsigned int full_duplex : 1; /* is full duplex? */
unsigned int force_media : 1; /* is autoneg. disabled? */
unsigned int supports_gmii : 1; /* are GMII registers supported? */
unsigned int full_duplex : 1; /* is full duplex? */
unsigned int force_media : 1; /* is autoneg. disabled? */
unsigned int supports_gmii : 1; /* are GMII registers supported? */
struct synopGMACNetworkAdapter *dev;
int (*mdio_read) (struct synopGMACNetworkAdapter *dev, int phy_id, int location);
void (*mdio_write) (struct synopGMACNetworkAdapter *dev, int phy_id, int location, int val);
struct synopGMACNetworkAdapter *dev;
int (*mdio_read) (struct synopGMACNetworkAdapter *dev, int phy_id, int location);
void (*mdio_write) (struct synopGMACNetworkAdapter *dev, int phy_id, int location, int val);
};
#endif

2
bsp/loongson/ls1cdev/drivers/net/synopGMAC.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

4
bsp/loongson/ls1cdev/drivers/net/synopGMAC.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,4 +20,4 @@
int rt_hw_eth_init(void);
#endif /*__SYNOPGMAC__H*/
#endif /*__SYNOPGMAC__H*/

2116
bsp/loongson/ls1cdev/drivers/net/synopGMAC_Dev.c
View File

File diff suppressed because it is too large Load Diff

890
bsp/loongson/ls1cdev/drivers/net/synopGMAC_Dev.h
View File

File diff suppressed because it is too large Load Diff

54
bsp/loongson/ls1cdev/drivers/net/synopGMAC_Host.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -21,35 +21,35 @@
struct net_device_stats
{
unsigned long rx_packets; /* total packets received */
unsigned long tx_packets; /* total packets transmitted */
unsigned long rx_bytes; /* total bytes received */
unsigned long tx_bytes; /* total bytes transmitted */
unsigned long rx_errors; /* bad packets received */
unsigned long tx_errors; /* packet transmit problems */
unsigned long rx_dropped; /* no space in linux buffers */
unsigned long tx_dropped; /* no space available in linux */
unsigned long multicast; /* multicast packets received */
unsigned long collisions;
unsigned long rx_packets; /* total packets received */
unsigned long tx_packets; /* total packets transmitted */
unsigned long rx_bytes; /* total bytes received */
unsigned long tx_bytes; /* total bytes transmitted */
unsigned long rx_errors; /* bad packets received */
unsigned long tx_errors; /* packet transmit problems */
unsigned long rx_dropped; /* no space in linux buffers */
unsigned long tx_dropped; /* no space available in linux */
unsigned long multicast; /* multicast packets received */
unsigned long collisions;
/* detailed rx_errors: */
unsigned long rx_length_errors;
unsigned long rx_over_errors; /* receiver ring buff overflow */
unsigned long rx_crc_errors; /* recved pkt with crc error */
unsigned long rx_frame_errors; /* recv'd frame alignment error */
unsigned long rx_fifo_errors; /* recv'r fifo overrun */
unsigned long rx_missed_errors; /* receiver missed packet */
/* detailed rx_errors: */
unsigned long rx_length_errors;
unsigned long rx_over_errors; /* receiver ring buff overflow */
unsigned long rx_crc_errors; /* recved pkt with crc error */
unsigned long rx_frame_errors; /* recv'd frame alignment error */
unsigned long rx_fifo_errors; /* recv'r fifo overrun */
unsigned long rx_missed_errors; /* receiver missed packet */
/* detailed tx_errors */
unsigned long tx_aborted_errors;
unsigned long tx_carrier_errors;
unsigned long tx_fifo_errors;
unsigned long tx_heartbeat_errors;
unsigned long tx_window_errors;
/* detailed tx_errors */
unsigned long tx_aborted_errors;
unsigned long tx_carrier_errors;
unsigned long tx_fifo_errors;
unsigned long tx_heartbeat_errors;
unsigned long tx_window_errors;
/* for cslip etc */
unsigned long rx_compressed;
unsigned long tx_compressed;
/* for cslip etc */
unsigned long rx_compressed;
unsigned long tx_compressed;
};

4
bsp/loongson/ls1cdev/drivers/net/synopGMAC_debug.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -15,7 +15,7 @@
//#define GMAC_DEBUG
#include <rtthread.h>
#ifdef GMAC_DEBUG
#define DEBUG_MES rt_kprintf
#define DEBUG_MES rt_kprintf
#else
#define DEBUG_MES(...)
#endif

2
bsp/loongson/ls1cdev/drivers/net/synopGMAC_network_interface.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

70
bsp/loongson/ls1cdev/drivers/net/synopGMAC_plat.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -16,8 +16,8 @@
extern void flush_cache(unsigned long start_addr, unsigned long size);
dma_addr_t __attribute__((weak)) gmac_dmamap(unsigned long va,u32 size)
{
return VA_TO_PA (va);
//return UNCACHED_TO_PHYS(va);
return VA_TO_PA (va);
//return UNCACHED_TO_PHYS(va);
}
@ -31,10 +31,10 @@ dma_addr_t __attribute__((weak)) gmac_dmamap(unsigned long va,u32 size)
void *plat_alloc_memory(u32 bytes)
{
//return (void*)malloc((size_t)bytes, M_DEVBUF, M_DONTWAIT);
void *buf = (void*)rt_malloc((u32)bytes);
void *buf = (void*)rt_malloc((u32)bytes);
flush_cache((unsigned long)buf, bytes);
return buf;
flush_cache((unsigned long)buf, bytes);
return buf;
}
/**
@ -46,28 +46,28 @@ void *plat_alloc_memory(u32 bytes)
//void *plat_alloc_consistent_dmaable_memory(struct synopGMACdevice *dev, u32 size, u32 *addr)
void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u32 *addr)
{
void *buf;
buf = (void*)rt_malloc((u32)(size+16));
//CPU_IOFlushDCache( buf,size, SYNC_W);
unsigned long i = (unsigned long)buf;
// rt_kprintf("size = %d\n", size);
// rt_kprintf("bufaddr = %p\n", buf);
// rt_kprintf("i%%16 == %d\n", i%16);
if(i%16 == 8){
i += 8;
}
else if(i%16 == 4){
i += 12;
}
else if(i%16 == 12){
i += 4;
}
void *buf;
buf = (void*)rt_malloc((u32)(size+16));
//CPU_IOFlushDCache( buf,size, SYNC_W);
unsigned long i = (unsigned long)buf;
// rt_kprintf("size = %d\n", size);
// rt_kprintf("bufaddr = %p\n", buf);
// rt_kprintf("i%%16 == %d\n", i%16);
if(i%16 == 8){
i += 8;
}
else if(i%16 == 4){
i += 12;
}
else if(i%16 == 12){
i += 4;
}
flush_cache(i, size);
*addr =gmac_dmamap(i, size);
buf = (unsigned char *)CACHED_TO_UNCACHED(i);
// rt_kprintf("bufaddr = %p\n", buf);
return buf;
flush_cache(i, size);
*addr =gmac_dmamap(i, size);
buf = (unsigned char *)CACHED_TO_UNCACHED(i);
// rt_kprintf("bufaddr = %p\n", buf);
return buf;
}
@ -81,7 +81,7 @@ void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u3
//void plat_free_consistent_dmaable_memory(void * addr)
void plat_free_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, void * addr,u32 dma_addr)
{
rt_free((void*)PHYS_TO_CACHED(UNCACHED_TO_PHYS(addr)));
rt_free((void*)PHYS_TO_CACHED(UNCACHED_TO_PHYS(addr)));
return;
}
@ -94,18 +94,18 @@ void plat_free_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, void
*/
void plat_free_memory(void *buffer)
{
rt_free(buffer);
return ;
rt_free(buffer);
return ;
}
dma_addr_t plat_dma_map_single(void *hwdev, void *ptr,
u32 size)
u32 size)
{
unsigned long addr = (unsigned long) ptr;
unsigned long addr = (unsigned long) ptr;
//CPU_IOFlushDCache(addr,size, direction);
flush_cache(addr, size);
flush_cache(addr, size);
return gmac_dmamap(addr, size);
}
@ -116,8 +116,8 @@ return gmac_dmamap(addr, size);
*/
void plat_delay(u32 delay)
{
while (delay--);
return;
while (delay--);
return;
}

30
bsp/loongson/ls1cdev/drivers/net/synopGMAC_plat.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -13,7 +13,7 @@
#ifndef SYNOP_GMAC_PLAT_H
#define SYNOP_GMAC_PLAT_H 1
/* sw
/* sw
#include <linux/kernel.h>
#include <asm/io.h>
#include <linux/gfp.h>
@ -26,7 +26,7 @@
//#include "GMAC_Pmon.h"
//#include "synopGMAC_Host.h"
#include <rtthread.h>
//sw: copy the type define into here
//sw: copy the type define into here
#define IOCTL_READ_REGISTER SIOCDEVPRIVATE+1
#define IOCTL_WRITE_REGISTER SIOCDEVPRIVATE+2
#define IOCTL_READ_IPSTRUCT SIOCDEVPRIVATE+3
@ -58,7 +58,7 @@ typedef int bool;
#define VA_TO_PA(x) UNCACHED_TO_PHYS(x)
/* sw
/* sw
#define TR0(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
#ifdef DEBUG
@ -102,9 +102,9 @@ enum synopGMAC_boolean
*
*/
#define LE32_TO_CPU __le32_to_cpu
#define BE32_TO_CPU __be32_to_cpu
#define CPU_TO_LE32 __cpu_to_le32
#define LE32_TO_CPU __le32_to_cpu
#define BE32_TO_CPU __be32_to_cpu
#define CPU_TO_LE32 __cpu_to_le32
/* Error Codes */
#define ESYNOPGMACNOERR 0
@ -114,9 +114,9 @@ enum synopGMAC_boolean
struct Network_interface_data
{
u32 unit;
u32 addr;
u32 data;
u32 unit;
u32 addr;
u32 data;
};
@ -169,15 +169,15 @@ static void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData )
u32 addr;
addr = RegBase + (u32)RegOffset;
addr = RegBase + (u32)RegOffset;
// rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
#if SYNOP_REG_DEBUG
TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
#endif
*(volatile u32 *)addr = RegData;
*(volatile u32 *)addr = RegData;
if(addr == 0xbfe1100c)
DEBUG_MES("regdata = %08x\n", RegData);
if(addr == 0xbfe1100c)
DEBUG_MES("regdata = %08x\n", RegData);
return;
}
@ -240,7 +240,7 @@ static bool synopGMACCheckBits(u32 RegBase, u32 RegOffset, u32 BitPos)
data = synopGMACReadReg(RegBase, RegOffset);
data &= BitPos;
if(data) return true;
else return false;
else return false;
}

4
bsp/loongson/ls1cdev/drivers/net/synopGMAC_types.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -22,4 +22,4 @@ typedef signed int s32;
typedef u32 dma_addr_t;
#endif /*__TYPES__H*/
#endif /*__TYPES__H*/

162
bsp/loongson/ls1cdev/drivers/selfboot.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -12,52 +12,52 @@
#define __RT_LS1C_SELFBOOT_H
/* SDRAM PARAM macro */
#define SD_FREQ (((APB_CLK / 4) * (PLL_MULT / CPU_DIV)) / SDRAM_PARAM_DIV_NUM)
#define SD_FREQ (((APB_CLK / 4) * (PLL_MULT / CPU_DIV)) / SDRAM_PARAM_DIV_NUM)
/* SDRAM ROW */
#define ROW_1K 0x7
#define ROW_2K 0x0
#define ROW_4K 0x1
#define ROW_8K 0x2
#define ROW_16K 0x3
#define ROW_1K 0x7
#define ROW_2K 0x0
#define ROW_4K 0x1
#define ROW_8K 0x2
#define ROW_16K 0x3
/* SDRAM COL */
#define COL_256 0x7
#define COL_512 0x0
#define COL_1K 0x1
#define COL_2K 0x2
#define COL_4K 0x3
#define COL_256 0x7
#define COL_512 0x0
#define COL_1K 0x1
#define COL_2K 0x2
#define COL_4K 0x3
/* SDRAM WIDTH */
#define WIDTH_8 0x0
#define WIDTH_16 0x1
#define WIDTH_32 0x2
#define WIDTH_8 0x0
#define WIDTH_16 0x1
#define WIDTH_32 0x2
#define TRCD 3
#define TCL 3
#define TRP 3
#define TRFC 8
#define TRAS 6
#define TREF 0x818
#define TWR 2
#define TRCD 3
#define TCL 3
#define TRP 3
#define TRFC 8
#define TRAS 6
#define TREF 0x818
#define TWR 2
#define DEF_SEL 0x1
#define DEF_SEL_N 0x0
#define HANG_UP 0x1
#define HANG_UP_N 0x0
#define CFG_VALID 0x1
#define DEF_SEL 0x1
#define DEF_SEL_N 0x0
#define HANG_UP 0x1
#define HANG_UP_N 0x0
#define CFG_VALID 0x1
#include "board.h"
#define SD_PARA0 (0x7f<<25 | \
(TRAS << 21) | \
(TRFC << 17) | (TRP << 14) | (TCL << 11) | \
(TRCD << 8) | (SDRAM_WIDTH << 6) | (SDRAM_COL << 3) | \
SDRAM_ROW)
#define SD_PARA0 (0x7f<<25 | \
(TRAS << 21) | \
(TRFC << 17) | (TRP << 14) | (TCL << 11) | \
(TRCD << 8) | (SDRAM_WIDTH << 6) | (SDRAM_COL << 3) | \
SDRAM_ROW)
#define SD_PARA1 ((HANG_UP_N << 8) | (DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7))
#define SD_PARA1 ((HANG_UP_N << 8) | (DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7))
#define SD_PARA1_EN ((CFG_VALID << 9) | (HANG_UP_N << 8) | \
(DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7))
#define SD_PARA1_EN ((CFG_VALID << 9) | (HANG_UP_N << 8) | \
(DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7))
#define LS1C_CBUS_FIRST1 0xBFE011C4
#define LS1C_UART2_BASE 0xBFE48000
@ -76,62 +76,62 @@
#define LS1C_UART_MSB_OFFSET (1)
/* interrupt enable register */
#define IER_IRxE 0x1
#define IER_ITxE 0x2
#define IER_ILE 0x4
#define IER_IME 0x8
#define IER_IRxE 0x1
#define IER_ITxE 0x2
#define IER_ILE 0x4
#define IER_IME 0x8
/* interrupt identification register */
#define IIR_IMASK 0xf /* mask */
#define IIR_RXTOUT 0xc /* receive timeout */
#define IIR_RLS 0x6 /* receive line status */
#define IIR_RXRDY 0x4 /* receive ready */
#define IIR_TXRDY 0x2 /* transmit ready */
#define IIR_NOPEND 0x1 /* nothing */
#define IIR_MLSC 0x0 /* modem status */
#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
#define IIR_IMASK 0xf /* mask */
#define IIR_RXTOUT 0xc /* receive timeout */
#define IIR_RLS 0x6 /* receive line status */
#define IIR_RXRDY 0x4 /* receive ready */
#define IIR_TXRDY 0x2 /* transmit ready */
#define IIR_NOPEND 0x1 /* nothing */
#define IIR_MLSC 0x0 /* modem status */
#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
/* fifo control register */
#define FIFO_ENABLE 0x01 /* enable fifo */
#define FIFO_RCV_RST 0x02 /* reset receive fifo */
#define FIFO_XMT_RST 0x04 /* reset transmit fifo */
#define FIFO_DMA_MODE 0x08 /* enable dma mode */
#define FIFO_TRIGGER_1 0x00 /* trigger at 1 char */
#define FIFO_TRIGGER_4 0x40 /* trigger at 4 chars */
#define FIFO_TRIGGER_8 0x80 /* trigger at 8 chars */
#define FIFO_TRIGGER_14 0xc0 /* trigger at 14 chars */
#define FIFO_ENABLE 0x01 /* enable fifo */
#define FIFO_RCV_RST 0x02 /* reset receive fifo */
#define FIFO_XMT_RST 0x04 /* reset transmit fifo */
#define FIFO_DMA_MODE 0x08 /* enable dma mode */
#define FIFO_TRIGGER_1 0x00 /* trigger at 1 char */
#define FIFO_TRIGGER_4 0x40 /* trigger at 4 chars */
#define FIFO_TRIGGER_8 0x80 /* trigger at 8 chars */
#define FIFO_TRIGGER_14 0xc0 /* trigger at 14 chars */
/* character format control register */
#define CFCR_DLAB 0x80 /* divisor latch */
#define CFCR_SBREAK 0x40 /* send break */
#define CFCR_PZERO 0x30 /* zero parity */
#define CFCR_PONE 0x20 /* one parity */
#define CFCR_PEVEN 0x10 /* even parity */
#define CFCR_PODD 0x00 /* odd parity */
#define CFCR_PENAB 0x08 /* parity enable */
#define CFCR_STOPB 0x04 /* 2 stop bits */
#define CFCR_8BITS 0x03 /* 8 data bits */
#define CFCR_7BITS 0x02 /* 7 data bits */
#define CFCR_6BITS 0x01 /* 6 data bits */
#define CFCR_5BITS 0x00 /* 5 data bits */
#define CFCR_DLAB 0x80 /* divisor latch */
#define CFCR_SBREAK 0x40 /* send break */
#define CFCR_PZERO 0x30 /* zero parity */
#define CFCR_PONE 0x20 /* one parity */
#define CFCR_PEVEN 0x10 /* even parity */
#define CFCR_PODD 0x00 /* odd parity */
#define CFCR_PENAB 0x08 /* parity enable */
#define CFCR_STOPB 0x04 /* 2 stop bits */
#define CFCR_8BITS 0x03 /* 8 data bits */
#define CFCR_7BITS 0x02 /* 7 data bits */
#define CFCR_6BITS 0x01 /* 6 data bits */
#define CFCR_5BITS 0x00 /* 5 data bits */
/* modem control register */
#define MCR_LOOPBACK 0x10 /* loopback */
#define MCR_IENABLE 0x08 /* output 2 = int enable */
#define MCR_DRS 0x04 /* output 1 = xxx */
#define MCR_RTS 0x02 /* enable RTS */
#define MCR_DTR 0x01 /* enable DTR */
#define MCR_LOOPBACK 0x10 /* loopback */
#define MCR_IENABLE 0x08 /* output 2 = int enable */
#define MCR_DRS 0x04 /* output 1 = xxx */
#define MCR_RTS 0x02 /* enable RTS */
#define MCR_DTR 0x01 /* enable DTR */
/* line status register */
#define LSR_RCV_FIFO 0x80 /* error in receive fifo */
#define LSR_TSRE 0x40 /* transmitter empty */
#define LSR_TXRDY 0x20 /* transmitter ready */
#define LSR_BI 0x10 /* break detected */
#define LSR_FE 0x08 /* framing error */
#define LSR_PE 0x04 /* parity error */
#define LSR_OE 0x02 /* overrun error */
#define LSR_RXRDY 0x01 /* receiver ready */
#define LSR_RCV_MASK 0x1f
#define LSR_RCV_FIFO 0x80 /* error in receive fifo */
#define LSR_TSRE 0x40 /* transmitter empty */
#define LSR_TXRDY 0x20 /* transmitter ready */
#define LSR_BI 0x10 /* break detected */
#define LSR_FE 0x08 /* framing error */
#define LSR_PE 0x04 /* parity error */
#define LSR_OE 0x02 /* overrun error */
#define LSR_RXRDY 0x01 /* receiver ready */
#define LSR_RCV_MASK 0x1f
/* External clock frequency */

2
bsp/loongson/ls1cdev/drivers/touch.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

8
bsp/loongson/ls1cdev/drivers/touch.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -10,9 +10,9 @@
#ifndef __TOUCH_H__
#define __TOUCH_H__
#define RT_TOUCH_NORMAL 0
#define RT_TOUCH_CALIBRATION_DATA 1
#define RT_TOUCH_CALIBRATION 2
#define RT_TOUCH_NORMAL 0
#define RT_TOUCH_CALIBRATION_DATA 1
#define RT_TOUCH_CALIBRATION 2
//#define SAVE_CALIBRATION

2
bsp/loongson/ls2kdev/drivers/drv_rtc.c
View File

@ -128,7 +128,6 @@ static rt_err_t rt_rtc_ioctl(rt_device_t dev, int cmd, void *args)
hw_rtc = dev->user_data;
t = (time_t *)args;
time = *gmtime(t);
rtctm.sys_toyread0 = hw_rtc->sys_toyread0;
rtctm.sys_toyread1 = hw_rtc->sys_toyread1;
@ -141,6 +140,7 @@ static rt_err_t rt_rtc_ioctl(rt_device_t dev, int cmd, void *args)
*t = timegm(&tmptime);
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
gmtime_r(t, &time);
tmptime.tm_hour = time.tm_hour;
tmptime.tm_min = time.tm_min;
tmptime.tm_sec = time.tm_sec;

2
bsp/loongson/ls2kdev/drivers/drv_uart.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls2kdev/drivers/net/mii.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls2kdev/drivers/net/synopGMAC_Dev.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls2kdev/drivers/net/synopGMAC_Host.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls2kdev/drivers/net/synopGMAC_debug.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/loongson/ls2kdev/drivers/net/synopGMAC_plat.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

16
bsp/lpc55sxx/Libraries/drivers/drv_rtc.c
View File

@ -43,18 +43,18 @@ static time_t get_timestamp(void)
static int set_timestamp(time_t timestamp)
{
struct tm *p_tm;
struct tm now;
rtc_datetime_t rtcDate;
p_tm = gmtime(&timestamp);
gmtime_r(&timestamp, &now);
rtcDate.second = p_tm->tm_sec ;
rtcDate.minute = p_tm->tm_min ;
rtcDate.hour = p_tm->tm_hour;
rtcDate.second = now.tm_sec ;
rtcDate.minute = now.tm_min ;
rtcDate.hour = now.tm_hour;
rtcDate.day = p_tm->tm_mday;
rtcDate.month = p_tm->tm_mon + 1;
rtcDate.year = p_tm->tm_year + 1900;
rtcDate.day = now.tm_mday;
rtcDate.month = now.tm_mon + 1;
rtcDate.year = now.tm_year + 1900;
/* RTC time counter has to be stopped before setting the date & time in the TSR register */
RTC_StopTimer(RTC);

16
bsp/nuvoton/libraries/m031/rtt_port/drv_rtc.c
View File

@ -200,7 +200,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time;
@ -236,13 +236,13 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32Day = tm_in->tm_mday;
hw_time.u32Hour = tm_in->tm_hour;
hw_time.u32Minute = tm_in->tm_min;
hw_time.u32Second = tm_in->tm_sec;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32Day = tm_in.tm_mday;
hw_time.u32Hour = tm_in.tm_hour;
hw_time.u32Minute = tm_in.tm_min;
hw_time.u32Second = tm_in.tm_sec;
hw_time.u32TimeScale = RTC_CLOCK_24;
hw_time.u32AmPm = 0;

16
bsp/nuvoton/libraries/m2354/rtt_port/drv_rtc.c
View File

@ -203,7 +203,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time;
@ -239,13 +239,13 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32Day = tm_in->tm_mday;
hw_time.u32Hour = tm_in->tm_hour;
hw_time.u32Minute = tm_in->tm_min;
hw_time.u32Second = tm_in->tm_sec;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32Day = tm_in.tm_mday;
hw_time.u32Hour = tm_in.tm_hour;
hw_time.u32Minute = tm_in.tm_min;
hw_time.u32Second = tm_in.tm_sec;
hw_time.u32TimeScale = RTC_CLOCK_24;
hw_time.u32AmPm = 0;

16
bsp/nuvoton/libraries/m480/rtt_port/drv_rtc.c
View File

@ -202,7 +202,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time;
@ -238,13 +238,13 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32Day = tm_in->tm_mday;
hw_time.u32Hour = tm_in->tm_hour;
hw_time.u32Minute = tm_in->tm_min;
hw_time.u32Second = tm_in->tm_sec;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32Day = tm_in.tm_mday;
hw_time.u32Hour = tm_in.tm_hour;
hw_time.u32Minute = tm_in.tm_min;
hw_time.u32Second = tm_in.tm_sec;
hw_time.u32TimeScale = RTC_CLOCK_24;
hw_time.u32AmPm = 0;

18
bsp/nuvoton/libraries/n9h30/rtt_port/drv_rtc.c
View File

@ -221,7 +221,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time = {0};
@ -261,14 +261,14 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32cMonth = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32cDay = tm_in->tm_mday;
hw_time.u32cHour = tm_in->tm_hour;
hw_time.u32cMinute = tm_in->tm_min;
hw_time.u32cSecond = tm_in->tm_sec;
hw_time.u32cDayOfWeek = tm_in->tm_wday;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32cMonth = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32cDay = tm_in.tm_mday;
hw_time.u32cHour = tm_in.tm_hour;
hw_time.u32cMinute = tm_in.tm_min;
hw_time.u32cSecond = tm_in.tm_sec;
hw_time.u32cDayOfWeek = tm_in.tm_wday;
hw_time.u8cClockDisplay = RTC_CLOCK_24;
hw_time.u8cAmPm = 0;

16
bsp/nuvoton/libraries/nuc980/rtt_port/drv_rtc.c
View File

@ -203,7 +203,7 @@ static rt_err_t nu_rtc_is_date_valid(const time_t t)
/* Register rt-thread device.control() entry. */
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm_out, *tm_in;
struct tm tm_out, tm_in;
time_t *time;
S_RTC_TIME_DATA_T hw_time;
@ -239,13 +239,13 @@ static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args)
if (nu_rtc_is_date_valid(*time) != RT_EOK)
return -(RT_ERROR);
tm_in = gmtime(time);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in->tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in->tm_mon);
hw_time.u32Day = tm_in->tm_mday;
hw_time.u32Hour = tm_in->tm_hour;
hw_time.u32Minute = tm_in->tm_min;
hw_time.u32Second = tm_in->tm_sec;
gmtime_r(time, &tm_in);
hw_time.u32Year = CONV_FROM_TM_YEAR(tm_in.tm_year);
hw_time.u32Month = CONV_FROM_TM_MON(tm_in.tm_mon);
hw_time.u32Day = tm_in.tm_mday;
hw_time.u32Hour = tm_in.tm_hour;
hw_time.u32Minute = tm_in.tm_min;
hw_time.u32Second = tm_in.tm_sec;
hw_time.u32TimeScale = RTC_CLOCK_24;
hw_time.u32AmPm = 0;

18
bsp/raspberry-pi/raspi3-32/driver/drv_rtc.c
View File

@ -193,16 +193,16 @@ static time_t raspi_get_timestamp(void)
static int raspi_set_timestamp(time_t timestamp)
{
struct tm *tblock;
tblock = gmtime(&timestamp);
struct tm tblock;
gmtime_r(&timestamp, &tblock);
buf[0] = 0;
buf[1] = tblock->tm_sec;
buf[2] = tblock->tm_min;
buf[3] = tblock->tm_hour;
buf[4] = tblock->tm_wday;
buf[5] = tblock->tm_mday;
buf[6] = tblock->tm_mon;
buf[7] = tblock->tm_year;
buf[1] = tblock.tm_sec;
buf[2] = tblock.tm_min;
buf[3] = tblock.tm_hour;
buf[4] = tblock.tm_wday;
buf[5] = tblock.tm_mday;
buf[6] = tblock.tm_mon;
buf[7] = tblock.tm_year;
i2c_write(buf, 8);

18
bsp/raspberry-pi/raspi3-64/driver/drv_rtc.c
View File

@ -40,16 +40,16 @@ static time_t raspi_get_timestamp(void)
static int raspi_set_timestamp(time_t timestamp)
{
struct tm *tblock;
tblock = gmtime(&timestamp);
struct tm tblock;
gmtime_r(&timestamp, &tblock);
buf[0] = 0;
buf[1] = tblock->tm_sec;
buf[2] = tblock->tm_min;
buf[3] = tblock->tm_hour;
buf[4] = tblock->tm_wday;
buf[5] = tblock->tm_mday;
buf[6] = tblock->tm_mon;
buf[7] = tblock->tm_year;
buf[1] = tblock.tm_sec;
buf[2] = tblock.tm_min;
buf[3] = tblock.tm_hour;
buf[4] = tblock.tm_wday;
buf[5] = tblock.tm_mday;
buf[6] = tblock.tm_mon;
buf[7] = tblock.tm_year;
bcm283x_i2c_write((PER_BASE + BCM283X_BSC0_BASE) ,buf, 8);
return RT_EOK;
}

24
bsp/renesas/libraries/HAL_Drivers/drv_rtc.c
View File

@ -69,24 +69,22 @@ static rt_err_t ra_get_secs(void *args)
static rt_err_t set_rtc_time_stamp(time_t time_stamp)
{
struct tm *p_tm;
struct tm now;
rtc_time_t g_current_time = {0};
p_tm = gmtime(&time_stamp);
if (p_tm->tm_year < 100)
gmtime_r(&time_stamp, &now);
if (now.tm_year < 100)
{
return -RT_ERROR;
}
g_current_time.tm_sec = p_tm->tm_sec ;
g_current_time.tm_min = p_tm->tm_min ;
g_current_time.tm_hour = p_tm->tm_hour;
g_current_time.tm_mday = p_tm->tm_mday;
g_current_time.tm_mon = p_tm->tm_mon;
g_current_time.tm_year = p_tm->tm_year;
g_current_time.tm_wday = p_tm->tm_wday;
g_current_time.tm_yday = p_tm->tm_yday;
g_current_time.tm_sec = now.tm_sec ;
g_current_time.tm_min = now.tm_min ;
g_current_time.tm_hour = now.tm_hour;
g_current_time.tm_mday = now.tm_mday;
g_current_time.tm_mon = now.tm_mon;
g_current_time.tm_year = now.tm_year;
g_current_time.tm_wday = now.tm_wday;
g_current_time.tm_yday = now.tm_yday;
if (R_RTC_CalendarTimeSet(&g_rtc_ctrl, &g_current_time) != FSP_SUCCESS)
{

19
bsp/swm320/drivers/drv_rtc.c
View File

@ -63,17 +63,16 @@ static time_t swm_get_rtc_time_stamp(void)
static rt_err_t swm_set_rtc_time_stamp(time_t time_stamp)
{
RTC_DateTime set_datetime = {0};
struct tm *p_tm;
struct tm now;
p_tm = gmtime(&time_stamp);
set_datetime.Second = p_tm->tm_sec;
set_datetime.Minute = p_tm->tm_min;
set_datetime.Hour = p_tm->tm_hour;
set_datetime.Date = p_tm->tm_mday;
set_datetime.Month = p_tm->tm_mon;
set_datetime.Year = p_tm->tm_year;
// set_datetime.Day = p_tm->tm_wday;
gmtime_r(&time_stamp, &now);
set_datetime.Second = now.tm_sec;
set_datetime.Minute = now.tm_min;
set_datetime.Hour = now.tm_hour;
set_datetime.Date = now.tm_mday;
set_datetime.Month = now.tm_mon;
set_datetime.Year = now.tm_year;
// set_datetime.Day = now.tm_wday;
RTC_Stop(RTC);
while (RTC->CFGABLE == 0)

26
bsp/w60x/drivers/drv_rtc.c
View File

@ -50,23 +50,23 @@ static int wm_set_timestamp(time_t timestamp)
int ctrl1 = 0;
int ctrl2 = 0;
struct tm *tblock;
struct tm tblock;
tblock = gmtime(&timestamp);
gmtime_r(&timestamp, &tblock);
ctrl2 = tls_reg_read32(HR_PMU_RTC_CTRL2); /* disable */
ctrl2 &= ~(1 << 16);
tls_reg_write32(HR_PMU_RTC_CTRL2, ctrl2);
ctrl1 |= tblock->tm_sec;
ctrl1 |= tblock->tm_min << 8;
ctrl1 |= tblock->tm_hour << 16;
ctrl1 |= tblock->tm_mday << 24;
ctrl1 |= tblock.tm_sec;
ctrl1 |= tblock.tm_min << 8;
ctrl1 |= tblock.tm_hour << 16;
ctrl1 |= tblock.tm_mday << 24;
tls_reg_write32(HR_PMU_RTC_CTRL1, ctrl1);
ctrl2 = 0;
ctrl2 |= tblock->tm_mon;
ctrl2 |= tblock->tm_year << 8;
ctrl2 |= tblock.tm_mon;
ctrl2 |= tblock.tm_year << 8;
tls_reg_write32(HR_PMU_RTC_CTRL2, ctrl2);
ctrl2 = tls_reg_read32(HR_PMU_RTC_CTRL2);/* enable */
@ -80,21 +80,21 @@ static int wm_alarm_set_timestamp(struct rt_rtc_wkalarm *wkalarm)
{
int ctrl1 = 0;
int ctrl2 = 0;
struct tm *tblock;
struct tm tblock;
time_t timestamp = 0;
timestamp = wm_get_timestamp();
tblock = gmtime(&timestamp);
gmtime_r(&timestamp, &tblock);
tls_irq_enable(PMU_RTC_INT);
ctrl1 |= wkalarm->tm_sec;
ctrl1 |= wkalarm->tm_min << 8;
ctrl1 |= wkalarm->tm_hour << 16;
ctrl1 |= tblock->tm_mday << 24;
ctrl1 |= tblock.tm_mday << 24;
ctrl2 |= tblock->tm_mon;
ctrl2 |= tblock->tm_year << 8;
ctrl2 |= tblock.tm_mon;
ctrl2 |= tblock.tm_year << 8;
tls_reg_write32(HR_PMU_RTC_CTRL2, ctrl2 | BIT(16));

13
components/dfs/filesystems/elmfat/dfs_elm.c
View File

@ -944,22 +944,11 @@ DRESULT disk_ioctl(BYTE drv, BYTE ctrl, void *buff)
DWORD get_fattime(void)
{
DWORD fat_time = 0;
time_t now;
struct tm *p_tm;
struct tm tm_now;
/* get current time */
now = time(RT_NULL);
/* lock scheduler. */
rt_enter_critical();
/* converts calendar time time into local time. */
p_tm = gmtime(&now);
/* copy the statically located variable */
rt_memcpy(&tm_now, p_tm, sizeof(struct tm));
/* unlock scheduler. */
rt_exit_critical();
gmtime_r(&now, &tm_now);
fat_time = (DWORD)(tm_now.tm_year - 80) << 25 |
(DWORD)(tm_now.tm_mon + 1) << 21 |

10
libcpu/arm/s3c24x0/rtc.c
View File

@ -126,7 +126,7 @@ static rt_size_t rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t
static rt_err_t rtc_control(rt_device_t dev, int cmd, void *args)
{
struct tm tm, *tm_ptr;
struct tm tmp;
time_t *time;
RT_ASSERT(dev != RT_NULL);
@ -135,14 +135,14 @@ static rt_err_t rtc_control(rt_device_t dev, int cmd, void *args)
{
case RT_DEVICE_CTRL_RTC_GET_TIME:
/* read device */
rt_hw_rtc_get(&tm);
*((rt_time_t *)args) = timegm(&tm);
rt_hw_rtc_get(&tmp);
*((rt_time_t *)args) = timegm(&tmp);
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
/* write device */
tm_ptr = gmtime(time);
rt_hw_rtc_set(tm_ptr);
gmtime_r(time, &tmp);
rt_hw_rtc_set(&tmp);
break;
}