[BSP] cleanup for hifive1 bsp.
This commit is contained in:
Bernard Xiong
parent
5b1aa2a75f
commit
2ac493698b
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@ -10,14 +10,7 @@ if os.getenv('RTT_CC'):
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if CROSS_TOOL == 'gcc':
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PLATFORM = 'gcc'
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# EXEC_PATH = 'D:/ArdaArmTools/Sourcery_Lite/bin'
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EXEC_PATH = '/home/zj/risc-v/riscv64-unknown-elf-gcc-20170612-x86_64-linux-centos6/bin'
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elif CROSS_TOOL == 'keil':
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PLATFORM = 'armcc'
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EXEC_PATH = 'C:/Keil_v5'
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elif CROSS_TOOL == 'iar':
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PLATFORM = 'iar'
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IAR_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.0'
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if os.getenv('RTT_EXEC_PATH'):
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EXEC_PATH = os.getenv('RTT_EXEC_PATH')
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@ -33,8 +26,7 @@ TARGET_NAME = 'rtthread.bin'
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#------- GCC settings ----------------------------------------------------------
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if PLATFORM == 'gcc':
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# toolchains
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PREFIX = '/home/zj/risc-v/riscv64-unknown-elf-gcc-20170612-x86_64-linux-centos6/bin/riscv64-unknown-elf-'
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#PREFIX = 'arm-none-linux-gnueabi-'
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PREFIX = 'riscv64-unknown-elf-'
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CC = PREFIX + 'gcc'
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AS = PREFIX + 'gcc'
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AR = PREFIX + 'ar'
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@ -45,9 +37,7 @@ if PLATFORM == 'gcc':
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OBJCPY = PREFIX + 'objcopy'
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DEVICE = ' -march=rv32imac -mabi=ilp32 -DUSE_PLIC -DUSE_M_TIME -mcmodel=medany -msmall-data-limit=8 -g -L. -nostartfiles -lc '
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# DEVICE += '-Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=open -Wl,--wrap=lseek -Wl,--wrap=read -Wl,--wrap=write -Wl,--wrap=fstat -Wl,--wrap=stat -Wl,--wrap=close -Wl,--wrap=link -Wl,--wrap=unlink -Wl,--wrap=execve -Wl,--wrap=fork -Wl,--wrap=getpid -Wl,--wrap=kill -Wl,--wrap=wait -Wl,--wrap=isatty -Wl,--wrap=times -Wl,--wrap=sbrk -Wl,--wrap=_exit'
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CFLAGS = DEVICE
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# CFLAGS += ' -I ./mx28_registers/'
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CFLAGS += ''
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AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp'
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AFLAGS += ' -Iplatform'
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@ -66,77 +56,3 @@ if PLATFORM == 'gcc':
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POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n'
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POST_ACTION += SIZE + ' $TARGET\n'
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#------- Keil settings ---------------------------------------------------------
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elif PLATFORM == 'armcc':
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# toolchains
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CC = 'armcc'
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AS = 'armasm'
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AR = 'armar'
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LINK = 'armlink'
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TARGET_EXT = 'axf'
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EXEC_PATH += '/arm/armcc/bin/'
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DEVICE = ' --cpu=' + CORE
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CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
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AFLAGS = DEVICE + ' -Iplatform'
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LFLAGS = DEVICE + ' --strict'
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LFLAGS += ' --info sizes --info totals --info unused --info veneers'
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LFLAGS += ' --list ' + MAP_FILE
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LFLAGS += ' --scatter ' + LINK_FILE + '.scat'
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if BUILD == 'debug':
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CFLAGS += ' -g -O0'
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AFLAGS += ' -g'
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else:
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CFLAGS += ' -O2'
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POST_ACTION = 'fromelf --bin $TARGET --output ' + TARGET_NAME + ' \n'
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POST_ACTION += 'fromelf -z $TARGET\n'
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#------- IAR settings ----------------------------------------------------------
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elif PLATFORM == 'iar':
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# toolchains
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CC = 'iccarm'
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AS = 'iasmarm'
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AR = 'iarchive'
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LINK = 'ilinkarm'
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TARGET_EXT = 'axf'
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DEVICE = CORE
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CFLAGS = '--cpu=' + DEVICE
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CFLAGS += ' --diag_suppress Pa050'
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CFLAGS += ' --no_cse'
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CFLAGS += ' --no_unroll'
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CFLAGS += ' --no_inline'
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CFLAGS += ' --no_code_motion'
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CFLAGS += ' --no_tbaa'
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CFLAGS += ' --no_clustering'
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CFLAGS += ' --no_scheduling'
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CFLAGS += ' --endian=little'
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CFLAGS += ' -e'
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CFLAGS += ' --fpu=none'
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CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
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CFLAGS += ' --silent'
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AFLAGS = '--cpu '+ DEVICE
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AFLAGS += ' -s+'
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AFLAGS += ' -w+'
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AFLAGS += ' -r'
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AFLAGS += ' --fpu none'
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AFLAGS += ' -S'
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AFLAGS += ' -Iplatform'
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if BUILD == 'debug':
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CFLAGS += ' --debug'
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CFLAGS += ' -On'
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else:
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CFLAGS += ' -Oh'
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LFLAGS = '--config ' + LINK_FILE +'.icf'
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LFLAGS += ' --entry __iar_program_start'
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LFLAGS += ' --map ' + MAP_FILE
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LFLAGS += ' --silent'
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EXEC_PATH = IAR_PATH + '/arm/bin/'
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POST_ACTION = 'ielftool --silent --bin $TARGET ' + TARGET_NAME
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@ -21,7 +21,7 @@
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; * Date Author Notes
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; * 2017-07-16 zhangjun for hifive1
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; */
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#include <sifive/smp.h>
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#include "sifive/smp.h"
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#define CLINT_CTRL_ADDR 0x02000000
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.section .init
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@ -29,116 +29,116 @@
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.type _start,@function
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_start:
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.cfi_startproc
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.cfi_undefined ra
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.cfi_startproc
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.cfi_undefined ra
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.option push
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.option norelax
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la gp, __global_pointer$
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la gp, __global_pointer$
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.option pop
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la sp, _sp
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la sp, _sp
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/*
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*disable all interrupt at startup
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*/
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csrrc a5, mstatus, 0xb
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csrrc a5, mstatus, 0xb
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#if defined(ENABLE_SMP)
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smp_pause(t0, t1)
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smp_pause(t0, t1)
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#endif
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/* Load data section */
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la a0, _data_lma
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la a1, _data
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la a2, _edata
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bgeu a1, a2, 2f
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/* Load data section */
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la a0, _data_lma
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la a1, _data
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la a2, _edata
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bgeu a1, a2, 2f
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1:
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lw t0, (a0)
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sw t0, (a1)
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addi a0, a0, 4
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addi a1, a1, 4
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bltu a1, a2, 1b
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lw t0, (a0)
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sw t0, (a1)
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addi a0, a0, 4
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addi a1, a1, 4
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bltu a1, a2, 1b
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2:
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/* Clear bss section */
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la a0, __bss_start
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la a1, _end
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bgeu a0, a1, 2f
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/* Clear bss section */
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la a0, __bss_start
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la a1, _end
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bgeu a0, a1, 2f
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1:
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sw zero, (a0)
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addi a0, a0, 4
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bltu a0, a1, 1b
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sw zero, (a0)
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addi a0, a0, 4
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bltu a0, a1, 1b
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2:
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/* Call global constructors */
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la a0, __libc_fini_array
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call atexit
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call __libc_init_array
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/*call _init directly in rt-thread*/
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/* Call global constructors */
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la a0, __libc_fini_array
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call atexit
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call __libc_init_array
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/*call _init directly in rt-thread*/
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call _init
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#ifndef __riscv_float_abi_soft
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/* Enable FPU */
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li t0, MSTATUS_FS
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csrs mstatus, t0
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csrr t1, mstatus
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and t1, t1, t0
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beqz t1, 1f
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fssr x0
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/* Enable FPU */
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li t0, MSTATUS_FS
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csrs mstatus, t0
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csrr t1, mstatus
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and t1, t1, t0
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beqz t1, 1f
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fssr x0
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1:
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#endif
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#if defined(ENABLE_SMP)
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smp_resume(t0, t1)
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smp_resume(t0, t1)
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csrr a0, mhartid
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bnez a0, 2f
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csrr a0, mhartid
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bnez a0, 2f
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#endif
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auipc ra, 0
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addi sp, sp, -16
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auipc ra, 0
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addi sp, sp, -16
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#if __riscv_xlen == 32
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sw ra, 8(sp)
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sw ra, 8(sp)
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#else
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sd ra, 8(sp)
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sd ra, 8(sp)
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#endif
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/* argc = argv = 0 */
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li a0, 0
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li a1, 0
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call main
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tail exit
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/* argc = argv = 0 */
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li a0, 0
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li a1, 0
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call main
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tail exit
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1:
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j 1b
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j 1b
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#if defined(ENABLE_SMP)
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2:
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la t0, trap_entry
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csrw mtvec, t0
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la t0, trap_entry
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csrw mtvec, t0
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csrr a0, mhartid
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la t1, _sp
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slli t0, a0, 10
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sub sp, t1, t0
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csrr a0, mhartid
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la t1, _sp
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slli t0, a0, 10
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sub sp, t1, t0
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auipc ra, 0
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addi sp, sp, -16
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auipc ra, 0
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addi sp, sp, -16
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#if __riscv_xlen == 32
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sw ra, 8(sp)
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sw ra, 8(sp)
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#else
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sd ra, 8(sp)
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sd ra, 8(sp)
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#endif
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call secondary_main
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tail exit
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call secondary_main
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tail exit
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1:
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j 1b
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j 1b
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#endif
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.cfi_endproc
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.cfi_endproc
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#include "encoding.h"
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#include "sifive/bits.h"
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.section .text.entry
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.section .text.entry
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.align 2
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.global trap_entry
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trap_entry:
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