diff --git a/bsp/tm4c123bsp/board/board.c b/bsp/tm4c123bsp/board/board.c index 7fddc43c3f..5e4b8baa58 100644 --- a/bsp/tm4c123bsp/board/board.c +++ b/bsp/tm4c123bsp/board/board.c @@ -7,51 +7,37 @@ * Date Author Notes * 2017-07-24 Tanek the first version * 2018-11-12 Ernest Chen modify copyright + * 2020-06-27 AHTYDHD modify to adapt in TM4C123 */ - + #include #include -#include "hw_ints.h" -#include "hw_sysctl.h" -#include "hw_memmap.h" -#include "hw_types.h" -#include "fpu.h" -#include "debug.h" -#include "pin_map.h" -#include "rom.h" -#include "sysctl.h" -#include "systick.h" -#include "hw_ints.h" +#include "inc/hw_sysctl.h" +#include "inc/hw_memmap.h" +#include "driverlib/fpu.h" +#include "driverlib/sysctl.h" +#include "driverlib/systick.h" #include "board.h" -// Holds the system core clock, which is the system clock -// frequency supplied to the SysTick timer and the processor -// core clock. uint32_t SystemCoreClock; - - +/* this function set the system clock */ void SystemCoreClockUpdate(void) { - - FPULazyStackingEnable(); - - // - // Set the clocking to run directly from the crystal. - // + FPULazyStackingEnable(); + /* Set the clocking to run directly from the crystal. 50MHz*/ SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ | - SYSCTL_OSC_MAIN); - - SystemCoreClock = SysCtlClockGet(); - + SYSCTL_OSC_MAIN); + SystemCoreClock = SysCtlClockGet(); } +/* this funtion set the Systick and enable systick int */ void SysTickConfig() { - SysTickDisable(); - SysTickPeriodSet(SystemCoreClock/RT_TICK_PER_SECOND); + SysTickDisable(); + SysTickPeriodSet(SystemCoreClock / RT_TICK_PER_SECOND); SysTickIntEnable(); - SysTickEnable(); + SysTickEnable(); } /** @@ -65,44 +51,32 @@ void rt_hw_board_init() SysTickConfig(); #ifdef RT_USING_SERIAL - rt_hw_usart_init(); + rt_hw_usart_init(); #endif #ifdef RT_USING_PIN - rt_hw_pin_init(); + rt_hw_pin_init(); #endif - #ifdef RT_USING_PWM - rt_hw_pwm_init(); + rt_hw_pwm_init(); #endif /* Call components board initial (use INIT_BOARD_EXPORT()) */ #ifdef RT_USING_COMPONENTS_INIT rt_components_board_init(); #endif - - rt_console_set_device(RT_CONSOLE_DEVICE_NAME); + /* set the console device */ + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); #if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP) rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); - #endif - } - void SysTick_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - rt_tick_increase(); - /* leave interrupt */ rt_interrupt_leave(); } - - - - - - diff --git a/bsp/tm4c123bsp/board/board.h b/bsp/tm4c123bsp/board/board.h index a294b98381..e702eb65ee 100644 --- a/bsp/tm4c123bsp/board/board.h +++ b/bsp/tm4c123bsp/board/board.h @@ -1,32 +1,40 @@ -#ifndef _BOARD_H_ -#define _BOARD_H_ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ #include #include - #if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP) - -#define TM4C123_SRAM1_START (0x20000000) +#define TM4C123_SRAM1_START (0x20000000) #define TM4C123_SRAM1_END (TM4C123_SRAM1_START + 32 * 1024) // end address = 0x20000000(base adddress) + 32K(RAM size) #if defined(__CC_ARM) || defined(__CLANG_ARM) extern int Image$$RW_IRAM$$ZI$$Limit; // RW_IRAM #define HEAP_BEGIN ((void *)&Image$$RW_IRAM$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="HEAP" +#define HEAP_BEGIN (__segment_end("HEAP")) +#else +extern int _ebss; +#define HEAP_BEGIN ((void *)&_ebss) #endif - #define HEAP_END TM4C123_SRAM1_END - #endif - - - #ifdef RT_USING_PIN #include "drv_gpio.h" #endif /* RT_USING_PIN */ - #ifdef RT_USING_SERIAL #include "drv_uart.h" #endif /* RT_USING_SERIAL */ @@ -39,9 +47,6 @@ extern int Image$$RW_IRAM$$ZI$$Limit; // RW_IRAM #include "drv_spi.h" #endif /* RT_USING_SPI*/ +#endif /*__BOARD_H__*/ - - - -#endif /*_BOARD_H_*/ - +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/board/tm4c123_config.c b/bsp/tm4c123bsp/board/tm4c123_config.c index a79b9801fe..f0be78a6fd 100644 --- a/bsp/tm4c123bsp/board/tm4c123_config.c +++ b/bsp/tm4c123bsp/board/tm4c123_config.c @@ -1,77 +1,88 @@ -#include "stdbool.h" -#include "stdint.h" -#include "hw_memmap.h" -#include "pin_map.h" -#include "sysctl.h" -#include "pwm.h" -#include "gpio.h" -#include "uart.h" -#include "adc.h" -#include "ssi.h" +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ +#include +#include +#include +#include "inc/hw_memmap.h" +#include "driverlib/pin_map.h" +#include "driverlib/sysctl.h" +#include "driverlib/gpio.h" #include "tm4c123_config.h" +#ifdef RT_USING_SERIAL +#include "driverlib/uart.h" +#endif /* RT_USING_SERIAL */ +#ifdef RT_USING_ADC +#include "driverlib/adc.h" +#endif /* RT_USING_ADC */ +#ifdef RT_USING_PWM +#include "driverlib/pwm.h" +#endif /* RT_USING_PWM */ +#ifdef RT_USING_SPI +#include "driverlib/ssi.h" +#endif /* RT_USING_SPI */ - +#ifdef RT_USING_SERIAL void uart_hw_config(void) { - SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); + /* UART0 */ + SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); - GPIOPinConfigure(GPIO_PA0_U0RX); + GPIOPinConfigure(GPIO_PA0_U0RX); GPIOPinConfigure(GPIO_PA1_U0TX); GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); - - SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); + /* UART1 */ + SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC); - GPIOPinConfigure(GPIO_PC4_U1RX); + GPIOPinConfigure(GPIO_PC4_U1RX); GPIOPinConfigure(GPIO_PC5_U1TX); GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_4 | GPIO_PIN_5); - } +#endif /* RT_USING_SERIAL */ - - -void pwm_hw_config(void) -{ - SysCtlPWMClockSet(SYSCTL_PWMDIV_2); - //GPIO port D needs to be enabled so these pins can be used. - SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM1); - SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); - - // Configure the GPIO pin muxing to select PWM functions for these pins. - GPIOPinConfigure(GPIO_PF2_M1PWM6); - GPIOPinConfigure(GPIO_PF3_M1PWM7); - - // Configure the GPIO pad for PWM function on pins PF2 and PF3 - GPIOPinTypePWM(GPIO_PORTF_BASE, GPIO_PIN_2|GPIO_PIN_3); - -} - - +#ifdef RT_USING_ADC void adc_hw_config(void) { - // The ADC0 peripheral must be enabled for use. - // + /* ADC0 */ SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0); - - // GPIO port D needs to be enabled SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); - - // Select the analog ADC function for these pins. - GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3); + GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3); } +#endif /* RT_USING_ADC */ +#ifdef RT_USING_PWM +void pwm_hw_config(void) +{ + /* PWM7 (PWM1 module,M1PWM6 and M1PWM7) */ + SysCtlPWMClockSet(SYSCTL_PWMDIV_2); + SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM1); + SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); + GPIOPinConfigure(GPIO_PF2_M1PWM6); + GPIOPinConfigure(GPIO_PF3_M1PWM7); + GPIOPinTypePWM(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3); +} +#endif /* RT_USING_PWM */ +#ifdef RT_USING_SPI void spi_hw_config(void) { + /* SPI0 */ SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); GPIOPinConfigure(GPIO_PA2_SSI0CLK); - //GPIOPinConfigure(GPIO_PA3_SSI0FSS); GPIOPinConfigure(GPIO_PA4_SSI0RX); GPIOPinConfigure(GPIO_PA5_SSI0TX); GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_2); - } +#endif /* RT_USING_SPI */ +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/board/tm4c123_config.h b/bsp/tm4c123bsp/board/tm4c123_config.h index 8fe0b9a8b7..38128bc60f 100644 --- a/bsp/tm4c123bsp/board/tm4c123_config.h +++ b/bsp/tm4c123bsp/board/tm4c123_config.h @@ -1,23 +1,38 @@ -#ifndef _TM4C123GH6PZ_CONFIG_H_ -#define _TM4C123GH6PZ_CONFIG_H_ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ +#ifndef __TM4C123GH6PZ_CONFIG_H__ +#define __TM4C123GH6PZ_CONFIG_H__ #ifdef __cplusplus extern "C" { #endif - - - -void uart_hw_config(void); -void pwm_hw_config(void); +#ifdef RT_USING_SERIAL +void uart_hw_config(void); +#endif /* RT_USING_SERIAL */ +#ifdef RT_USING_ADC void adc_hw_config(void); -void spi_hw_config(void); - +#endif /* RT_USING_ADC */ +#ifdef RT_USING_PWM +void pwm_hw_config(void); +#endif /* RT_USING_PWM */ +#ifdef RT_USING_SPI +void spi_hw_config(void); +#endif /* RT_USING_SPI */ + #ifdef __cplusplus } #endif +#endif /*__TM4C123GH6PZ_CONFIG_H__*/ -#endif /*_TM4C123GH6PZ_CONFIG_H_*/ +/************************** end of file ******************/ diff --git a/bsp/tm4c123bsp/libraries/Drivers/config/adc_config.h b/bsp/tm4c123bsp/libraries/Drivers/config/adc_config.h index 11d07dd410..c0f2d12ca1 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/config/adc_config.h +++ b/bsp/tm4c123bsp/libraries/Drivers/config/adc_config.h @@ -1,13 +1,20 @@ -#ifndef _ADC_CONFIG_H_ -#define _ADC_CONFIG_H_ - +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ +#ifndef __ADC_CONFIG_H__ +#define __ADC_CONFIG_H__ #ifdef __cplusplus extern "C" { #endif - #ifdef BSP_USING_ADC0 #ifndef ADC0_CONFIG #define ADC0_CONFIG \ @@ -36,10 +43,10 @@ extern "C" { #endif /* ADC1_CONFIG */ #endif /* BSP_USING_ADC1 */ - #ifdef __cplusplus } #endif +#endif /*__ADC_CONFIG_H__*/ -#endif /*_ADC_CONFIG_H_*/ +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/config/pwm_config.h b/bsp/tm4c123bsp/libraries/Drivers/config/pwm_config.h index 2d4db93112..92dcdeabc6 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/config/pwm_config.h +++ b/bsp/tm4c123bsp/libraries/Drivers/config/pwm_config.h @@ -1,7 +1,15 @@ -#ifndef _PWM_CONFIG_H_ -#define _PWM_CONFIG_H_ - +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ +#ifndef __PWM_CONFIG_H__ +#define __PWM_CONFIG_H__ #ifdef __cplusplus extern "C" { @@ -102,13 +110,11 @@ extern "C" { } #endif /* PWM7_CONFIG */ #endif /* BSP_USING_PWM7 */ - - - + #ifdef __cplusplus } #endif +#endif /*__PWM_CONFIG_H__*/ -#endif /*_PWM_CONFIG_H_*/ - +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/config/spi_config.h b/bsp/tm4c123bsp/libraries/Drivers/config/spi_config.h index 0142f9c69b..8a4cfcbc4e 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/config/spi_config.h +++ b/bsp/tm4c123bsp/libraries/Drivers/config/spi_config.h @@ -1,3 +1,13 @@ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ + #ifndef __SPI_CONFIG_H__ #define __SPI_CONFIG_H__ @@ -17,7 +27,6 @@ extern "C" { #endif /* SPI0_BUS_CONFIG */ #endif /* BSP_USING_SPI0 */ - #ifdef BSP_USING_SPI1 #ifndef SPI1_BUS_CONFIG #define SPI1_BUS_CONFIG \ @@ -38,7 +47,6 @@ extern "C" { #endif /* SPI2_BUS_CONFIG */ #endif /* BSP_USING_SPI2 */ - #ifdef BSP_USING_SPI3 #ifndef SPI3_BUS_CONFIG #define SPI3_BUS_CONFIG \ @@ -54,3 +62,5 @@ extern "C" { #endif #endif /*__SPI_CONFIG_H__ */ + +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/config/uart_config.h b/bsp/tm4c123bsp/libraries/Drivers/config/uart_config.h index 6588101df4..f583569f72 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/config/uart_config.h +++ b/bsp/tm4c123bsp/libraries/Drivers/config/uart_config.h @@ -1,3 +1,12 @@ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ #ifndef __UART_CONFIG_H__ #define __UART_CONFIG_H__ @@ -6,7 +15,6 @@ extern "C" { #endif - #if defined(BSP_USING_UART0) #ifndef UART0_CONFIG #define UART0_CONFIG \ @@ -63,5 +71,6 @@ extern "C" { } #endif -#endif +#endif /* __UART_CONFIG_H__ */ +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_adc.c b/bsp/tm4c123bsp/libraries/Drivers/drv_adc.c index 6409cf9fe4..daf8e7b8ca 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_adc.c +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_adc.c @@ -1,19 +1,24 @@ -#include "drv_adc.h" +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ +#include "drv_adc.h" #include #include -#include -#include "hw_memmap.h" -#include "adc.h" -#include "sysctl.h" - - +#include "inc/hw_memmap.h" +#include "driverlib/adc.h" +#include "driverlib/sysctl.h" #ifdef RT_USING_ADC - #include "adc_config.h" #include "tm4c123_config.h" - +#include #define LOG_TAG "drv.adc" #include @@ -23,11 +28,9 @@ static struct tm4c123_adc_config adc_config[] = #ifdef BSP_USING_ADC0 ADC0_CONFIG, #endif - #ifdef BSP_USING_ADC1 ADC1_CONFIG, #endif - }; struct tm4c123_adc @@ -36,56 +39,46 @@ struct tm4c123_adc struct rt_adc_device adc_device; }; -static struct tm4c123_adc adc_obj[sizeof(adc_config) / sizeof(adc_config[0])]={0}; +static struct tm4c123_adc adc_obj[sizeof(adc_config) / sizeof(adc_config[0])] = {0}; static rt_err_t tm4c123_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled) { RT_ASSERT(device != RT_NULL); - //stm32_adc_handler = device->parent.user_data; + struct tm4c123_adc_config *config = (struct tm4c123_adc_config *)device->parent.user_data; if (enabled) { - ADCSequenceEnable(ADC0_BASE, 2); - ADCIntClear(ADC0_BASE, 2); + ADCSequenceEnable(config->adcbase, config->sequence); + ADCIntClear(config->adcbase, config->sequence); } else { - ADCSequenceDisable(ADC0_BASE, 2); + ADCSequenceDisable(config->adcbase, config->sequence); } - return RT_EOK; } - static rt_err_t tm4c123_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value) { - + RT_ASSERT(device != RT_NULL); RT_ASSERT(value != RT_NULL); - - uint32_t pui32ADC0Value[4]={0}; - // Trigger the ADC conversion. - // - ADCProcessorTrigger(ADC0_BASE, 2); + uint32_t pui32ADC0Value[4] = {0}; + struct tm4c123_adc_config *config = (struct tm4c123_adc_config *)device->parent.user_data; - // - // Wait for conversion to be completed. - // - while(!ADCIntStatus(ADC0_BASE, 2, false)) + /* Trigger the ADC conversion. */ + ADCProcessorTrigger(config->adcbase, config->sequence); + + while (!ADCIntStatus(config->adcbase, config->sequence, false)) { } - // - // Clear the ADC interrupt flag. - // - ADCIntClear(ADC0_BASE, 2); - - // - // Read ADC Value. - // - ADCSequenceDataGet(ADC0_BASE, 2, pui32ADC0Value); + /* Clear the ADC interrupt flag. */ + ADCIntClear(config->adcbase, config->sequence); + /* Read ADC Value. */ + ADCSequenceDataGet(config->adcbase, config->sequence, pui32ADC0Value); /* get ADC value */ *value = (rt_uint32_t)pui32ADC0Value[channel]; @@ -102,39 +95,39 @@ static const struct rt_adc_ops tm4c123_adc_ops = static rt_err_t tm4c123_hw_adc_init(struct tm4c123_adc *device) { - + uint32_t adcbase = device->config->adcbase; uint32_t sequencenum = device->config->sequence; - ADCSequenceConfigure(adcbase, sequencenum, - device->config->trigermode, 0); + ADCSequenceConfigure(adcbase, sequencenum, + device->config->trigermode, 0); - ADCSequenceStepConfigure(ADC0_BASE, 2, 0, ADC_CTL_CH7 ); - ADCSequenceStepConfigure(ADC0_BASE, 2, 1, ADC_CTL_CH6 | ADC_CTL_IE ); - ADCSequenceStepConfigure(ADC0_BASE, 2, 2, ADC_CTL_CH5 ); - //Tell the ADC logic - // that this is the last conversion on sequence 3 (ADC_CTL_END). - ADCSequenceStepConfigure(ADC0_BASE, 2, 3, ADC_CTL_CH4 | ADC_CTL_IE | - ADC_CTL_END); - return RT_EOK; + ADCSequenceStepConfigure(adcbase, sequencenum, 0, ADC_CTL_CH7); + ADCSequenceStepConfigure(adcbase, sequencenum, 1, ADC_CTL_CH6 | ADC_CTL_IE); + ADCSequenceStepConfigure(adcbase, sequencenum, 2, ADC_CTL_CH5); + /*Tell the ADC logic + that this is the last conversion on sequence 3 (ADC_CTL_END). */ + ADCSequenceStepConfigure(adcbase, sequencenum, 3, ADC_CTL_CH4 | ADC_CTL_IE | + ADC_CTL_END); + return RT_EOK; } static int tm4c123_adc_init(void) { - int i = 0; - rt_size_t obj_num = sizeof(adc_obj) / sizeof(struct tm4c123_adc); - rt_err_t result = RT_EOK; + int i = 0; + rt_size_t obj_num = sizeof(adc_obj) / sizeof(struct tm4c123_adc); + rt_err_t result = RT_EOK; - adc_hw_config(); + adc_hw_config(); for (i = 0; i < obj_num; i++) { /* ADC init */ adc_obj[i].config = &adc_config[i]; - - if(tm4c123_hw_adc_init(&adc_obj[i])!= RT_EOK) + + if (tm4c123_hw_adc_init(&adc_obj[i]) != RT_EOK) { LOG_E("%s init failed", adc_obj[i].config->name); result = -RT_ERROR; @@ -143,9 +136,9 @@ static int tm4c123_adc_init(void) else { LOG_D("%s init success", adc_obj[i].config->name); - + /* register adc device */ - if (rt_hw_adc_register(&adc_obj[i].adc_device, adc_obj[i].config->name, &tm4c123_adc_ops,RT_NULL) == RT_EOK) + if (rt_hw_adc_register(&adc_obj[i].adc_device, adc_obj[i].config->name, &tm4c123_adc_ops, &adc_config[i]) == RT_EOK) { LOG_D("%s register success", adc_obj[i].config->name); } @@ -162,3 +155,5 @@ static int tm4c123_adc_init(void) INIT_APP_EXPORT(tm4c123_adc_init); #endif /*RT_UING_ADC*/ + +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_adc.h b/bsp/tm4c123bsp/libraries/Drivers/drv_adc.h index c9c5ffe642..0c6d3c3174 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_adc.h +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_adc.h @@ -1,6 +1,16 @@ #ifndef _DRV_ADC_H_ #define _DRV_ADC_H_ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ + #include #include #include @@ -8,13 +18,14 @@ struct tm4c123_adc_config { - const char *name; - uint32_t adcbase; - uint32_t channel; - uint32_t sequence; - uint32_t trigermode; - uint32_t sequencepriority; + const char *name; + uint32_t adcbase; + uint32_t channel; + uint32_t sequence; + uint32_t trigermode; + uint32_t sequencepriority; }; - #endif /*_DRV_ADC_H_*/ + +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_flash/drv_flash.h b/bsp/tm4c123bsp/libraries/Drivers/drv_flash/drv_flash.h deleted file mode 100644 index 3a9d5be061..0000000000 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_flash/drv_flash.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2018-12-5 SummerGift first version - */ - -#ifndef __DRV_FLASH_H__ -#define __DRV_FLASH_H__ - -#include -#include "rtdevice.h" -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size); -int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size); -int stm32_flash_erase(rt_uint32_t addr, size_t size); - -#ifdef __cplusplus -} -#endif - -#endif /* __DRV_FLASH_H__ */ diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_flash/drv_flash_f1.c b/bsp/tm4c123bsp/libraries/Drivers/drv_flash/drv_flash_f1.c deleted file mode 100644 index 8f7d45ade7..0000000000 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_flash/drv_flash_f1.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2018-12-5 SummerGift first version - */ - -#include "board.h" - -#ifdef BSP_USING_ON_CHIP_FLASH -#include "drv_config.h" -#include "drv_flash.h" - -#if defined(PKG_USING_FAL) -#include "fal.h" -#endif - -//#define DRV_DEBUG -#define LOG_TAG "drv.flash" -#include - -/** - * @brief Gets the page of a given address - * @param Addr: Address of the FLASH Memory - * @retval The page of a given address - */ -static uint32_t GetPage(uint32_t addr) -{ - uint32_t page = 0; - page = RT_ALIGN_DOWN(addr, FLASH_PAGE_SIZE); - return page; -} - -/** - * Read data from flash. - * @note This operation's units is word. - * - * @param addr flash address - * @param buf buffer to store read data - * @param size read bytes size - * - * @return result - */ -int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size) -{ - size_t i; - - if ((addr + size) > STM32_FLASH_END_ADDRESS) - { - LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size)); - return -RT_EINVAL; - } - - for (i = 0; i < size; i++, buf++, addr++) - { - *buf = *(rt_uint8_t *) addr; - } - - return size; -} - -/** - * Write data to flash. - * @note This operation's units is word. - * @note This operation must after erase. @see flash_erase. - * - * @param addr flash address - * @param buf the write data buffer - * @param size write bytes size - * - * @return result - */ -int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size) -{ - rt_err_t result = RT_EOK; - rt_uint32_t end_addr = addr + size; - - if (addr % 4 != 0) - { - LOG_E("write addr must be 4-byte alignment"); - return -RT_EINVAL; - } - - if ((end_addr) > STM32_FLASH_END_ADDRESS) - { - LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size)); - return -RT_EINVAL; - } - - HAL_FLASH_Unlock(); - - while (addr < end_addr) - { - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, addr, *((rt_uint32_t *)buf)) == HAL_OK) - { - if (*(rt_uint32_t *)addr != *(rt_uint32_t *)buf) - { - result = -RT_ERROR; - break; - } - addr += 4; - buf += 4; - } - else - { - result = -RT_ERROR; - break; - } - } - - HAL_FLASH_Lock(); - - if (result != RT_EOK) - { - return result; - } - - return size; -} - -/** - * Erase data on flash. - * @note This operation is irreversible. - * @note This operation's units is different which on many chips. - * - * @param addr flash address - * @param size erase bytes size - * - * @return result - */ -int stm32_flash_erase(rt_uint32_t addr, size_t size) -{ - rt_err_t result = RT_EOK; - uint32_t PAGEError = 0; - - /*Variable used for Erase procedure*/ - FLASH_EraseInitTypeDef EraseInitStruct; - - if ((addr + size) > STM32_FLASH_END_ADDRESS) - { - LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); - return -RT_EINVAL; - } - - HAL_FLASH_Unlock(); - - /* Fill EraseInit structure*/ - EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; - EraseInitStruct.PageAddress = GetPage(addr); - EraseInitStruct.NbPages = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE; - - if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK) - { - result = -RT_ERROR; - goto __exit; - } - -__exit: - HAL_FLASH_Lock(); - - if (result != RT_EOK) - { - return result; - } - - LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size); - return size; -} - -#if defined(PKG_USING_FAL) - -static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size); -static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size); -static int fal_flash_erase(long offset, size_t size); - -const struct fal_flash_dev stm32_onchip_flash = { "onchip_flash", STM32_FLASH_START_ADRESS, STM32_FLASH_SIZE, FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase} }; - -static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size) -{ - return stm32_flash_read(stm32_onchip_flash.addr + offset, buf, size); -} - -static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size) -{ - return stm32_flash_write(stm32_onchip_flash.addr + offset, buf, size); -} - -static int fal_flash_erase(long offset, size_t size) -{ - return stm32_flash_erase(stm32_onchip_flash.addr + offset, size); -} - -#endif -#endif /* BSP_USING_ON_CHIP_FLASH */ diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_gpio.c b/bsp/tm4c123bsp/libraries/Drivers/drv_gpio.c index ab4f2ce6d8..7cdfaf91f9 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_gpio.c +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_gpio.c @@ -1,56 +1,45 @@ -#include -#include -#include +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ +#include "drv_gpio.h" +#include +#include +#include "drv_gpio.h" #include #include -#include "hw_memmap.h" -#include "sysctl.h" -#include "gpio.h" -#include "pin_map.h" -#include "interrupt.h" -#include "rom_map.h" -#include "drv_gpio.h" - +#include "inc/hw_memmap.h" +#include "driverlib/sysctl.h" +#include "driverlib/gpio.h" +#include "driverlib/pin_map.h" #ifdef RT_USING_PIN -static const struct pin_index pins[] = +static const struct pin_index pins[] = { - _TM4C_PIN(0 ,F, 0 ), - _TM4C_PIN(1 ,F, 1 ), - _TM4C_PIN(2 ,F, 2 ), - _TM4C_PIN(3 ,F, 3 ), - _TM4C_PIN(4 ,F, 4 ) + _TM4C_PIN(0, F, 0), + _TM4C_PIN(1, F, 1), + _TM4C_PIN(2, F, 2), + _TM4C_PIN(3, F, 3), + _TM4C_PIN(4, F, 4) }; - +/* this is pin_irq map, reserved for update */ static struct rt_pin_irq_hdr pin_irq_hdr_tab[] = { {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL} }; - -static uint32_t pin_irq_enable_mask=0; +static uint32_t pin_irq_enable_mask = 0; #define ITEM_NUM(items) sizeof(items) / sizeof(items[0]) - - + static const struct pin_index *get_pin(uint8_t pin) { const struct pin_index *index; @@ -68,7 +57,6 @@ static const struct pin_index *get_pin(uint8_t pin) return index; }; - static void tm4c123_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) { const struct pin_index *index; @@ -77,104 +65,82 @@ static void tm4c123_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) { return; } - - if(mode == PIN_MODE_INPUT) - { + + if (mode == PIN_MODE_INPUT) + { GPIOPinTypeGPIOInput(index ->gpioBaseAddress, index->pin); - } - else if(mode == PIN_MODE_OUTPUT) - { - GPIOPinTypeGPIOOutput(index->gpioBaseAddress, index->pin); - } - else if(mode == PIN_MODE_INPUT_PULLUP) - { - - // - // Make the pin(s) be inputs. - // - GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_IN); - // - // Set the pad(s) for standard pullup operation. - // - GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU); - } - else if(mode == PIN_MODE_INPUT_PULLDOWN) - { - // - // Make the pin(s) be inputs. - // - GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_IN); - // - // Set the pad(s) for standard pulldown operation. - // - GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPD); - } - else if(mode == PIN_MODE_OUTPUT_OD) - { - // - // Set the pad(s) for standard push-pull operation. - GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD); - // - // Make the pin(s) be outputs. - GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_OUT); - } - + } + else if (mode == PIN_MODE_OUTPUT) + { + GPIOPinTypeGPIOOutput(index->gpioBaseAddress, index->pin); + } + else if (mode == PIN_MODE_INPUT_PULLUP) + { + GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_IN); + GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU); + } + else if (mode == PIN_MODE_INPUT_PULLDOWN) + { + GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_IN); + GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPD); + } + else if (mode == PIN_MODE_OUTPUT_OD) + { + GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD); + GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_OUT); + } + } static void tm4c123_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t ui8Val) { const struct pin_index *index; - index = get_pin(pin); - if( index == RT_NULL) - { - return; - } - if(ui8Val) - { - GPIOPinWrite(index ->gpioBaseAddress, index->pin, index->pin ); - } - else - { - GPIOPinWrite(index ->gpioBaseAddress, index->pin, 0 ); - } + index = get_pin(pin); + if (index == RT_NULL) + { + return; + } + if (ui8Val) + { + GPIOPinWrite(index ->gpioBaseAddress, index->pin, index->pin); + } + else + { + GPIOPinWrite(index ->gpioBaseAddress, index->pin, 0); + } } - static int tm4c123_pin_read(rt_device_t dev, rt_base_t pin) { const struct pin_index *index; - int value = 0; - - index = get_pin(pin); - if( index == RT_NULL) - { - return value; - } - value = GPIOPinRead(index ->gpioBaseAddress , index ->pin ); - + int value = 0; + + index = get_pin(pin); + if (index == RT_NULL) + { + return value; + } + value = GPIOPinRead(index ->gpioBaseAddress, index ->pin); + return value; } -static rt_err_t tm4c123_pin_attach_irq(rt_device_t device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args ) +static rt_err_t tm4c123_pin_attach_irq(rt_device_t device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args) { - //const struct pin_index *index; - + /* this is interface for pin_irq, reserved for update. */ return RT_EOK; } static rt_err_t tm4c123_pin_dettach_irq(rt_device_t device, rt_int32_t pin) { - //const struct pin_index *index; - + /* this is interface for pin_irq, reserved for update. */ return RT_EOK; } - static rt_err_t tm4c123_pin_irq_enable(rt_device_t device, rt_base_t pin, - rt_uint32_t enabled) + rt_uint32_t enabled) { - //const struct pin_index *index; - //const struct pin_irq_map *irqmap; + /* this is interface for pin_irq_enable, reserved for update. */ return RT_EOK; } @@ -197,3 +163,5 @@ int rt_hw_pin_init(void) INIT_BOARD_EXPORT(rt_hw_pin_init); #endif /*RT_USING_PIN*/ + +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_gpio.h b/bsp/tm4c123bsp/libraries/Drivers/drv_gpio.h index 2864c8efa2..3b1bb46cb4 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_gpio.h +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_gpio.h @@ -1,19 +1,28 @@ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ + #ifndef _DRV_GPIO_H_ #define _DRV_GPIO_H_ #include #include -#define _TM4C_PIN(index, gpioport, gpio_index) \ - { \ - index, GPIO_PORT##gpioport##_BASE, GPIO_PIN_##gpio_index \ - } - -#define _TM4C_PIN_RESERVE \ - { \ - -1, 0, 0 \ - } - +#define _TM4C_PIN(index, gpioport, gpio_index) \ + { \ + index, GPIO_PORT##gpioport##_BASE, GPIO_PIN_##gpio_index \ + } + +#define _TM4C_PIN_RESERVE \ + { \ + -1, 0, 0 \ + } /* TM4C123 GPIO driver*/ struct pin_index @@ -27,3 +36,4 @@ extern int rt_hw_pin_init(void); #endif /*_DRV_GPIO_H_*/ +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_log.h b/bsp/tm4c123bsp/libraries/Drivers/drv_log.h index 7e0bfee5b4..ea5e648429 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_log.h +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_log.h @@ -13,15 +13,15 @@ */ #ifndef LOG_TAG -#define DBG_TAG "drv" + #define DBG_TAG "drv" #else -#define DBG_TAG LOG_TAG + #define DBG_TAG LOG_TAG #endif /* LOG_TAG */ #ifdef DRV_DEBUG -#define DBG_LVL DBG_LOG + #define DBG_LVL DBG_LOG #else -#define DBG_LVL DBG_INFO + #define DBG_LVL DBG_INFO #endif /* DRV_DEBUG */ #include diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_pwm.c b/bsp/tm4c123bsp/libraries/Drivers/drv_pwm.c index 4b55157e05..dbd69fdb4e 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_pwm.c +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_pwm.c @@ -1,22 +1,28 @@ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ + #include "drv_pwm.h" #include #include -#include -#include "hw_memmap.h" -#include "pwm.h" -#include "sysctl.h" - - +#include "inc/hw_memmap.h" +#include "driverlib/pwm.h" +#include "driverlib/sysctl.h" #ifdef RT_USING_PWM #include "pwm_config.h" #include "tm4c123_config.h" - +#include #define LOG_TAG "drv.pwm" #include - enum { #ifdef BSP_USING_PWM0 @@ -43,7 +49,6 @@ enum #ifdef BSP_USING_PWM7 PWM7_INDEX, #endif - }; static struct tm4c123_pwm_config pwm_config[] = @@ -51,31 +56,24 @@ static struct tm4c123_pwm_config pwm_config[] = #ifdef BSP_USING_PWM0 PWM0_CONFIG, #endif - #ifdef BSP_USING_PWM1 PWM1_CONFIG, #endif - #ifdef BSP_USING_PWM2 PWM2_CONFIG, #endif - #ifdef BSP_USING_PWM3 PWM3_CONFIG, #endif - #ifdef BSP_USING_PWM4 PWM4_CONFIG, #endif - #ifdef BSP_USING_PWM5 PWM5_CONFIG, #endif - #ifdef BSP_USING_PWM6 PWM6_CONFIG, #endif - #ifdef BSP_USING_PWM7 PWM7_CONFIG, #endif @@ -83,254 +81,245 @@ static struct tm4c123_pwm_config pwm_config[] = static struct tm4c123_pwm pwm_obj[sizeof(pwm_config) / sizeof(pwm_config[0])] = {0}; - static rt_err_t tm4c123_pwm_control(struct rt_device_pwm *device, int cmd, void *arg); static struct rt_pwm_ops drv_ops = { tm4c123_pwm_control }; -static rt_err_t drv_pwm_enable(char* name, struct rt_pwm_configuration *configuration, rt_bool_t enable) +static rt_err_t drv_pwm_enable(char *name, struct rt_pwm_configuration *configuration, rt_bool_t enable) { - /* Converts the channel number to the channel number of Hal library */ - - int num = name[3]-0x30; - + + int num = name[3] - 0x30; + if (!enable) { - if( num<=3 ) - { - PWMOutputState(PWM0_BASE, PWM_OUT_0_BIT<<(num*2+(configuration->channel-1)), false); - } + if (num <= 3) + { + /* Converts the channel number to the channel number of Hal library */ + PWMOutputState(PWM0_BASE, PWM_OUT_0_BIT << (num * 2 + (configuration->channel - 1)), false); + } else - { - PWMOutputState(PWM1_BASE, PWM_OUT_0_BIT<<((num%4)*2+(configuration->channel-1)), false); - } + { + PWMOutputState(PWM1_BASE, PWM_OUT_0_BIT << ((num % 4) * 2 + (configuration->channel - 1)), false); + } } else { - if( num<=3 ) - { - PWMOutputState(PWM0_BASE, PWM_OUT_0_BIT<<(num*2+(configuration->channel-1)), true); - } + if (num <= 3) + { + PWMOutputState(PWM0_BASE, PWM_OUT_0_BIT << (num * 2 + (configuration->channel - 1)), true); + } else - { - PWMOutputState(PWM1_BASE, PWM_OUT_0_BIT<<((num%4)*2+(configuration->channel-1)), true); - } + { + PWMOutputState(PWM1_BASE, PWM_OUT_0_BIT << ((num % 4) * 2 + (configuration->channel - 1)), true); + } } return RT_EOK; } -static rt_err_t drv_pwm_get(char* name, struct rt_pwm_configuration *configuration) +static rt_err_t drv_pwm_get(char *name, struct rt_pwm_configuration *configuration) { - switch(name[3]) - { - case '0': - configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_0); - configuration->pulse= PWMPulseWidthGet(PWM0_BASE, PWM_OUT_0+(uint32_t)(configuration->channel-1)); - break; - case '1': - configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_1); - configuration->pulse= PWMPulseWidthGet(PWM0_BASE, PWM_OUT_2+(uint32_t)(configuration->channel-1)); - break; - case '2': - configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_2); - configuration->pulse= PWMPulseWidthGet(PWM0_BASE, PWM_OUT_4+(uint32_t)(configuration->channel-1)); - break; - case '3': - configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_3); - configuration->pulse= PWMPulseWidthGet(PWM0_BASE, PWM_OUT_6+(uint32_t)(configuration->channel-1)); - break; - case '4': - configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_0); - configuration->pulse= PWMPulseWidthGet(PWM1_BASE, PWM_OUT_0+(uint32_t)(configuration->channel-1)); - break; - case '5': - configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_1); - configuration->pulse= PWMPulseWidthGet(PWM1_BASE, PWM_OUT_2+(uint32_t)(configuration->channel-1)); - break; - case '6': - configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_2); - configuration->pulse= PWMPulseWidthGet(PWM1_BASE, PWM_OUT_4+(uint32_t)(configuration->channel-1)); - break; - case '7': - configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_3); - configuration->pulse= PWMPulseWidthGet(PWM1_BASE, PWM_OUT_6+(uint32_t)(configuration->channel-1)); - break; - default: - break; - } - return RT_EOK; + switch (name[3]) + { + case '0': + configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_0); + configuration->pulse = PWMPulseWidthGet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1)); + break; + case '1': + configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_1); + configuration->pulse = PWMPulseWidthGet(PWM0_BASE, PWM_OUT_2 + (uint32_t)(configuration->channel - 1)); + break; + case '2': + configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_2); + configuration->pulse = PWMPulseWidthGet(PWM0_BASE, PWM_OUT_4 + (uint32_t)(configuration->channel - 1)); + break; + case '3': + configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_3); + configuration->pulse = PWMPulseWidthGet(PWM0_BASE, PWM_OUT_6 + (uint32_t)(configuration->channel - 1)); + break; + case '4': + configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_0); + configuration->pulse = PWMPulseWidthGet(PWM1_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1)); + break; + case '5': + configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_1); + configuration->pulse = PWMPulseWidthGet(PWM1_BASE, PWM_OUT_2 + (uint32_t)(configuration->channel - 1)); + break; + case '6': + configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_2); + configuration->pulse = PWMPulseWidthGet(PWM1_BASE, PWM_OUT_4 + (uint32_t)(configuration->channel - 1)); + break; + case '7': + configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_3); + configuration->pulse = PWMPulseWidthGet(PWM1_BASE, PWM_OUT_6 + (uint32_t)(configuration->channel - 1)); + break; + default: + break; + } + return RT_EOK; } static rt_err_t drv_pwm_set(char *name, struct rt_pwm_configuration *configuration) { - - uint32_t sysPwmClock = SysCtlPWMClockGet(); - switch(name[3]) - { - case '0': - PWMGenPeriodSet(PWM0_BASE, PWM_GEN_0, configuration->period/1000*(sysPwmClock/1000000)); // t(s)/(1/f) = ticks ns/1000/1000000 - PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0+(uint32_t)(configuration->channel-1),configuration->pulse/1000*(sysPwmClock/1000000)); - PWMGenEnable(PWM0_BASE, PWM_GEN_0); - break; - case '1': - PWMGenPeriodSet(PWM0_BASE, PWM_GEN_1, configuration->period/1000*(sysPwmClock/1000000)); - PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0+(uint32_t)(configuration->channel-1),configuration->pulse/1000*(sysPwmClock/1000000)); - PWMGenEnable(PWM0_BASE, PWM_GEN_1); - break; - case '2': - PWMGenPeriodSet(PWM0_BASE, PWM_GEN_2, configuration->period/1000*(sysPwmClock/1000000)); - PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0+(uint32_t)(configuration->channel-1),configuration->pulse/1000*(sysPwmClock/1000000)); - PWMGenEnable(PWM0_BASE, PWM_GEN_2); - break; - case '3': - PWMGenPeriodSet(PWM0_BASE, PWM_GEN_3, configuration->period/1000*(sysPwmClock/1000000)); - PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0+(uint32_t)(configuration->channel-1),configuration->pulse/1000*(sysPwmClock/1000000)); - PWMGenEnable(PWM0_BASE, PWM_GEN_3); - break; - case '4': - PWMGenPeriodSet(PWM1_BASE, PWM_GEN_0, configuration->period/1000*(sysPwmClock/1000000)); - PWMPulseWidthSet(PWM1_BASE, PWM_OUT_0+(uint32_t)(configuration->channel-1),configuration->pulse/1000*(sysPwmClock/1000000)); - PWMGenEnable(PWM1_BASE, PWM_GEN_0); - break; - case '5': - PWMGenPeriodSet(PWM1_BASE, PWM_GEN_1, configuration->period/1000*(sysPwmClock/1000000)); - PWMPulseWidthSet(PWM1_BASE, PWM_OUT_2+(uint32_t)(configuration->channel-1),configuration->pulse/1000*(sysPwmClock/1000000)); - PWMGenEnable(PWM1_BASE, PWM_GEN_1); - break; - case '6': - PWMGenPeriodSet(PWM1_BASE, PWM_GEN_2, configuration->period/1000*(sysPwmClock/1000000)); - PWMPulseWidthSet(PWM1_BASE, PWM_OUT_4+(uint32_t)(configuration->channel-1),configuration->pulse/1000*(sysPwmClock/1000000)); - PWMGenEnable(PWM1_BASE, PWM_GEN_2); - break; - case '7': - PWMGenPeriodSet(PWM1_BASE, PWM_GEN_3, configuration->period/1000*(sysPwmClock/1000000)); - PWMPulseWidthSet(PWM1_BASE, PWM_OUT_6+(uint32_t)(configuration->channel-1),configuration->pulse/1000*(sysPwmClock/1000000)); - PWMGenEnable(PWM1_BASE, PWM_GEN_3); - break; - default: - break; - } - return RT_EOK; + uint32_t sysPwmClock = SysCtlPWMClockGet(); + switch (name[3]) + { + case '0': + PWMGenPeriodSet(PWM0_BASE, PWM_GEN_0, configuration->period / 1000 * (sysPwmClock / 1000000)); // t(s)/(1/f) = ticks ns/1000/1000000 + PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000)); + PWMGenEnable(PWM0_BASE, PWM_GEN_0); + break; + case '1': + PWMGenPeriodSet(PWM0_BASE, PWM_GEN_1, configuration->period / 1000 * (sysPwmClock / 1000000)); + PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000)); + PWMGenEnable(PWM0_BASE, PWM_GEN_1); + break; + case '2': + PWMGenPeriodSet(PWM0_BASE, PWM_GEN_2, configuration->period / 1000 * (sysPwmClock / 1000000)); + PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000)); + PWMGenEnable(PWM0_BASE, PWM_GEN_2); + break; + case '3': + PWMGenPeriodSet(PWM0_BASE, PWM_GEN_3, configuration->period / 1000 * (sysPwmClock / 1000000)); + PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000)); + PWMGenEnable(PWM0_BASE, PWM_GEN_3); + break; + case '4': + PWMGenPeriodSet(PWM1_BASE, PWM_GEN_0, configuration->period / 1000 * (sysPwmClock / 1000000)); + PWMPulseWidthSet(PWM1_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000)); + PWMGenEnable(PWM1_BASE, PWM_GEN_0); + break; + case '5': + PWMGenPeriodSet(PWM1_BASE, PWM_GEN_1, configuration->period / 1000 * (sysPwmClock / 1000000)); + PWMPulseWidthSet(PWM1_BASE, PWM_OUT_2 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000)); + PWMGenEnable(PWM1_BASE, PWM_GEN_1); + break; + case '6': + PWMGenPeriodSet(PWM1_BASE, PWM_GEN_2, configuration->period / 1000 * (sysPwmClock / 1000000)); + PWMPulseWidthSet(PWM1_BASE, PWM_OUT_4 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000)); + PWMGenEnable(PWM1_BASE, PWM_GEN_2); + break; + case '7': + PWMGenPeriodSet(PWM1_BASE, PWM_GEN_3, configuration->period / 1000 * (sysPwmClock / 1000000)); + PWMPulseWidthSet(PWM1_BASE, PWM_OUT_6 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000)); + PWMGenEnable(PWM1_BASE, PWM_GEN_3); + break; + default: + break; + } + + return RT_EOK; } static rt_err_t tm4c123_pwm_control(struct rt_device_pwm *device, int cmd, void *arg) - + { struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg; - - + switch (cmd) { case PWM_CMD_ENABLE: - return drv_pwm_enable(device->parent.parent.name, configuration, RT_TRUE); + return drv_pwm_enable(device->parent.parent.name, configuration, RT_TRUE); case PWM_CMD_DISABLE: - return drv_pwm_enable(device->parent.parent.name, configuration, RT_FALSE); + return drv_pwm_enable(device->parent.parent.name, configuration, RT_FALSE); case PWM_CMD_SET: - return drv_pwm_set(device->parent.parent.name, configuration); + return drv_pwm_set(device->parent.parent.name, configuration); case PWM_CMD_GET: - return drv_pwm_get(device->parent.parent.name, configuration); + return drv_pwm_get(device->parent.parent.name, configuration); default: return RT_EINVAL; } } - static rt_err_t tm4c123_hw_pwm_init(struct tm4c123_pwm *device) { - rt_err_t result = RT_EOK; - RT_ASSERT(device != RT_NULL); - - - pwm_hw_config(); - - switch( device->config->name[3]) - { - case '0': - PWMGenConfigure(PWM0_BASE, PWM_GEN_0, device->config->counterMode | - device->config->syncMode); - break; - case '1': - PWMGenConfigure(PWM0_BASE, PWM_GEN_1, device->config->counterMode | - device->config->syncMode); - break; - case '2': - PWMGenConfigure(PWM0_BASE, PWM_GEN_2, device->config->counterMode | - device->config->syncMode); - break; - case '3': - PWMGenConfigure(PWM0_BASE, PWM_GEN_3, device->config->counterMode | - device->config->syncMode); - break; - case '4': - PWMGenConfigure(PWM1_BASE, PWM_GEN_0, device->config->counterMode | - device->config->syncMode); - break; - case '5': - PWMGenConfigure(PWM1_BASE, PWM_GEN_1, device->config->counterMode | - device->config->syncMode); - break; - case '6': - PWMGenConfigure(PWM1_BASE, PWM_GEN_2, device->config->counterMode | - device->config->syncMode); - break; - case '7': - PWMGenConfigure(PWM1_BASE, PWM_GEN_3, device->config->counterMode | - device->config->syncMode); - break; - default: - LOG_E("%s PWMGenConfigure failed", device->config->name); - result = -RT_ERROR; - return result; - - } - + rt_err_t result = RT_EOK; + RT_ASSERT(device != RT_NULL); + + pwm_hw_config(); + switch (device->config->name[3]) + { + case '0': + PWMGenConfigure(PWM0_BASE, PWM_GEN_0, device->config->counterMode | + device->config->syncMode); + break; + case '1': + PWMGenConfigure(PWM0_BASE, PWM_GEN_1, device->config->counterMode | + device->config->syncMode); + break; + case '2': + PWMGenConfigure(PWM0_BASE, PWM_GEN_2, device->config->counterMode | + device->config->syncMode); + break; + case '3': + PWMGenConfigure(PWM0_BASE, PWM_GEN_3, device->config->counterMode | + device->config->syncMode); + break; + case '4': + PWMGenConfigure(PWM1_BASE, PWM_GEN_0, device->config->counterMode | + device->config->syncMode); + break; + case '5': + PWMGenConfigure(PWM1_BASE, PWM_GEN_1, device->config->counterMode | + device->config->syncMode); + break; + case '6': + PWMGenConfigure(PWM1_BASE, PWM_GEN_2, device->config->counterMode | + device->config->syncMode); + break; + case '7': + PWMGenConfigure(PWM1_BASE, PWM_GEN_3, device->config->counterMode | + device->config->syncMode); + break; + default: + LOG_E("%s PWMGenConfigure failed", device->config->name); + result = -RT_ERROR; + return result; + } + return result; } - - int rt_hw_pwm_init(void) { - int i = 0; - rt_size_t obj_num = sizeof(pwm_obj) / sizeof(struct tm4c123_pwm); - rt_err_t result = RT_EOK; - - - for(i=0 ; i< obj_num;i++) - { - - pwm_obj[i].config = &pwm_config[i]; - pwm_obj[i].pwm_device.ops = &drv_ops; - /*pwm_init*/ - if(tm4c123_hw_pwm_init(&pwm_obj[i])!= RT_EOK) - { - LOG_E("%s init failed", pwm_obj[i].config->name); + int i = 0; + rt_size_t obj_num = sizeof(pwm_obj) / sizeof(struct tm4c123_pwm); + rt_err_t result = RT_EOK; + + for (i = 0 ; i < obj_num; i++) + { + pwm_obj[i].config = &pwm_config[i]; + pwm_obj[i].pwm_device.ops = &drv_ops; + /*pwm_init*/ + if (tm4c123_hw_pwm_init(&pwm_obj[i]) != RT_EOK) + { + LOG_E("%s init failed", pwm_obj[i].config->name); + result = -RT_ERROR; + return result; + } + else + { + LOG_D("%s init success", pwm_obj[i].config->name); + + /* register pwm device */ + if (rt_device_pwm_register(&pwm_obj[i].pwm_device, pwm_obj[i].config->name, &drv_ops, RT_NULL) == RT_EOK) + { + LOG_D("%s register success", pwm_obj[i].config->name); + } + else + { + LOG_E("%s register failed", pwm_obj[i].config->name); result = -RT_ERROR; - return result; - } - else - { - LOG_D("%s init success", pwm_obj[i].config->name); - - /* register pwm device */ - if (rt_device_pwm_register(&pwm_obj[i].pwm_device, pwm_obj[i].config->name, &drv_ops,RT_NULL) == RT_EOK) - { - LOG_D("%s register success", pwm_obj[i].config->name); - } - else - { - LOG_E("%s register failed", pwm_obj[i].config->name); - result = -RT_ERROR; - } - } - } - return result; + } + } + } + return result; } -#endif +#endif /* RT_USING_PWM */ +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_pwm.h b/bsp/tm4c123bsp/libraries/Drivers/drv_pwm.h index 07d1ee47be..29ce1899bd 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_pwm.h +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_pwm.h @@ -1,28 +1,36 @@ -#ifndef _DRV_PWM_H_ -#define _DRV_PWM_H_ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ +#ifndef __DRV_PWM_H__ +#define __DRV_PWM_H__ #include #include - struct tm4c123_pwm { - struct tm4c123_pwm_config *config; - struct rt_device_pwm pwm_device; + struct tm4c123_pwm_config *config; + struct rt_device_pwm pwm_device; }; /* tm4c123 config class */ struct tm4c123_pwm_config { - rt_uint8_t channel; - char *name; - uint32_t counterMode; - uint32_t syncMode; + rt_uint8_t channel; + char *name; + uint32_t counterMode; + uint32_t syncMode; }; - int rt_hw_pwm_init(void); +#endif /*__DRV_PWM_H__*/ -#endif /*_DRV_PWM_H_*/ +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_spi.c b/bsp/tm4c123bsp/libraries/Drivers/drv_spi.c index 6a35c769a8..d604c21993 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_spi.c +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_spi.c @@ -1,17 +1,24 @@ -#include "drv_spi.h" +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ +#include "drv_spi.h" #include #include -#include -#include "hw_memmap.h" -#include "ssi.h" -#include "gpio.h" -#include "sysctl.h" - +#include "inc/hw_memmap.h" +#include "driverlib/ssi.h" +#include "driverlib/gpio.h" +#include "driverlib/sysctl.h" #ifdef RT_USING_SPI -#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) +#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ #include "tm4c123_config.h" #include "spi_config.h" @@ -21,7 +28,6 @@ #define LOG_TAG "drv.spi" #include - enum { #ifdef BSP_USING_SPI0 @@ -64,11 +70,11 @@ static rt_err_t tm4c123_spi_configure(struct tm4c123_spi *spi_drv, struct rt_spi { RT_ASSERT(spi_drv != RT_NULL); RT_ASSERT(cfg != RT_NULL); - - uint32_t ui32Protocol,ui32Mode; - uint32_t ui32BitRate = (uint32_t)cfg->max_hz; + + uint32_t ui32Protocol, ui32Mode; + uint32_t ui32BitRate = (uint32_t)cfg->max_hz; uint32_t ui32DataWidth = (uint32_t)cfg->data_width; - uint32_t pui32DataRx[1]; + uint32_t pui32DataRx[1]; rt_uint8_t ui8Protocol = 0; if (cfg->mode & RT_SPI_SLAVE) @@ -96,36 +102,35 @@ static rt_err_t tm4c123_spi_configure(struct tm4c123_spi *spi_drv, struct rt_spi else { ui8Protocol += 0; - } + } - switch( ui8Protocol) + switch (ui8Protocol) { - case 0: - ui32Protocol = SSI_FRF_MOTO_MODE_0; - break; - case 1: - ui32Protocol = SSI_FRF_MOTO_MODE_1; - break; - case 2: - ui32Protocol = SSI_FRF_MOTO_MODE_2; - break; - case 3: - ui32Protocol = SSI_FRF_MOTO_MODE_3; - break; - default: - ui32Protocol = SSI_FRF_MOTO_MODE_0; - break; + case 0: + ui32Protocol = SSI_FRF_MOTO_MODE_0; + break; + case 1: + ui32Protocol = SSI_FRF_MOTO_MODE_1; + break; + case 2: + ui32Protocol = SSI_FRF_MOTO_MODE_2; + break; + case 3: + ui32Protocol = SSI_FRF_MOTO_MODE_3; + break; + default: + ui32Protocol = SSI_FRF_MOTO_MODE_0; + break; } SSIConfigSetExpClk(spi_drv->config->base, SysCtlClockGet(), ui32Protocol, ui32Mode, ui32BitRate, ui32DataWidth); - LOG_D("ssiclk freq: %d, SPI limiting freq: %d",SysCtlClockGet(),cfg->max_hz); - - /* DMA configuration */ + LOG_D("ssiclk freq: %d, SPI limiting freq: %d", SysCtlClockGet(), cfg->max_hz); + SSIEnable(spi_drv->config->base); - while(SSIDataGetNonBlocking(SSI0_BASE, &pui32DataRx[0])) + while (SSIDataGetNonBlocking(SSI0_BASE, &pui32DataRx[0])) { } @@ -140,9 +145,9 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * rt_size_t message_length; rt_uint8_t *recv_buf; const rt_uint8_t *send_buf; - uint32_t ReadData=0; + uint32_t ReadData = 0; int i = 0; - + RT_ASSERT(device != RT_NULL); RT_ASSERT(device->bus != RT_NULL); RT_ASSERT(device->bus->parent.user_data != RT_NULL); @@ -164,27 +169,27 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * message_length = message->length; recv_buf = message->recv_buf; - send_buf = message->send_buf; + send_buf = message->send_buf; if (message->send_buf && message->recv_buf) { - for(i=0; i< message_length; i++) + for (i = 0; i < message_length; i++) { SSIDataPut(spi_drv->config->base, (uint32_t)send_buf[i]); - while(SSIBusy(spi_drv->config->base)) + while (SSIBusy(spi_drv->config->base)) { } SSIDataGet(spi_drv->config->base, &ReadData); recv_buf[i] = (unsigned char)ReadData; } - + } else if (message->send_buf) { - for(i=0; i< message_length; i++) + for (i = 0; i < message_length; i++) { SSIDataPut(spi_drv->config->base, (uint32_t)send_buf[i]); - while(SSIBusy(spi_drv->config->base)) + while (SSIBusy(spi_drv->config->base)) { } SSIDataGet(spi_drv->config->base, &ReadData); @@ -192,19 +197,19 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * } else { - for(i=0; i< message_length; i++) + for (i = 0; i < message_length; i++) { SSIDataPut(spi_drv->config->base, (uint32_t)0xff); - while(SSIBusy(spi_drv->config->base)) + while (SSIBusy(spi_drv->config->base)) { } SSIDataGet(spi_drv->config->base, &ReadData); recv_buf[i] = (unsigned char)ReadData; - } + } } LOG_D("%s transfer done", spi_drv->config->bus_name); - + if (message->cs_release) { GPIOPinWrite(cs->portbase, cs->GPIO_Pin, cs->GPIO_Pin); @@ -254,7 +259,7 @@ static int rt_hw_spi_bus_init(void) /** * Attach the spi device to SPI bus, this function must be used after initialization. */ -rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, uint32_t portindex ,uint32_t cs_gpiobase, uint32_t cs_gpio_pin) +rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, uint32_t portindex, uint32_t cs_gpiobase, uint32_t cs_gpio_pin) { RT_ASSERT(bus_name != RT_NULL); RT_ASSERT(device_name != RT_NULL); @@ -264,11 +269,10 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, struct tm4c123_hw_spi_cs *cs_pin; /* initialize the cs pin && select the slave*/ - SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA+portindex); + SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA + portindex); GPIOPinTypeGPIOOutput(cs_gpiobase, cs_gpio_pin); GPIOPinWrite(cs_gpiobase, cs_gpio_pin, cs_gpio_pin); - /* attach the device to spi bus*/ spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device)); RT_ASSERT(spi_device != RT_NULL); @@ -299,7 +303,7 @@ int rt_hw_spi_init(void) } INIT_BOARD_EXPORT(rt_hw_spi_init); - #endif /* defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) */ #endif /*RT_USING_SPI*/ +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_spi.h b/bsp/tm4c123bsp/libraries/Drivers/drv_spi.h index ff520b9c12..bc4e5a4e24 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_spi.h +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_spi.h @@ -1,5 +1,15 @@ -#ifndef __DRV_SPI_H_ -#define __DRV_SPI_H_ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ + +#ifndef __DRV_SPI_H__ +#define __DRV_SPI_H__ #include #include @@ -16,7 +26,7 @@ struct tm4c123_hw_spi_cs struct tm4c123_spi_config { uint32_t base; - char * bus_name; + char *bus_name; }; /* tm4c123 spi dirver class */ @@ -24,7 +34,6 @@ struct tm4c123_spi { struct tm4c123_spi_config *config; struct rt_spi_configuration *cfg; - struct rt_spi_bus spi_bus; }; @@ -35,11 +44,6 @@ struct tm4c123_spi_device char *device_name; }; -#define SPI_USING_RX_DMA_FLAG (1<<0) -#define SPI_USING_TX_DMA_FLAG (1<<1) - -#endif /*__DRV_SPI_H_ */ - - - +#endif /*__DRV_SPI_H__ */ +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_uart.c b/bsp/tm4c123bsp/libraries/Drivers/drv_uart.c index eca880936a..9679baf293 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_uart.c +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_uart.c @@ -1,20 +1,27 @@ - -#include -#include -#include "hw_memmap.h" -#include "hw_ints.h" -#include "sysctl.h" -#include "gpio.h" -#include "pin_map.h" -#include "interrupt.h" -#include "rom_map.h" -#include "uart.h" +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ #include "drv_uart.h" -#include "uart_config.h" -#include "tm4c123_config.h" +#include +#include +#include "inc/hw_memmap.h" +#include "inc/hw_ints.h" +#include "driverlib/sysctl.h" +#include "driverlib/gpio.h" +#include "driverlib/pin_map.h" +#include "driverlib/interrupt.h" +#include "driverlib/uart.h" #ifdef RT_USING_SERIAL +#include "uart_config.h" +#include "tm4c123_config.h" #define LOG_TAG "drv.uart" #include @@ -23,42 +30,36 @@ #error "Please define at least one BSP_USING_UARTx" #endif -enum { - -#ifdef BSP_USING_UART0 - UART0_INDEX, -#endif - -#ifdef BSP_USING_UART1 - UART1_INDEX, -#endif - -#ifdef BSP_USING_UART2 - UART2_INDEX, -#endif - -#ifdef BSP_USING_UART3 - UART3_INDEX, -#endif -}; - -uint32_t uart_intbase[]= +enum { #ifdef BSP_USING_UART0 - INT_UART0, + UART0_INDEX, #endif - #ifdef BSP_USING_UART1 - INT_UART1, + UART1_INDEX, #endif - #ifdef BSP_USING_UART2 - INT_UART2, + UART2_INDEX, #endif - #ifdef BSP_USING_UART3 - INT_UART3 -#endif + UART3_INDEX, +#endif +}; + +uint32_t uart_intbase[] = +{ +#ifdef BSP_USING_UART0 + INT_UART0, +#endif +#ifdef BSP_USING_UART1 + INT_UART1, +#endif +#ifdef BSP_USING_UART2 + INT_UART2, +#endif +#ifdef BSP_USING_UART3 + INT_UART3 +#endif }; static struct tm4c123_uart_config uart_config[] = @@ -66,7 +67,7 @@ static struct tm4c123_uart_config uart_config[] = #ifdef BSP_USING_UART0 UART0_CONFIG, #endif - + #ifdef BSP_USING_UART1 UART1_CONFIG, #endif @@ -74,44 +75,23 @@ static struct tm4c123_uart_config uart_config[] = #ifdef BSP_USING_UART2 UART2_CONFIG, #endif - + #ifdef BSP_USING_UART3 UART3_CONFIG, -#endif +#endif }; - static struct tm4c123_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0}; - -//struct serial_configure -//{ -// rt_uint32_t baud_rate; /* ??? */ -// rt_uint32_t data_bits :4; /* ??? */ -// rt_uint32_t stop_bits :2; /* ??? */ -// rt_uint32_t parity :2; /* ????? */ -// rt_uint32_t bit_order :1; /* ?????????? */ -// rt_uint32_t invert :1; /* ?? */ -// rt_uint32_t bufsz :16; /* ????????? */ -// rt_uint32_t reserved :4; /* ??? */ -//}; - -//rtservice.h -//#define rt_container_of(ptr, type, member) ((type *)((char *)(ptr) - (unsigned long)(&((type *)0)->member))) - static rt_err_t tm4c123_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { struct tm4c123_uart *uart; RT_ASSERT(serial != RT_NULL); RT_ASSERT(cfg != RT_NULL); - uart = rt_container_of(serial, struct tm4c123_uart, serial); - - - UARTFIFOLevelSet(uart->config->uartbase, UART_FIFO_TX1_8, UART_FIFO_RX1_8); - + + UARTFIFOLevelSet(uart->config->uartbase, UART_FIFO_TX1_8, UART_FIFO_RX1_8); UARTConfigSetExpClk(uart->config->uartbase, SysCtlClockGet(), uart->config->baudrate, - uart->config->mode); - + uart->config->mode); return RT_EOK; } @@ -119,35 +99,23 @@ static rt_err_t tm4c123_configure(struct rt_serial_device *serial, struct serial static rt_err_t tm4c123_control(struct rt_serial_device *serial, int cmd, void *arg) { struct tm4c123_uart *uart; -#ifdef RT_SERIAL_USING_DMA - rt_ubase_t ctrl_arg = (rt_ubase_t)arg; -#endif - RT_ASSERT(serial != RT_NULL); uart = rt_container_of(serial, struct tm4c123_uart, serial); - + switch (cmd) { - /* disable interrupt */ + /* disable interrupt */ case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */ IntDisable(uart->uartintbase); - /* disable interrupt */ - //UARTIntDisable(UART0_BASE, UART_INT_RX | UART_INT_RT); - UARTIntDisable(uart->config->uartbase, UART_INT_RX); + UARTIntDisable(uart->config->uartbase, UART_INT_RX); break; /* enable interrupt */ case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ IntEnable(uart->uartintbase); - //UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT); - UARTIntEnable(uart->config->uartbase, UART_INT_RX); + UARTIntEnable(uart->config->uartbase, UART_INT_RX); break; - -#ifdef RT_SERIAL_USING_DMA - case RT_DEVICE_CTRL_CONFIG: - break; -#endif } return RT_EOK; } @@ -158,8 +126,7 @@ static int tm4c123_putc(struct rt_serial_device *serial, char c) RT_ASSERT(serial != RT_NULL); uart = rt_container_of(serial, struct tm4c123_uart, serial); - - UARTCharPut(uart->config->uartbase, c); + UARTCharPut(uart->config->uartbase, c); return 1; } @@ -168,6 +135,7 @@ static int tm4c123_getc(struct rt_serial_device *serial) int ch; struct tm4c123_uart *uart; RT_ASSERT(serial != RT_NULL); + uart = rt_container_of(serial, struct tm4c123_uart, serial); ch = -1; ch = UARTCharGetNonBlocking(uart->config->uartbase); @@ -176,27 +144,7 @@ static int tm4c123_getc(struct rt_serial_device *serial) static rt_size_t tm4c123_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction) { - struct tm4c123_uart *uart; - RT_ASSERT(serial != RT_NULL); - uart = rt_container_of(serial, struct tm4c123_uart, serial); - - if (size == 0) - { - return 0; - } - -// if (RT_SERIAL_DMA_TX == direction) -// { -// if (HAL_UART_Transmit_DMA(&uart->handle, buf, size) == HAL_OK) -// { -// return size; -// } -// else -// { -// return 0; -// } -// } - + /* this is an interface for uart dma, reserved for uptate. */ return 0; } @@ -214,30 +162,21 @@ static const struct rt_uart_ops tm4c123_uart_ops = * * @param serial serial device */ - static void uart_isr(struct rt_serial_device *serial) { struct tm4c123_uart *uart; - uint32_t ui32Ints; - -#ifdef RT_SERIAL_USING_DMA - rt_size_t recv_total_index, recv_len; - rt_base_t level; -#endif - + uint32_t ui32Ints; RT_ASSERT(serial != RT_NULL); uart = rt_container_of(serial, struct tm4c123_uart, serial); - ui32Ints = UARTIntStatus(uart->config->uartbase, true); - UARTIntClear(uart->config->uartbase, ui32Ints); + ui32Ints = UARTIntStatus(uart->config->uartbase, true); + UARTIntClear(uart->config->uartbase, ui32Ints); /* UART in mode Receiver -------------------------------------------------*/ - if(ui32Ints & (UART_INT_RX | UART_INT_RT)) + if (ui32Ints & (UART_INT_RX | UART_INT_RT)) { - rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); } - } #if defined(BSP_USING_UART0) @@ -250,8 +189,7 @@ void UART0IntHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif - +#endif /* BSP_USING_UART0 */ #if defined(BSP_USING_UART1) void UART1IntHandler(void) @@ -263,42 +201,11 @@ void UART1IntHandler(void) /* leave interrupt */ rt_interrupt_leave(); } - - -//#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) -//void UART1_DMA_RX_IRQHandler(void) -//{ -// /* enter interrupt */ -// rt_interrupt_enter(); - -// HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_rx.handle); - -// /* leave interrupt */ -// rt_interrupt_leave(); -//} -//#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */ - -//#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) -//void UART1_DMA_TX_IRQHandler(void) -//{ -// /* enter interrupt */ -// rt_interrupt_enter(); - -// HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_tx.handle); - -// /* leave interrupt */ -// rt_interrupt_leave(); -//} -//#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */ #endif /* BSP_USING_UART1 */ - static void tm4c123_uart_get_dma_config(void) { -#ifdef BSP_USING_UART1 - -#endif - + /* this is an interface for uart dma, reserved for update */ } int rt_hw_usart_init(void) @@ -307,14 +214,11 @@ int rt_hw_usart_init(void) struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; rt_err_t result = 0; - //tm4c123_uart_get_dma_config(); uart_hw_config(); - - for (int i = 0; i < obj_num; i++) { uart_obj[i].config = &uart_config[i]; - uart_obj[i].uartintbase = uart_intbase[i]; + uart_obj[i].uartintbase = uart_intbase[i]; uart_obj[i].serial.ops = &tm4c123_uart_ops; uart_obj[i].serial.config = config; /* register UART device */ @@ -329,7 +233,6 @@ int rt_hw_usart_init(void) return result; } - - #endif /* RT_USING_SERIAL */ +/************************** end of file ******************/ \ No newline at end of file diff --git a/bsp/tm4c123bsp/libraries/Drivers/drv_uart.h b/bsp/tm4c123bsp/libraries/Drivers/drv_uart.h index 23e970dc29..caeb4c57f5 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/drv_uart.h +++ b/bsp/tm4c123bsp/libraries/Drivers/drv_uart.h @@ -1,5 +1,15 @@ -#ifndef _DRV_UART_H_ -#define _DRV_UART_H_ +/* + * Copyright (c) 2006-2019, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-06-27 AHTYDHD the first version + */ + +#ifndef __DRV_UART_H__ +#define __DRV_UART_H__ #include #include @@ -10,29 +20,28 @@ struct tm4c123_uart_config { const char *name; - uint32_t uartbase; - uint32_t baudrate; - uint32_t mode; + uint32_t uartbase; + uint32_t baudrate; + uint32_t mode; //struct dma_config *dma_rx; //struct dma_config *dma_tx; }; - /* tm4c123 uart dirver class */ struct tm4c123_uart -{ +{ struct tm4c123_uart_config *config; - uint32_t uartintbase; - + uint32_t uartintbase; + #ifdef RT_SERIAL_USING_DMA #endif - + rt_uint16_t uart_dma_flag; struct rt_serial_device serial; }; extern int rt_hw_usart_init(void); -#endif /*_DRV_UART_H_*/ - +#endif /*__DRV_UART_H__*/ +/************************** end of file ******************/ \ No newline at end of file