From 2a684126c03e962e4533920b81eca64885d895ab Mon Sep 17 00:00:00 2001
From: heyuanjie87 <943313837@qq.com>
Date: Wed, 20 Nov 2024 15:58:50 +0800
Subject: [PATCH] =?UTF-8?q?[libcpu][riscv]=E7=BA=A0=E6=AD=A3pv=5Foffset?=
 =?UTF-8?q?=E7=9A=84=E5=AF=B9=E9=BD=90=E6=A3=80=E6=9F=A5?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

---
 libcpu/risc-v/common64/mmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libcpu/risc-v/common64/mmu.c b/libcpu/risc-v/common64/mmu.c
index 649c22a054..e8121baea4 100644
--- a/libcpu/risc-v/common64/mmu.c
+++ b/libcpu/risc-v/common64/mmu.c
@@ -536,7 +536,7 @@ void rt_hw_mem_setup_early(void)
 
     if (pv_off)
     {
-        if (pv_off & (1ul << (ARCH_INDEX_WIDTH * 2 + ARCH_PAGE_SHIFT)))
+        if (pv_off & ((1ul << (ARCH_INDEX_WIDTH * 2 + ARCH_PAGE_SHIFT)) - 1))
         {
             LOG_E("%s: not aligned virtual address. pv_offset %p", __func__,
                   pv_off);