[BSP]Add more drivers and fix some problem
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c17ddf1430
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2706bccbdd
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/*
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* File : adc.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2017-12-04 Haley the first version
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*/
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#include <rtdevice.h>
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#include "am_mcu_apollo.h"
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#include "board.h"
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#ifdef RT_USING_ADC
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/* sem define */
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rt_sem_t adcsem = RT_NULL;
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#define BATTERY_GPIO 29 /* Battery */
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#define BATTERY_ADC_PIN AM_HAL_PIN_29_ADCSE1
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#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE1 /* BATTERY ADC采集通道 */
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#define BATTERY_ADC_CHANNELNUM 1 /* BATTERY ADC采集通道号 */
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#define ADC_CTIMER_NUM 3 /* ADC使用定时器 */
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#define ADC_CHANNEL_NUM 1 /* ADC采集通道个数 */
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#define ADC_SAMPLE_NUM 8 /* ADC采样个数, NE_OF_OUTPUT */
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rt_uint8_t bat_adc_cnt = (ADC_CHANNEL_NUM + 1)*ADC_SAMPLE_NUM;
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rt_int16_t am_adc_buffer_pool[64];
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rt_uint8_t am_adc_data_get(rt_int16_t *buff, rt_uint16_t size)
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{
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/* wait adc interrupt release sem forever */
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rt_sem_take(adcsem, RT_WAITING_FOREVER);
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/* copy the data */
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rt_memcpy(buff, am_adc_buffer_pool, size*sizeof(rt_int16_t));
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return 0;
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}
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void am_adc_start(void)
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{
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/* adcsem create */
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adcsem = rt_sem_create("adcsem", 0, RT_IPC_FLAG_FIFO);
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/* Start the ctimer */
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am_hal_ctimer_start(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA);
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/* Trigger the ADC once */
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am_hal_adc_trigger();
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}
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void am_adc_stop(void)
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{
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/* Stop the ctimer */
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am_hal_ctimer_stop(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA);
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/* adcsem delete */
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rt_sem_delete(adcsem);
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}
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/**
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* @brief Interrupt handler for the ADC
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*
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* This function is Interrupt handler for the ADC
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*
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* @return None.
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*/
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void am_adc_isr(void)
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{
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uint32_t ui32Status, ui32FifoData;
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/* Read the interrupt status */
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ui32Status = am_hal_adc_int_status_get(true);
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/* Clear the ADC interrupt */
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am_hal_adc_int_clear(ui32Status);
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/* If we got a FIFO 75% full (which should be our only ADC interrupt), go ahead and read the data */
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if (ui32Status & AM_HAL_ADC_INT_FIFOOVR1)
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{
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do
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{
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/* Read the value from the FIFO into the circular buffer */
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ui32FifoData = am_hal_adc_fifo_pop();
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if(AM_HAL_ADC_FIFO_SLOT(ui32FifoData) == BATTERY_ADC_CHANNELNUM)
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am_adc_buffer_pool[bat_adc_cnt++] = AM_HAL_ADC_FIFO_SAMPLE(ui32FifoData);
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if(bat_adc_cnt > (ADC_CHANNEL_NUM + 1)*ADC_SAMPLE_NUM - 1)
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{
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/* shift data */
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rt_memmove(am_adc_buffer_pool, am_adc_buffer_pool + ADC_CHANNEL_NUM*ADC_SAMPLE_NUM, ADC_CHANNEL_NUM*ADC_SAMPLE_NUM*sizeof(rt_int16_t));
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bat_adc_cnt = (ADC_CHANNEL_NUM + 1)*ADC_SAMPLE_NUM;
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/* release adcsem */
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rt_sem_release(adcsem);
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}
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} while (AM_HAL_ADC_FIFO_COUNT(ui32FifoData) > 0);
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}
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}
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static void timerA3_for_adc_init(void)
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{
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/* Start a timer to trigger the ADC periodically (1 second) */
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am_hal_ctimer_config_single(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA,
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AM_HAL_CTIMER_XT_2_048KHZ |
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AM_HAL_CTIMER_FN_REPEAT |
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AM_HAL_CTIMER_INT_ENABLE |
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AM_HAL_CTIMER_PIN_ENABLE);
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am_hal_ctimer_int_enable(AM_HAL_CTIMER_INT_TIMERA3);
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/* Set 512 sample rate */
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am_hal_ctimer_period_set(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA, 3, 1);
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/* Enable the timer A3 to trigger the ADC directly */
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am_hal_ctimer_adc_trigger_enable();
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/* Start the timer */
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//am_hal_ctimer_start(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA);
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}
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/**
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* @brief Initialize the ADC
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*
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* This function initialize the ADC
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*
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* @return None.
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*/
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int rt_hw_adc_init(void)
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{
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am_hal_adc_config_t sADCConfig;
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/* timer for adc init*/
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timerA3_for_adc_init();
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/* Set a pin to act as our ADC input */
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am_hal_gpio_pin_config(BATTERY_GPIO, BATTERY_ADC_PIN);
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/* Enable interrupts */
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am_hal_interrupt_enable(AM_HAL_INTERRUPT_ADC);
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/* Enable the ADC power domain */
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am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_ADC);
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/* Set up the ADC configuration parameters. These settings are reasonable
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for accurate measurements at a low sample rate */
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sADCConfig.ui32Clock = AM_HAL_ADC_CLOCK_HFRC;
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sADCConfig.ui32TriggerConfig = AM_HAL_ADC_TRIGGER_SOFT;
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sADCConfig.ui32Reference = AM_HAL_ADC_REF_INT_2P0;
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sADCConfig.ui32ClockMode = AM_HAL_ADC_CK_LOW_POWER;
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sADCConfig.ui32PowerMode = AM_HAL_ADC_LPMODE_0;
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sADCConfig.ui32Repeat = AM_HAL_ADC_REPEAT;
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am_hal_adc_config(&sADCConfig);
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/* For this example, the samples will be coming in slowly. This means we
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can afford to wake up for every conversion */
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am_hal_adc_int_enable(AM_HAL_ADC_INT_FIFOOVR1);
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/* Set up an ADC slot */
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am_hal_adc_slot_config(BATTERY_ADC_CHANNELNUM, AM_HAL_ADC_SLOT_AVG_1 |
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AM_HAL_ADC_SLOT_14BIT |
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BATTERY_ADC_CHANNEL |
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AM_HAL_ADC_SLOT_ENABLE);
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/* Enable the ADC */
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am_hal_adc_enable();
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rt_kprintf("adc_init!\n");
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return 0;
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}
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#ifdef RT_USING_COMPONENTS_INIT
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif
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#endif
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/*@}*/
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@ -0,0 +1,39 @@
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/*
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* File : adc.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2017-09-18 Haley the first version
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*/
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#ifndef __ADC_H_
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#define __ADC_H_
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#include <rtthread.h>
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/**
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* @brief External function definitions
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*
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*/
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int rt_hw_adc_init(void);
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rt_uint8_t am_adc_data_get(rt_int16_t *buff, rt_uint16_t size);
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void am_adc_start(void);
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void am_adc_stop(void);
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#endif // __ADC_H_
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@ -30,7 +30,6 @@
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#include "hal/am_hal_clkgen.h"
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#include "hal/am_hal_cachectrl.h"
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#include "uart.h"
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#include "led.h"
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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@ -35,12 +35,32 @@
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#define RT_USING_UART0
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//#define RT_USING_UART1
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/* ADC driver select. */
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#define RT_USING_ADC
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/* I2C driver select. */
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#define RT_USING_I2C0
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//#define RT_USING_I2C2
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//#define RT_USING_I2C4
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/* SMBUS driver select. */
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//#define RT_USING_SMBUS
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/* SPI driver select. */
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#define RT_USING_SPI1
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/* LED driver select. */
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#define RT_USING_LED0
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//#define RT_USING_LED1
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//#define RT_USING_LED2
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//#define RT_USING_LED3
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/* PWM driver select. */
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//#define RT_USING_PWM
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/* PDM driver select. */
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//#define RT_USING_PDM
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void rt_hw_board_init(void);
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#endif /* __BOARD_H__ */
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@ -0,0 +1,151 @@
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/*
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* File : flash.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2017-12-04 Haley the first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "am_mcu_apollo.h"
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#include "flash.h"
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/* RT-Thread device interface */
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static rt_err_t rt_flash_init(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_flash_open(rt_device_t dev, rt_uint16_t oflag)
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{
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return RT_EOK;
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}
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static rt_err_t rt_flash_close(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_flash_control(rt_device_t dev, int cmd, void *args)
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{
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uint32_t ui32Critical, i;
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uint32_t ui32CurrentPage, ui32CurrentBlock;
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if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
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{
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struct rt_device_blk_geometry *geometry;
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geometry = (struct rt_device_blk_geometry *)args;
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if (geometry == RT_NULL)
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return -RT_ERROR;
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geometry->bytes_per_sector = 8192;
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geometry->sector_count = 8192;
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geometry->block_size = 8192;
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}
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else if(cmd == RT_DEVICE_CTRL_BLK_ERASE)
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{
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struct rom_control_erase *erase;
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erase = (struct rom_control_erase *)args;
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// Start a critical section.
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ui32Critical = am_hal_interrupt_master_disable();
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if (erase->type == 0x01)
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{
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for(i = 0; i < erase->pagenums; i++)
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{
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// Figure out what page and block we're working on.
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ui32CurrentPage = AM_HAL_FLASH_ADDR2PAGE(erase->addrstart);
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ui32CurrentBlock = AM_HAL_FLASH_ADDR2INST(erase->addrstart);
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am_hal_flash_page_erase(AM_HAL_FLASH_PROGRAM_KEY, ui32CurrentBlock, ui32CurrentPage); //µ¥ÉÈÇø²Á³ýÃüÁî
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erase->addrstart += 8192;
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}
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}
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// Exit the critical section.
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am_hal_interrupt_master_set(ui32Critical);
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}
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return RT_EOK;
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}
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static rt_size_t rt_flash_read(rt_device_t dev,
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rt_off_t pos,
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void* buffer,
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rt_size_t size)
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{
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rt_memcpy((uint8_t *)buffer, (uint8_t *)pos, size);
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return size;
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}
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static rt_size_t rt_flash_write(rt_device_t dev,
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rt_off_t pos,
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const void* buffer,
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rt_size_t size)
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{
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uint32_t ui32Critical;
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uint32_t ui32WordsInBuffer;
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ui32WordsInBuffer = (size + 3)/ 4;
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// Start a critical section.
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ui32Critical = am_hal_interrupt_master_disable();
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// Program the flash page with the data we just received.
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am_hal_flash_program_main(AM_HAL_FLASH_PROGRAM_KEY, (uint32_t *)buffer, (uint32_t *)pos, ui32WordsInBuffer);
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// Exit the critical section.
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am_hal_interrupt_master_set(ui32Critical);
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return size;
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}
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int rt_hw_rom_init(void)
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{
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static struct rt_device device;
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/* register device */
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device.type = RT_Device_Class_Block;
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device.init = rt_flash_init;
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device.open = rt_flash_open;
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device.close = rt_flash_close;
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device.read = rt_flash_read;
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device.write = rt_flash_write;
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device.control = rt_flash_control;
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/* no private */
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device.user_data = RT_NULL;
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/* register the device */
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rt_device_register(&device, "rom", RT_DEVICE_FLAG_RDWR);
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rt_kprintf("register device rom!\r\n");
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return 0;
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}
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#ifdef RT_USING_COMPONENTS_INIT
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INIT_DEVICE_EXPORT(rt_hw_rom_init);
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#endif
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/*@}*/
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@ -0,0 +1,44 @@
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/*
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* File : flash.h
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* This file is part of RT-Thread RTOS
|
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* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
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*/
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#ifndef __FLASH_H_
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#define __FLASH_H_
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#include <rtthread.h>
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/* Erase feature struct define */
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struct rom_control_erase
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{
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rt_uint8_t type;
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rt_uint32_t addrstart;
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rt_uint32_t pagenums;
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};
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/**
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* @brief External function definitions
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*
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*/
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int rt_hw_rom_init(void);
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#endif // __FLASH_H_
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@ -87,13 +87,16 @@ const static struct rt_pin_ops _am_pin_ops =
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am_pin_read,
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};
|
||||
|
||||
int hw_pin_init(void)
|
||||
int rt_hw_pin_init(void)
|
||||
{
|
||||
rt_device_pin_register("pin", &_am_pin_ops, RT_NULL);
|
||||
|
||||
rt_kprintf("pin_init!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
INIT_BOARD_EXPORT(hw_pin_init);
|
||||
INIT_BOARD_EXPORT(rt_hw_pin_init);
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
|
|
|||
|
|
@ -25,6 +25,10 @@
|
|||
#ifndef __GPIO_H
|
||||
#define __GPIO_H
|
||||
|
||||
int hw_pin_init(void);
|
||||
/**
|
||||
* @brief External function definitions
|
||||
*
|
||||
*/
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif // __GPIO_H
|
||||
|
|
|
|||
|
|
@ -0,0 +1,231 @@
|
|||
/*
|
||||
* File :_i2c.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "board.h"
|
||||
|
||||
/* I2C0 */
|
||||
#define AM_I2C0_IOM_INST 0
|
||||
|
||||
#define I2C0_GPIO_SCL 5
|
||||
#define I2C0_GPIO_CFG_SCK AM_HAL_PIN_5_M0SCL
|
||||
#define I2C0_GPIO_SDA 6
|
||||
#define I2C0_GPIO_CFG_SDA AM_HAL_PIN_6_M0SDA
|
||||
|
||||
/* I2C2 */
|
||||
#define AM_I2C2_IOM_INST 2
|
||||
|
||||
#define I2C2_GPIO_SCL 27
|
||||
#define I2C2_GPIO_CFG_SCK AM_HAL_PIN_27_M2SCL
|
||||
#define I2C2_GPIO_SDA 25
|
||||
#define I2C2_GPIO_CFG_SDA AM_HAL_PIN_25_M2SDA
|
||||
|
||||
/* I2C4 */
|
||||
#define AM_I2C4_IOM_INST 4
|
||||
|
||||
#define I2C4_GPIO_SCL 39
|
||||
#define I2C4_GPIO_CFG_SCK AM_HAL_PIN_39_M4SCL
|
||||
#define I2C4_GPIO_SDA 40
|
||||
#define I2C4_GPIO_CFG_SDA AM_HAL_PIN_40_M4SDA
|
||||
|
||||
static am_hal_iom_config_t g_sIOMConfig =
|
||||
{
|
||||
AM_HAL_IOM_I2CMODE, // ui32InterfaceMode
|
||||
AM_HAL_IOM_100KHZ, // ui32ClockFrequency
|
||||
0, // bSPHA
|
||||
0, // bSPOL
|
||||
4, // ui8WriteThreshold
|
||||
60, // ui8ReadThreshold
|
||||
};
|
||||
|
||||
/* AM i2c driver */
|
||||
struct am_i2c_bus
|
||||
{
|
||||
struct rt_i2c_bus_device parent;
|
||||
rt_uint32_t u32Module;
|
||||
};
|
||||
|
||||
//connect am drv to rt drv.
|
||||
rt_size_t rt_i2c_master_xfer(struct rt_i2c_bus_device *bus,
|
||||
struct rt_i2c_msg *msgs,
|
||||
rt_uint32_t num)
|
||||
{
|
||||
struct am_i2c_bus * am_i2c_bus = (struct am_i2c_bus *)bus;
|
||||
struct rt_i2c_msg *msg;
|
||||
int i;
|
||||
rt_int32_t ret = RT_EOK;
|
||||
|
||||
for (i = 0; i < num; i++)
|
||||
{
|
||||
msg = &msgs[i];
|
||||
if (msg->flags == RT_I2C_RD)
|
||||
{
|
||||
am_hal_iom_i2c_read(am_i2c_bus->u32Module, msg->addr, (uint32_t *)msg->buf, msg->len, AM_HAL_IOM_RAW);
|
||||
}
|
||||
else if(msg->flags == RT_I2C_WR)
|
||||
{
|
||||
am_hal_iom_i2c_write(am_i2c_bus->u32Module, msg->addr, (uint32_t *)msg->buf, msg->len, AM_HAL_IOM_RAW);
|
||||
}
|
||||
|
||||
ret++;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
rt_err_t rt_i2c_bus_control(struct rt_i2c_bus_device *bus,
|
||||
rt_uint32_t cmd,
|
||||
rt_uint32_t arg)
|
||||
{
|
||||
struct am_i2c_bus * am_i2c_bus = (struct am_i2c_bus *)bus;
|
||||
//rt_uint32_t ctrl_arg = (rt_uint32_t)(arg);
|
||||
|
||||
RT_ASSERT(bus != RT_NULL);
|
||||
am_i2c_bus = (struct am_i2c_bus *)bus->parent.user_data;
|
||||
|
||||
RT_ASSERT(am_i2c_bus != RT_NULL);
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
/* I2C config */
|
||||
case RT_DEVICE_CTRL_CONFIG :
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static const struct rt_i2c_bus_device_ops am_i2c_ops =
|
||||
{
|
||||
rt_i2c_master_xfer,
|
||||
RT_NULL,
|
||||
rt_i2c_bus_control
|
||||
};
|
||||
|
||||
#ifdef RT_USING_I2C0
|
||||
static struct am_i2c_bus am_i2c_bus_0 =
|
||||
{
|
||||
{0},
|
||||
AM_I2C0_IOM_INST
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_I2C1
|
||||
static struct am_i2c_bus am_i2c_bus_1 =
|
||||
{
|
||||
{0},
|
||||
AM_I2C1_IOM_INST
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_I2C2
|
||||
static struct am_i2c_bus am_i2c_bus_2 =
|
||||
{
|
||||
{1},
|
||||
AM_I2C2_IOM_INST
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_I2C3
|
||||
static struct am_i2c_bus am_i2c_bus_3 =
|
||||
{
|
||||
{2},
|
||||
AM_I2C3_IOM_INST
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_I2C4
|
||||
static struct am_i2c_bus am_i2c_bus_4 =
|
||||
{
|
||||
{3},
|
||||
AM_I2C4_IOM_INST
|
||||
};
|
||||
#endif
|
||||
|
||||
int rt_i2c_init(void)
|
||||
{
|
||||
struct am_i2c_bus* am_i2c;
|
||||
|
||||
#ifdef RT_USING_I2C0
|
||||
/* init i2c gpio */
|
||||
am_hal_gpio_pin_config(I2C0_GPIO_SCL, I2C0_GPIO_CFG_SCK | AM_HAL_GPIO_PULL6K);
|
||||
am_hal_gpio_pin_config(I2C0_GPIO_SDA, I2C0_GPIO_CFG_SDA | AM_HAL_GPIO_PULL6K);
|
||||
|
||||
/* Initialize IOM 0 in I2C mode at 100KHz */
|
||||
am_hal_iom_pwrctrl_enable(AM_I2C0_IOM_INST);
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_100KHZ;
|
||||
am_hal_iom_config(AM_I2C0_IOM_INST, &g_sIOMConfig);
|
||||
am_hal_iom_enable(AM_I2C0_IOM_INST);
|
||||
|
||||
/* init i2c bus device */
|
||||
am_i2c = &am_i2c_bus_0;
|
||||
am_i2c->parent.ops = &am_i2c_ops;
|
||||
rt_i2c_bus_device_register(&am_i2c->parent, "i2c0");
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_I2C2
|
||||
/* init i2c gpio */
|
||||
am_hal_gpio_pin_config(I2C2_GPIO_SCL, I2C2_GPIO_CFG_SCK | AM_HAL_GPIO_PULL6K);
|
||||
am_hal_gpio_pin_config(I2C2_GPIO_SDA, I2C2_GPIO_CFG_SDA | AM_HAL_GPIO_PULL6K);
|
||||
|
||||
/* Initialize IOM 2 in I2C mode at 400KHz */
|
||||
am_hal_iom_pwrctrl_enable(AM_I2C2_IOM_INST);
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_400KHZ;
|
||||
am_hal_iom_config(AM_I2C2_IOM_INST, &g_sIOMConfig);
|
||||
am_hal_iom_enable(AM_I2C2_IOM_INST);
|
||||
|
||||
/* init i2c bus device */
|
||||
am_i2c = &am_i2c_bus_2;
|
||||
am_i2c->parent.ops = &am_i2c_ops;
|
||||
rt_i2c_bus_device_register(&am_i2c->parent, "i2c2");
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_I2C4
|
||||
/* init i2c gpio */
|
||||
am_hal_gpio_pin_config(I2C4_GPIO_SCL, I2C4_GPIO_CFG_SCK | AM_HAL_GPIO_PULL6K);
|
||||
am_hal_gpio_pin_config(I2C4_GPIO_SDA, I2C4_GPIO_CFG_SDA | AM_HAL_GPIO_PULL6K);
|
||||
|
||||
/* Initialize IOM 4 in I2C mode at 400KHz */
|
||||
am_hal_iom_pwrctrl_enable(AM_I2C4_IOM_INST);
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_400KHZ;
|
||||
am_hal_iom_config(AM_I2C4_IOM_INST, &g_sIOMConfig);
|
||||
am_hal_iom_enable(AM_I2C4_IOM_INST);
|
||||
|
||||
/* init i2c bus device */
|
||||
am_i2c = &am_i2c_bus_4;
|
||||
am_i2c->parent.ops = &am_i2c_ops;
|
||||
rt_i2c_bus_device_register(&am_i2c->parent, "i2c4");
|
||||
#endif
|
||||
|
||||
rt_kprintf("i2c_init!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
INIT_BOARD_EXPORT(rt_i2c_init);
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* File : i2c.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#ifndef __I2C_H_
|
||||
#define __I2C_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
/**
|
||||
* @brief External function definitions
|
||||
*
|
||||
*/
|
||||
int rt_hw_i2c_init(void);
|
||||
|
||||
#endif // __I2C_H_
|
||||
|
|
@ -24,7 +24,6 @@
|
|||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "board.h"
|
||||
|
||||
#define AM_GPIO_LED0 46
|
||||
|
|
@ -128,14 +127,18 @@ int rt_hw_led_init(void)
|
|||
rt_hw_led_off(3);
|
||||
#endif /* RT_USING_LED1 */
|
||||
#endif
|
||||
|
||||
rt_kprintf("led_init!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
INIT_BOARD_EXPORT(rt_hw_led_init);
|
||||
INIT_DEVICE_EXPORT(rt_hw_led_init);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
#include <finsh.h>
|
||||
|
||||
void led(rt_uint32_t led, rt_uint32_t state)
|
||||
{
|
||||
/* set led status */
|
||||
|
|
|
|||
|
|
@ -21,9 +21,9 @@
|
|||
* Date Author Notes
|
||||
* 2017-09-14 Haley the first version
|
||||
*/
|
||||
|
||||
#ifndef __HW_LED_H
|
||||
#define __HW_LED_H
|
||||
|
||||
#ifndef __LED_H
|
||||
#define __LED_H
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
|
|
@ -35,4 +35,4 @@ void rt_hw_led_init(void);
|
|||
void rt_hw_led_on(rt_uint8_t LEDNum);
|
||||
void rt_hw_led_off(rt_uint8_t LEDNum);
|
||||
|
||||
#endif // __HW_LED_H
|
||||
#endif // __LED_H
|
||||
|
|
|
|||
|
|
@ -0,0 +1,271 @@
|
|||
/*
|
||||
* File :_pdm.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "board.h"
|
||||
|
||||
#ifdef RT_USING_PDM
|
||||
|
||||
/* sem define */
|
||||
rt_sem_t pdmsem = RT_NULL;
|
||||
|
||||
#define NWA_FRAME_MS 10
|
||||
#define NWA_FRAME_SAMPLES (16*NWA_FRAME_MS) /* 16k, 16bit, mono audio data */
|
||||
#define PDM_FIFO_THRESHOLD NWA_FRAME_SAMPLES
|
||||
|
||||
#define PDM_GPIO_CLK 22
|
||||
#define PDM_GPIO_CFG_CLK AM_HAL_PIN_22_PDM_CLK
|
||||
#define PDM_GPIO_DATA 23
|
||||
#define PDM_GPIO_CFG_DATA AM_HAL_PIN_23_PDM_DATA
|
||||
|
||||
#define PING_PONG_BUF_SIZE 8000*NWA_FRAME_MS
|
||||
static rt_uint16_t am_pdm_buffer_pool[PING_PONG_BUF_SIZE];
|
||||
static rt_uint8_t pdm_flag = 0;
|
||||
static rt_uint16_t pdm_cnt = 0;
|
||||
|
||||
|
||||
static am_hal_pdm_config_t g_sPDMConfig =
|
||||
{
|
||||
AM_HAL_PDM_PCFG_LRSWAP_DISABLE | AM_HAL_PDM_PCFG_RIGHT_PGA_P105DB | AM_HAL_PDM_PCFG_LEFT_PGA_P105DB
|
||||
| AM_HAL_PDM_PCFG_MCLKDIV_DIV1 | AM_HAL_PDM_PCFG_SINC_RATE(48) | AM_HAL_PDM_PCFG_ADCHPD_ENABLE
|
||||
| AM_HAL_PDM_PCFG_HPCUTOFF(0xB) | AM_HAL_PDM_PCFG_CYCLES(0x1) | AM_HAL_PDM_PCFG_SOFTMUTE_DISABLE
|
||||
| AM_HAL_PDM_PCFG_PDMCORE_ENABLE, /* Set the PDM configuration */
|
||||
AM_REG_PDM_VCFG_IOCLKEN_EN | AM_HAL_PDM_VCFG_RSTB_NORMAL | AM_REG_PDM_VCFG_PDMCLKSEL_750KHz
|
||||
| AM_HAL_PDM_VCFG_PDMCLK_ENABLE | AM_HAL_PDM_VCFG_I2SMODE_DISABLE | AM_HAL_PDM_VCFG_BCLKINV_DISABLE
|
||||
| AM_HAL_PDM_VCFG_DMICDEL_DISABLE | AM_HAL_PDM_VCFG_SELAP_INTERNAL | AM_HAL_PDM_VCFG_PACK_DISABLE
|
||||
| AM_HAL_PDM_VCFG_CHANNEL_RIGHT, /* Set the Voice Configuration */
|
||||
PDM_FIFO_THRESHOLD, /* Select the FIFO PCM sample threshold */
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Get the pdm data.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* This function Get the pdm data.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size)
|
||||
{
|
||||
uint8_t temp;
|
||||
int i;
|
||||
|
||||
/* wait adc interrupt release sem forever */
|
||||
rt_sem_take(pdmsem, RT_WAITING_FOREVER);
|
||||
|
||||
for(i = 0; i < PING_PONG_BUF_SIZE; i++)
|
||||
{
|
||||
temp = (uint8_t)(am_pdm_buffer_pool[i] & 0xFF);
|
||||
/* lower byte */
|
||||
while ( AM_BFRn(UART, 0, FR, TXFF) );
|
||||
AM_REGn(UART, 0, DR) = temp;
|
||||
|
||||
temp = (uint8_t)((am_pdm_buffer_pool[i] & 0xFF00)>>8);
|
||||
/* higher byte */
|
||||
while ( AM_BFRn(UART, 0, FR, TXFF) );
|
||||
AM_REGn(UART, 0, DR) = temp;
|
||||
}
|
||||
/* copy the data */
|
||||
//rt_memcpy(buff, am_pdm_buffer_pool, size*sizeof(rt_uint16_t));
|
||||
|
||||
pdm_flag = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start the pdm.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* This function Start the pdm.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
void am_pdm_start(void)
|
||||
{
|
||||
/* adcsem create */
|
||||
pdmsem = rt_sem_create("pdmsem", 0, RT_IPC_FLAG_FIFO);
|
||||
|
||||
/* Enable PDM */
|
||||
am_hal_pdm_enable();
|
||||
am_hal_interrupt_enable(AM_HAL_INTERRUPT_PDM);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stop the pdm.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* This function Stop the pdm.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
void am_pdm_stop(void)
|
||||
{
|
||||
/* Disable PDM */
|
||||
am_hal_pdm_disable();
|
||||
am_hal_interrupt_disable(AM_HAL_INTERRUPT_PDM);
|
||||
|
||||
/* adcsem delete */
|
||||
rt_sem_delete(pdmsem);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the pdm left gain.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* This function Get the pdm left gain.
|
||||
*
|
||||
* @return gain_val.
|
||||
*/
|
||||
uint8_t am_pdm_left_gain_get(void)
|
||||
{
|
||||
/* get the left gain */
|
||||
return am_hal_pdm_left_gain_get();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the pdm left gain.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* This function Set the pdm left gain.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
void am_pdm_left_gain_set(uint8_t gain_val)
|
||||
{
|
||||
/* set the left gain */
|
||||
am_hal_pdm_left_gain_set(gain_val);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the pdm right gain.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* This function Get the pdm right gain.
|
||||
*
|
||||
* @return gain_val.
|
||||
*/
|
||||
uint8_t am_pdm_right_gain_get(void)
|
||||
{
|
||||
/* get the right gain */
|
||||
return am_hal_pdm_right_gain_get();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the pdm right gain.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* This function Set the pdm right gain.
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
void am_pdm_right_gain_set(uint8_t gain_val)
|
||||
{
|
||||
/* set the right gain */
|
||||
am_hal_pdm_right_gain_set(gain_val);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Interrupt handler for the PDM
|
||||
*
|
||||
* This function is Interrupt handler for the PDM
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
void am_pdm_isr (void)
|
||||
{
|
||||
uint32_t ui32FifoData;
|
||||
int i;
|
||||
|
||||
/* Clear the PDM interrupt */
|
||||
am_hal_pdm_int_clear(AM_HAL_PDM_INT_UNDFL | AM_HAL_PDM_INT_OVF | AM_HAL_PDM_INT_FIFO);
|
||||
|
||||
for (i = 0; i < PDM_FIFO_THRESHOLD; i++) /* adjust as needed */
|
||||
{
|
||||
ui32FifoData = am_hal_pdm_fifo_data_read();
|
||||
|
||||
if(pdm_flag == 0)
|
||||
{
|
||||
am_pdm_buffer_pool[pdm_cnt * PDM_FIFO_THRESHOLD + i] = (uint16_t)ui32FifoData;
|
||||
}
|
||||
}
|
||||
|
||||
if(pdm_flag == 0)
|
||||
pdm_cnt ++;
|
||||
|
||||
if(pdm_cnt == PING_PONG_BUF_SIZE/PDM_FIFO_THRESHOLD) /* 500 means 10 second logging under 8k sampling rate */
|
||||
{
|
||||
pdm_cnt = 0;
|
||||
pdm_flag = 1;
|
||||
|
||||
/* release pdmsem */
|
||||
rt_sem_release(pdmsem);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initialize the PDM
|
||||
*
|
||||
* This function initialize the PDM
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
int rt_hw_pdm_init(void)
|
||||
{
|
||||
/* Enable power to modules used */
|
||||
am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_PDM);
|
||||
|
||||
/* Enable the PDM clock and data */
|
||||
am_hal_gpio_pin_config(PDM_GPIO_CLK, PDM_GPIO_CFG_CLK | AM_HAL_GPIO_HIGH_DRIVE);
|
||||
am_hal_gpio_pin_config(PDM_GPIO_DATA, PDM_GPIO_CFG_DATA );
|
||||
|
||||
/* PDM setting */
|
||||
am_hal_pdm_config(&g_sPDMConfig);
|
||||
|
||||
/* Enable PDM interrupts */
|
||||
am_hal_pdm_int_enable(AM_HAL_PDM_INT_FIFO);
|
||||
|
||||
/* Clear PDM interrupts */
|
||||
am_hal_pdm_int_clear(AM_HAL_PDM_INT_UNDFL | AM_HAL_PDM_INT_OVF | AM_HAL_PDM_INT_FIFO);
|
||||
|
||||
rt_kprintf("pdm_init!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
INIT_BOARD_EXPORT(rt_hw_pdm_init);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
/*
|
||||
* File : pdm.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#ifndef __PDM_H_
|
||||
#define __PDM_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
/**
|
||||
* @brief External function definitions
|
||||
*
|
||||
*/
|
||||
int rt_hw_pdm_init(void);
|
||||
rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size);
|
||||
void am_pdm_start(void);
|
||||
void am_pdm_stop(void);
|
||||
|
||||
#endif // __PDM_H_
|
||||
|
|
@ -0,0 +1,120 @@
|
|||
/*
|
||||
* File :_pwm.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "board.h"
|
||||
|
||||
#ifdef RT_USING_PWM
|
||||
|
||||
// LED3 is pin 19
|
||||
#define AM_BSP_GPIO_PWM_LED 19
|
||||
#define AM_BSP_GPIO_CFG_PWM_LED AM_HAL_PIN_19_TCTB1
|
||||
|
||||
#define AM_BSP_PWM_LED_TIMER 1
|
||||
#define AM_BSP_PWM_LED_TIMER_SEG AM_HAL_CTIMER_TIMERB
|
||||
#define AM_BSP_PWM_LED_TIMER_INT AM_HAL_CTIMER_INT_TIMERB1
|
||||
|
||||
/**
|
||||
* @brief LED brightness profile
|
||||
*
|
||||
* This function define LED brightness profile
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
volatile uint32_t g_ui32Index = 0;
|
||||
const uint32_t g_pui32Brightness[64] =
|
||||
{
|
||||
1, 1, 1, 2, 3, 4, 6, 8,
|
||||
10, 12, 14, 17, 20, 23, 25, 28,
|
||||
31, 35, 38, 40, 43, 46, 49, 51,
|
||||
53, 55, 57, 59, 60, 61, 62, 62,
|
||||
63, 62, 62, 61, 60, 59, 57, 55,
|
||||
53, 51, 49, 46, 43, 40, 38, 35,
|
||||
32, 28, 25, 23, 20, 17, 14, 12,
|
||||
10, 8, 6, 4, 3, 2, 1, 1
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Interrupt handler for the Timer
|
||||
*
|
||||
* This function is Interrupt handler for the Timer
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
void am_ctimer_isr(void)
|
||||
{
|
||||
/* Clear the interrupt that got us here */
|
||||
am_hal_ctimer_int_clear(AM_BSP_PWM_LED_TIMER_INT);
|
||||
|
||||
/* Now set new PWM half-period for the LED */
|
||||
am_hal_ctimer_period_set(AM_BSP_PWM_LED_TIMER, AM_BSP_PWM_LED_TIMER_SEG,
|
||||
64, g_pui32Brightness[g_ui32Index]);
|
||||
|
||||
/* Set up the LED duty cycle for the next pulse */
|
||||
g_ui32Index = (g_ui32Index + 1) % 64;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initialize the PWM
|
||||
*
|
||||
* This function initialize the PWM
|
||||
*
|
||||
* @return 0.
|
||||
*/
|
||||
int rt_hw_pwm_init(void)
|
||||
{
|
||||
/* init pwm gpio */
|
||||
am_hal_gpio_pin_config(AM_BSP_GPIO_PWM_LED, AM_BSP_GPIO_CFG_PWM_LED);
|
||||
|
||||
/* Configure a timer to drive the LED */
|
||||
am_hal_ctimer_config_single(AM_BSP_PWM_LED_TIMER, AM_BSP_PWM_LED_TIMER_SEG,
|
||||
(AM_HAL_CTIMER_FN_PWM_REPEAT |
|
||||
AM_HAL_CTIMER_XT_2_048KHZ |
|
||||
AM_HAL_CTIMER_INT_ENABLE |
|
||||
AM_HAL_CTIMER_PIN_ENABLE));
|
||||
|
||||
/* Set up initial timer period */
|
||||
am_hal_ctimer_period_set(AM_BSP_PWM_LED_TIMER, AM_BSP_PWM_LED_TIMER_SEG,
|
||||
64, 32);
|
||||
|
||||
/* Enable interrupts for the Timer we are using on this board */
|
||||
am_hal_ctimer_int_enable(AM_BSP_PWM_LED_TIMER_INT);
|
||||
am_hal_interrupt_enable(AM_HAL_INTERRUPT_CTIMER);
|
||||
|
||||
/* Start the timer */
|
||||
am_hal_ctimer_start(AM_BSP_PWM_LED_TIMER, AM_BSP_PWM_LED_TIMER_SEG);
|
||||
|
||||
rt_kprintf("pwm_init!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
INIT_BOARD_EXPORT(rt_hw_pwm_init);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* File : pwm.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#ifndef __PWM_H_
|
||||
#define __PWM_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
/**
|
||||
* @brief External function definitions
|
||||
*
|
||||
*/
|
||||
int rt_hw_pwm_init(void);
|
||||
|
||||
#endif // __PWM_H_
|
||||
|
|
@ -0,0 +1,151 @@
|
|||
/*
|
||||
* File :_rtc.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-11-06 Haley the first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
|
||||
#define XT 1
|
||||
#define LFRC 2
|
||||
|
||||
#define RTC_CLK_SRC XT
|
||||
|
||||
//connect am drv to rt drv.
|
||||
static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
if (dev->rx_indicate != RT_NULL)
|
||||
{
|
||||
/* Open Interrupt */
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
|
||||
{
|
||||
time_t *time;
|
||||
struct tm time_temp;
|
||||
struct tm* time_new;
|
||||
am_hal_rtc_time_t hal_time;
|
||||
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
rt_memset(&time_temp, 0, sizeof(struct tm));
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_RTC_GET_TIME:
|
||||
time = (time_t *)args;
|
||||
|
||||
/* Get the current Time */
|
||||
am_hal_rtc_time_get(&hal_time);
|
||||
|
||||
/* Years since 1900 : 0-99 range */
|
||||
time_temp.tm_year = hal_time.ui32Year + 2000 - 1900;
|
||||
/* Months *since* january 0-11 : RTC_Month_Date_Definitions 1 - 12 */
|
||||
time_temp.tm_mon = hal_time.ui32Month - 1;
|
||||
/* Day of the month 1-31 : 1-31 range */
|
||||
time_temp.tm_mday = hal_time.ui32DayOfMonth;
|
||||
/* Hours since midnight 0-23 : 0-23 range */
|
||||
time_temp.tm_hour = hal_time.ui32Hour;
|
||||
/* Minutes 0-59 : the 0-59 range */
|
||||
time_temp.tm_min = hal_time.ui32Minute;
|
||||
/* Seconds 0-59 : the 0-59 range */
|
||||
time_temp.tm_sec = hal_time.ui32Second;
|
||||
|
||||
*time = mktime(&time_temp);
|
||||
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_RTC_SET_TIME:
|
||||
time = (time_t *)args;
|
||||
time_new = localtime(time);
|
||||
|
||||
hal_time.ui32Hour = time_new->tm_hour;
|
||||
hal_time.ui32Minute = time_new->tm_min;
|
||||
hal_time.ui32Second = time_new->tm_sec;
|
||||
hal_time.ui32Hundredths = 00;
|
||||
hal_time.ui32Weekday = time_new->tm_wday;
|
||||
hal_time.ui32DayOfMonth = time_new->tm_mday;
|
||||
hal_time.ui32Month = time_new->tm_mon + 1;
|
||||
hal_time.ui32Year = time_new->tm_year + 1900 - 2000;
|
||||
hal_time.ui32Century = 0;
|
||||
|
||||
am_hal_rtc_time_set(&hal_time);
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
int rt_hw_rtc_init(void)
|
||||
{
|
||||
static struct rt_device rtc;
|
||||
|
||||
#if RTC_CLK_SRC == LFRC
|
||||
/* Enable the LFRC for the RTC */
|
||||
am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_LFRC);
|
||||
|
||||
/* Select LFRC for RTC clock source */
|
||||
am_hal_rtc_osc_select(AM_HAL_RTC_OSC_LFRC);
|
||||
#endif
|
||||
|
||||
#if RTC_CLK_SRC == XT
|
||||
/* Enable the XT for the RTC */
|
||||
//am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_LFRC);
|
||||
am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_XT);
|
||||
|
||||
/* Select XT for RTC clock source */
|
||||
am_hal_rtc_osc_select(AM_HAL_RTC_OSC_XT);
|
||||
#endif
|
||||
|
||||
/* Enable the RTC */
|
||||
am_hal_rtc_osc_enable();
|
||||
|
||||
/* register rtc device */
|
||||
rtc.type = RT_Device_Class_RTC;
|
||||
rtc.init = RT_NULL;
|
||||
rtc.open = rt_rtc_open;
|
||||
rtc.close = RT_NULL;
|
||||
rtc.read = rt_rtc_read;
|
||||
rtc.write = RT_NULL;
|
||||
rtc.control = rt_rtc_control;
|
||||
|
||||
/* no private */
|
||||
rtc.user_data = RT_NULL;
|
||||
|
||||
rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
INIT_BOARD_EXPORT(rt_hw_rtc_init);
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* File : rtc.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-09-14 Haley the first version
|
||||
*/
|
||||
|
||||
#ifndef __RTC_H
|
||||
#define __RTC_H
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
/**
|
||||
* @brief External function definitions
|
||||
*
|
||||
*/
|
||||
int rt_hw_rtc_init(void);
|
||||
|
||||
#endif // __RTC_H
|
||||
|
|
@ -0,0 +1,251 @@
|
|||
/*
|
||||
* File : smbus.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "board.h"
|
||||
|
||||
#ifdef RT_USING_SMBUS
|
||||
|
||||
#define SMBUS_GPIO_SDA 5
|
||||
#define SMBUS_GPIO_SCL 6
|
||||
|
||||
#define mSDA_LOW() am_hal_gpio_out_bit_clear(SMBUS_GPIO_SCL) /* Clear SDA line */
|
||||
#define mSDA_HIGH() am_hal_gpio_out_bit_set(SMBUS_GPIO_SCL) /* Set SDA line */
|
||||
#define mSCL_LOW() am_hal_gpio_out_bit_clear(SMBUS_GPIO_SDA) /* Clear SCL line */
|
||||
#define mSCL_HIGH() am_hal_gpio_out_bit_set(SMBUS_GPIO_SDA) /* Set SCL line */
|
||||
|
||||
#define mSDA_READ() am_hal_gpio_input_bit_read(SMBUS_GPIO_SCL) /* Read SCL line */
|
||||
|
||||
#define mSDA_IN() am_hal_gpio_pin_config(SMBUS_GPIO_SCL, AM_HAL_GPIO_INPUT | AM_HAL_GPIO_PULL6K) /* Set SDA as Input */
|
||||
#define mSDA_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_SCL, AM_HAL_GPIO_OUTPUT) /* Set SDA as Output */
|
||||
#define mSCL_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_SDA, AM_HAL_GPIO_OUTPUT) /* Set SCL as Output */
|
||||
|
||||
#define ACK 0
|
||||
#define NACK 1
|
||||
|
||||
/* SCL keep time */
|
||||
static void keep_delay(void)
|
||||
{
|
||||
int i;
|
||||
for(i = 0; i < 30; i++)
|
||||
__nop();
|
||||
}
|
||||
|
||||
static void few_delay(void)
|
||||
{
|
||||
__nop();
|
||||
__nop();
|
||||
}
|
||||
|
||||
static rt_uint8_t am_smbus_send_bit(rt_uint8_t send_bit)
|
||||
{
|
||||
mSDA_OUT();
|
||||
few_delay();
|
||||
|
||||
if(send_bit) /* Send a bit */
|
||||
mSDA_HIGH();
|
||||
else
|
||||
mSDA_LOW();
|
||||
|
||||
mSCL_HIGH(); /* High Level of Clock Pulse */
|
||||
keep_delay();
|
||||
|
||||
mSCL_LOW();
|
||||
keep_delay();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_uint8_t am_smbus_read_bit(void)
|
||||
{
|
||||
rt_uint8_t read_bit;
|
||||
|
||||
mSDA_IN();
|
||||
few_delay();
|
||||
|
||||
mSCL_HIGH(); /* High Level of Clock Pulse */
|
||||
keep_delay();
|
||||
|
||||
read_bit = mSDA_READ(); /* Read a bit, save it in Read_bit */
|
||||
|
||||
mSCL_LOW();
|
||||
keep_delay();
|
||||
|
||||
return read_bit;
|
||||
}
|
||||
|
||||
static void am_smbus_start_bit(void)
|
||||
{
|
||||
mSDA_OUT();
|
||||
mSDA_HIGH(); /* Generate bus free time between Stop */
|
||||
keep_delay();
|
||||
mSCL_HIGH();
|
||||
keep_delay();
|
||||
|
||||
mSDA_LOW(); /* Hold time after (Repeated) Start */
|
||||
keep_delay();
|
||||
|
||||
mSCL_LOW();
|
||||
keep_delay();
|
||||
}
|
||||
|
||||
static void am_smbus_stop_bit(void)
|
||||
{
|
||||
mSDA_OUT();
|
||||
mSDA_HIGH(); /* Generate bus free time between Stop */
|
||||
keep_delay();
|
||||
mSCL_LOW();
|
||||
keep_delay();
|
||||
|
||||
mSDA_LOW(); /* Hold time after Stop */
|
||||
keep_delay();
|
||||
|
||||
mSCL_HIGH(); /* For sleep mode(SCL needs to be high during Sleep.) */
|
||||
keep_delay();
|
||||
}
|
||||
|
||||
static rt_uint8_t am_smbus_tx_byte(rt_uint8_t tx_byte)
|
||||
{
|
||||
int i;
|
||||
rt_uint8_t ack_bit;
|
||||
rt_uint8_t bit_out;
|
||||
|
||||
for(i = 0; i < 8; i++)
|
||||
{
|
||||
if(tx_byte&0x80)
|
||||
bit_out = 1; /* If the current bit of Tx_buffer is 1 set bit_out */
|
||||
else
|
||||
bit_out = 0; /* else clear bit_out */
|
||||
|
||||
am_smbus_send_bit(bit_out); /* Send the current bit on SDA */
|
||||
tx_byte <<= 1; /* Get next bit for checking */
|
||||
}
|
||||
|
||||
ack_bit = am_smbus_read_bit(); /* Get acknowledgment bit */
|
||||
|
||||
return ack_bit;
|
||||
}
|
||||
|
||||
static rt_uint8_t am_smbus_rx_byte(rt_uint8_t ack_nack)
|
||||
{
|
||||
int i;
|
||||
rt_uint8_t rx_byte;
|
||||
|
||||
for(i = 0; i < 8; i++)
|
||||
{
|
||||
if(am_smbus_read_bit()) /* Get a bit from the SDA line */
|
||||
{
|
||||
rx_byte <<= 1; /* If the bit is HIGH save 1 in RX_buffer */
|
||||
rx_byte |=0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
rx_byte <<= 1; /* If the bit is LOW save 0 in RX_buffer */
|
||||
rx_byte &=0xfe;
|
||||
}
|
||||
}
|
||||
am_smbus_send_bit(ack_nack); /* Sends acknowledgment bit */
|
||||
|
||||
return rx_byte;
|
||||
}
|
||||
|
||||
rt_uint8_t am_smbus_tx_then_tx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_uint8_t* pBuffer, rt_uint16_t bytesNumber)
|
||||
{
|
||||
int i;
|
||||
|
||||
am_smbus_start_bit(); /* Start condition */
|
||||
|
||||
if(am_smbus_tx_byte(SlaveAddress)) /* Send SlaveAddress and write */
|
||||
return 1;
|
||||
|
||||
if(am_smbus_tx_byte(command)) /* Send command */
|
||||
return 1;
|
||||
|
||||
for(i = 0; i < bytesNumber; i++)
|
||||
{
|
||||
am_smbus_tx_byte(pBuffer[i]); /* Write data, slave must send ACK */
|
||||
}
|
||||
|
||||
am_smbus_stop_bit(); /* Stop condition */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
rt_uint8_t am_smbus_tx_then_rx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_uint8_t* pBuffer, rt_uint16_t bytesNumber)
|
||||
{
|
||||
int i;
|
||||
|
||||
am_smbus_start_bit(); /* Start condition */
|
||||
|
||||
if(am_smbus_tx_byte(SlaveAddress)) /* Send SlaveAddress and write */
|
||||
return 1;
|
||||
|
||||
if(am_smbus_tx_byte(command)) /* Send command */
|
||||
return 1;
|
||||
|
||||
am_smbus_start_bit(); /* Repeated Start condition */
|
||||
|
||||
if(am_smbus_tx_byte(SlaveAddress | 0x01)) /* Send SlaveAddress and read */
|
||||
return 1;
|
||||
|
||||
for(i = 0; i < bytesNumber; i++)
|
||||
{
|
||||
pBuffer[i] = am_smbus_rx_byte(ACK); /* Read data, master must send ACK */
|
||||
}
|
||||
|
||||
am_smbus_stop_bit(); /* Stop condition */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void am_smbus_scl_high(void)
|
||||
{
|
||||
mSCL_HIGH(); /* For sleep mode(SCL needs to be high during Sleep.) */
|
||||
keep_delay();
|
||||
}
|
||||
|
||||
void am_smbus_scl_low(void)
|
||||
{
|
||||
mSCL_LOW(); /* For sleep mode(SCL needs to be high during Sleep.) */
|
||||
keep_delay();
|
||||
}
|
||||
|
||||
int rt_hw_smbus_init(void)
|
||||
{
|
||||
mSDA_OUT();
|
||||
mSCL_OUT();
|
||||
mSDA_HIGH(); /* bus free */
|
||||
mSCL_HIGH();
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
INIT_BOARD_EXPORT(rt_hw_smbus_init);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
/*
|
||||
* File : smbus.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#ifndef __SMBUS_H_
|
||||
#define __SMBUS_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
/**
|
||||
* @brief External function definitions
|
||||
*
|
||||
*/
|
||||
int rt_hw_smbus_init(void);
|
||||
rt_uint8_t am_smbus_tx_then_tx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_uint8_t* pBuffer, rt_uint16_t bytesNumber);
|
||||
rt_uint8_t am_smbus_tx_then_rx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_uint8_t* pBuffer, rt_uint16_t bytesNumber);
|
||||
void am_smbus_scl_high(void);
|
||||
void am_smbus_scl_low(void);
|
||||
|
||||
#endif // __SMBUS_H_
|
||||
|
|
@ -0,0 +1,297 @@
|
|||
/*
|
||||
* File : spi.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "board.h"
|
||||
#include "spi.h"
|
||||
|
||||
/* SPI1 */
|
||||
#define AM_SPI0_IOM_INST 0
|
||||
|
||||
#define SPI0_GPIO_SCK 5
|
||||
#define SPI0_GPIO_CFG_SCK AM_HAL_PIN_5_M0SCK
|
||||
#define SPI0_GPIO_MISO 6
|
||||
#define SPI0_GPIO_CFG_MISO AM_HAL_PIN_6_M0MISO
|
||||
#define SPI0_GPIO_MOSI 7
|
||||
#define SPI0_GPIO_CFG_MOSI AM_HAL_PIN_7_M0MOSI
|
||||
|
||||
/* SPI2 */
|
||||
#define AM_SPI1_IOM_INST 1
|
||||
|
||||
static am_hal_iom_config_t g_sIOMConfig =
|
||||
{
|
||||
AM_HAL_IOM_SPIMODE, // ui32InterfaceMode
|
||||
AM_HAL_IOM_8MHZ, // ui32ClockFrequency
|
||||
0, // bSPHA
|
||||
0, // bSPOL
|
||||
4, // ui8WriteThreshold
|
||||
60, // ui8ReadThreshold
|
||||
};
|
||||
|
||||
/* AM spi driver */
|
||||
struct am_spi_bus
|
||||
{
|
||||
struct rt_spi_bus parent;
|
||||
rt_uint32_t u32Module;
|
||||
};
|
||||
|
||||
//connect am drv to rt drv.
|
||||
static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration)
|
||||
{
|
||||
struct am_spi_bus * am_spi_bus = (struct am_spi_bus *)device->bus;
|
||||
rt_uint32_t max_hz = configuration->max_hz;
|
||||
|
||||
if(max_hz >= 8000000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_8MHZ;
|
||||
}
|
||||
else if(max_hz >= 6000000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_6MHZ;
|
||||
}
|
||||
else if(max_hz >= 4000000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_4MHZ;
|
||||
}
|
||||
else if(max_hz >= 3000000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_3MHZ;
|
||||
}
|
||||
else if(max_hz >= 2000000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_2MHZ;
|
||||
}
|
||||
else if(max_hz >= 1500000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_1_5MHZ;
|
||||
}
|
||||
else if(max_hz >= 1000000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_1MHZ;
|
||||
}
|
||||
else if(max_hz >= 750000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_750KHZ;
|
||||
}
|
||||
else if(max_hz >= 500000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_500KHZ;
|
||||
}
|
||||
else if(max_hz >= 400000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_400KHZ;
|
||||
}
|
||||
else if(max_hz >= 375000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_375KHZ;
|
||||
}
|
||||
else if(max_hz >= 250000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_250KHZ;
|
||||
}
|
||||
else if(max_hz >= 100000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_100KHZ;
|
||||
}
|
||||
else if(max_hz >= 50000)
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_50KHZ;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_sIOMConfig.ui32ClockFrequency = AM_HAL_IOM_10KHZ;
|
||||
}
|
||||
|
||||
/* CPOL */
|
||||
if(configuration->mode & RT_SPI_CPOL)
|
||||
{
|
||||
g_sIOMConfig.bSPOL = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_sIOMConfig.bSPOL = 0;
|
||||
}
|
||||
|
||||
/* CPHA */
|
||||
if(configuration->mode & RT_SPI_CPHA)
|
||||
{
|
||||
g_sIOMConfig.bSPHA= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_sIOMConfig.bSPHA= 0;
|
||||
}
|
||||
|
||||
/* init SPI */
|
||||
am_hal_iom_disable(am_spi_bus->u32Module);
|
||||
am_hal_iom_pwrctrl_enable(am_spi_bus->u32Module);
|
||||
am_hal_iom_config(am_spi_bus->u32Module, &g_sIOMConfig);
|
||||
am_hal_iom_enable(am_spi_bus->u32Module);
|
||||
|
||||
return RT_EOK;
|
||||
};
|
||||
|
||||
static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* message)
|
||||
{
|
||||
struct am_spi_bus * am_spi_bus = (struct am_spi_bus *)device->bus;
|
||||
//struct rt_spi_configuration * config = &device->config;
|
||||
struct am_spi_cs * am_spi_cs = device->parent.user_data;
|
||||
rt_uint32_t * send_ptr = (rt_uint32_t *)message->send_buf;
|
||||
rt_uint32_t * recv_ptr = message->recv_buf;
|
||||
rt_uint32_t u32BytesRemaining = message->length;
|
||||
rt_uint32_t u32TransferSize = 0;
|
||||
|
||||
/* take CS */
|
||||
if (message->cs_take)
|
||||
{
|
||||
;
|
||||
}
|
||||
|
||||
// ¶ÁÊý¾Ý
|
||||
if (recv_ptr != RT_NULL)
|
||||
{
|
||||
u32TransferSize = u32BytesRemaining;
|
||||
|
||||
while (u32BytesRemaining)
|
||||
{
|
||||
/* Set the transfer size to either 64, or the number of remaining
|
||||
bytes, whichever is smaller */
|
||||
if (u32BytesRemaining > 64)
|
||||
{
|
||||
u32TransferSize = 64;
|
||||
am_hal_iom_spi_read(am_spi_bus->u32Module, am_spi_cs->chip_select,
|
||||
(uint32_t *)recv_ptr, u32TransferSize, AM_HAL_IOM_CS_LOW | AM_HAL_IOM_RAW);
|
||||
}
|
||||
else
|
||||
{
|
||||
u32TransferSize = u32BytesRemaining;
|
||||
/* release CS */
|
||||
if(message->cs_release)
|
||||
{
|
||||
am_hal_iom_spi_read(am_spi_bus->u32Module, am_spi_cs->chip_select,
|
||||
(uint32_t *)recv_ptr, u32TransferSize, AM_HAL_IOM_RAW);
|
||||
}
|
||||
else
|
||||
{
|
||||
am_hal_iom_spi_read(am_spi_bus->u32Module, am_spi_cs->chip_select,
|
||||
(uint32_t *)recv_ptr, u32TransferSize, AM_HAL_IOM_CS_LOW | AM_HAL_IOM_RAW);
|
||||
}
|
||||
}
|
||||
|
||||
u32BytesRemaining -= u32TransferSize;
|
||||
recv_ptr = (rt_uint32_t *)((rt_uint32_t)recv_ptr + u32TransferSize);
|
||||
}
|
||||
}
|
||||
|
||||
// дÊý¾Ý
|
||||
else if (send_ptr != RT_NULL)
|
||||
{
|
||||
while (u32BytesRemaining)
|
||||
{
|
||||
/* Set the transfer size to either 32, or the number of remaining
|
||||
bytes, whichever is smaller */
|
||||
if (u32BytesRemaining > 32)
|
||||
{
|
||||
u32TransferSize = 32;
|
||||
am_hal_iom_spi_write(am_spi_bus->u32Module, am_spi_cs->chip_select,
|
||||
(uint32_t *)send_ptr, u32TransferSize, AM_HAL_IOM_CS_LOW | AM_HAL_IOM_RAW);
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
u32TransferSize = u32BytesRemaining;
|
||||
/* release CS */
|
||||
if (message->cs_release)
|
||||
{
|
||||
am_hal_iom_spi_write(am_spi_bus->u32Module, am_spi_cs->chip_select,
|
||||
(uint32_t *)send_ptr, u32TransferSize, AM_HAL_IOM_RAW);
|
||||
}
|
||||
else
|
||||
{
|
||||
am_hal_iom_spi_write(am_spi_bus->u32Module, am_spi_cs->chip_select,
|
||||
(uint32_t *)send_ptr, u32TransferSize, AM_HAL_IOM_CS_LOW | AM_HAL_IOM_RAW);
|
||||
}
|
||||
}
|
||||
|
||||
u32BytesRemaining -= u32TransferSize;
|
||||
send_ptr = (rt_uint32_t *)((rt_uint32_t)send_ptr + u32TransferSize);
|
||||
}
|
||||
}
|
||||
|
||||
return message->length;
|
||||
}
|
||||
|
||||
static const struct rt_spi_ops am_spi_ops =
|
||||
{
|
||||
configure,
|
||||
xfer
|
||||
};
|
||||
|
||||
#ifdef RT_USING_SPI1
|
||||
static struct am_spi_bus am_spi_bus_1 =
|
||||
{
|
||||
{0},
|
||||
AM_SPI0_IOM_INST
|
||||
};
|
||||
#endif /* #ifdef RT_USING_SPI1 */
|
||||
|
||||
#ifdef RT_USING_SPI2
|
||||
static struct ambiq_spi_bus ambiq_spi_bus_2 =
|
||||
{
|
||||
{1},
|
||||
AM_SPI1_IOM_INST
|
||||
};
|
||||
#endif /* #ifdef RT_USING_SPI2 */
|
||||
|
||||
int yr_hw_spi_init(void)
|
||||
{
|
||||
struct am_spi_bus* am_spi;
|
||||
|
||||
#ifdef RT_USING_SPI1
|
||||
/* init spi gpio */
|
||||
am_hal_gpio_pin_config(SPI0_GPIO_SCK, SPI0_GPIO_CFG_SCK);
|
||||
am_hal_gpio_pin_config(SPI0_GPIO_MISO, SPI0_GPIO_CFG_MISO);
|
||||
am_hal_gpio_pin_config(SPI0_GPIO_MOSI, SPI0_GPIO_CFG_MOSI);
|
||||
|
||||
/* Initialize IOM 0 in SPI mode at 100KHz */
|
||||
am_hal_iom_pwrctrl_enable(AM_SPI0_IOM_INST);
|
||||
am_hal_iom_config(AM_SPI0_IOM_INST, &g_sIOMConfig);
|
||||
am_hal_iom_enable(AM_SPI0_IOM_INST);
|
||||
|
||||
//init spi bus device
|
||||
am_spi = &am_spi_bus_1;
|
||||
rt_spi_bus_register(&am_spi->parent, "spi1", &am_spi_ops);
|
||||
#endif
|
||||
|
||||
rt_kprintf("spi init!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
INIT_BOARD_EXPORT(yr_hw_spi_init);
|
||||
#endif
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* File : spi.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-12-04 Haley the first version
|
||||
*/
|
||||
|
||||
#ifndef __SPI_H_
|
||||
#define __SPI_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
/* ƬѡÐźŽṹÉùÃ÷ */
|
||||
struct am_spi_cs
|
||||
{
|
||||
rt_uint32_t chip_select;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief External function definitions
|
||||
*
|
||||
*/
|
||||
int yr_hw_spi_init(void);
|
||||
|
||||
#endif // __SPI_H_
|
||||
|
|
@ -21,7 +21,8 @@
|
|||
* Date Author Notes
|
||||
* 2017-09-15 Haley the first version
|
||||
*/
|
||||
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "board.h"
|
||||
|
|
@ -42,6 +43,10 @@
|
|||
#define UART1_GPIO_TX 8
|
||||
#define UART1_GPIO_CFG_TX AM_HAL_PIN_8_UART1TX
|
||||
|
||||
#define UART_BUFFER_SIZE 256
|
||||
uint8_t UartRxBuffer[UART_BUFFER_SIZE];
|
||||
uint8_t UartTxBuffer[UART_BUFFER_SIZE];
|
||||
|
||||
/* AM uart driver */
|
||||
struct am_uart
|
||||
{
|
||||
|
|
@ -49,19 +54,6 @@ struct am_uart
|
|||
uint32_t uart_interrupt;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief UART configuration settings
|
||||
*
|
||||
*/
|
||||
am_hal_uart_config_t g_sUartConfig =
|
||||
{
|
||||
115200, // ui32BaudRate
|
||||
AM_HAL_UART_DATA_BITS_8, // ui32DataBits
|
||||
false, // bTwoStopBits
|
||||
AM_HAL_UART_PARITY_NONE, // ui32Parity
|
||||
AM_HAL_UART_FLOW_CTRL_NONE, // ui32FlowCtrl
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Enable the UART
|
||||
*
|
||||
|
|
@ -81,14 +73,14 @@ static void rt_hw_uart_enable(struct am_uart* uart)
|
|||
|
||||
#if defined(RT_USING_UART0)
|
||||
/* Make sure the UART RX and TX pins are enabled */
|
||||
am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX);
|
||||
am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
|
||||
am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX | AM_HAL_GPIO_PULL24K);
|
||||
am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL24K);
|
||||
#endif /* RT_USING_UART0 */
|
||||
|
||||
#if defined(RT_USING_UART1)
|
||||
/* Make sure the UART RX and TX pins are enabled */
|
||||
am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX);
|
||||
am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
|
||||
am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX | AM_HAL_GPIO_PULL24K);
|
||||
am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL24K);
|
||||
#endif /* RT_USING_UART1 */
|
||||
}
|
||||
|
||||
|
|
@ -143,9 +135,11 @@ void rt_hw_uart_send_string(char *pcString)
|
|||
while ( am_hal_uart_flags_get(AM_UART0_INST) & AM_HAL_UART_FR_BUSY );
|
||||
}
|
||||
|
||||
//connect am drv to rt drv.
|
||||
static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
|
||||
{
|
||||
struct am_uart* uart;
|
||||
am_hal_uart_config_t uart_cfg;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
RT_ASSERT(cfg != RT_NULL);
|
||||
|
|
@ -155,23 +149,43 @@ static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_conf
|
|||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
/* Get the configure */
|
||||
g_sUartConfig.ui32BaudRate = cfg->baud_rate;
|
||||
g_sUartConfig.ui32DataBits = cfg->data_bits;
|
||||
uart_cfg.ui32BaudRate = cfg->baud_rate;
|
||||
|
||||
if (cfg->data_bits == DATA_BITS_5)
|
||||
uart_cfg.ui32DataBits = AM_HAL_UART_DATA_BITS_5;
|
||||
else if (cfg->data_bits == DATA_BITS_6)
|
||||
uart_cfg.ui32DataBits = AM_HAL_UART_DATA_BITS_6;
|
||||
else if (cfg->data_bits == DATA_BITS_7)
|
||||
uart_cfg.ui32DataBits = AM_HAL_UART_DATA_BITS_7;
|
||||
else if (cfg->data_bits == DATA_BITS_8)
|
||||
uart_cfg.ui32DataBits = AM_HAL_UART_DATA_BITS_8;
|
||||
|
||||
if (cfg->stop_bits == STOP_BITS_1)
|
||||
g_sUartConfig.bTwoStopBits = false;
|
||||
uart_cfg.bTwoStopBits = false;
|
||||
else if (cfg->stop_bits == STOP_BITS_2)
|
||||
g_sUartConfig.bTwoStopBits = true;
|
||||
uart_cfg.bTwoStopBits = true;
|
||||
|
||||
g_sUartConfig.ui32Parity = cfg->parity;
|
||||
g_sUartConfig.ui32FlowCtrl = AM_HAL_UART_PARITY_NONE;
|
||||
uart_cfg.ui32Parity = cfg->parity;
|
||||
uart_cfg.ui32FlowCtrl = AM_HAL_UART_PARITY_NONE;
|
||||
|
||||
/* Configure the UART */
|
||||
am_hal_uart_config(uart->uart_device, &g_sUartConfig);
|
||||
/* UART Config */
|
||||
am_hal_uart_config(uart->uart_device, &uart_cfg);
|
||||
|
||||
/* Enable the UART FIFO */
|
||||
am_hal_uart_fifo_config(uart->uart_device, AM_HAL_UART_RX_FIFO_7_8 | AM_HAL_UART_RX_FIFO_7_8);
|
||||
|
||||
/* Initialize the UART queues */
|
||||
am_hal_uart_init_buffered(uart->uart_device, UartRxBuffer, UART_BUFFER_SIZE, UartTxBuffer, UART_BUFFER_SIZE);
|
||||
|
||||
/* Enable the UART */
|
||||
am_hal_uart_enable(uart->uart_device);
|
||||
|
||||
/* Enable interrupts */
|
||||
am_hal_uart_int_enable(uart->uart_device, AM_HAL_UART_INT_RX_TMOUT | AM_HAL_UART_INT_RX | AM_HAL_UART_INT_TX);
|
||||
|
||||
/* Enable the uart interrupt in the NVIC */
|
||||
am_hal_interrupt_enable(uart->uart_interrupt);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
|
|
@ -205,6 +219,7 @@ static rt_err_t am_control(struct rt_serial_device *serial, int cmd, void *arg)
|
|||
|
||||
static int am_putc(struct rt_serial_device *serial, char c)
|
||||
{
|
||||
uint32_t rxsize, txsize;
|
||||
struct am_uart* uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
|
|
@ -212,7 +227,14 @@ static int am_putc(struct rt_serial_device *serial, char c)
|
|||
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
am_hal_uart_char_transmit_polled(uart->uart_device, c);
|
||||
am_hal_uart_get_status_buffered(uart->uart_device, &rxsize, &txsize);
|
||||
//if (txsize > 0)
|
||||
{
|
||||
am_hal_uart_char_transmit_buffered(uart->uart_device, c);
|
||||
}
|
||||
|
||||
/* Wait until busy bit clears to make sure UART fully transmitted last byte */
|
||||
while ( am_hal_uart_flags_get(uart->uart_device) & AM_HAL_UART_FR_BUSY );
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
@ -221,6 +243,7 @@ static int am_getc(struct rt_serial_device *serial)
|
|||
{
|
||||
char c;
|
||||
int ch;
|
||||
uint32_t rxsize, txsize;
|
||||
struct am_uart* uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
|
|
@ -229,9 +252,10 @@ static int am_getc(struct rt_serial_device *serial)
|
|||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
ch = -1;
|
||||
if ((am_hal_uart_flags_get(uart->uart_device) & AM_HAL_UART_FR_RX_EMPTY) == 0)
|
||||
am_hal_uart_get_status_buffered(uart->uart_device, &rxsize, &txsize);
|
||||
if (rxsize > 0)
|
||||
{
|
||||
am_hal_uart_char_receive_polled(uart->uart_device, &c);
|
||||
am_hal_uart_char_receive_buffered(uart->uart_device, &c, 1);
|
||||
ch = c & 0xff;
|
||||
}
|
||||
|
||||
|
|
@ -261,6 +285,11 @@ static void uart_isr(struct rt_serial_device *serial)
|
|||
/* Clear the UART interrupt */
|
||||
am_hal_uart_int_clear(uart->uart_device, status);
|
||||
|
||||
if (status & (AM_HAL_UART_INT_RX_TMOUT | AM_HAL_UART_INT_TX | AM_HAL_UART_INT_RX))
|
||||
{
|
||||
am_hal_uart_service_buffered_timeout_save(uart->uart_device, status);
|
||||
}
|
||||
|
||||
if (status & (AM_HAL_UART_INT_RX_TMOUT))
|
||||
{
|
||||
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
||||
|
|
@ -273,7 +302,7 @@ static void uart_isr(struct rt_serial_device *serial)
|
|||
|
||||
if (status & AM_HAL_UART_INT_TX)
|
||||
{
|
||||
// rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
|
||||
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -331,14 +360,14 @@ static void GPIO_Configuration(void)
|
|||
{
|
||||
#if defined(RT_USING_UART0)
|
||||
/* Make sure the UART RX and TX pins are enabled */
|
||||
am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX);
|
||||
am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
|
||||
am_hal_gpio_pin_config(UART0_GPIO_TX, UART0_GPIO_CFG_TX | AM_HAL_GPIO_PULL24K);
|
||||
am_hal_gpio_pin_config(UART0_GPIO_RX, UART0_GPIO_CFG_RX | AM_HAL_GPIO_PULL24K);
|
||||
#endif /* RT_USING_UART0 */
|
||||
|
||||
#if defined(RT_USING_UART1)
|
||||
/* Make sure the UART RX and TX pins are enabled */
|
||||
am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX);
|
||||
am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL12K);
|
||||
am_hal_gpio_pin_config(UART1_GPIO_TX, UART1_GPIO_CFG_TX | AM_HAL_GPIO_PULL24K);
|
||||
am_hal_gpio_pin_config(UART1_GPIO_RX, UART1_GPIO_CFG_RX | AM_HAL_GPIO_PULL24K);
|
||||
#endif /* RT_USING_UART1 */
|
||||
}
|
||||
|
||||
|
|
@ -352,24 +381,6 @@ static void RCC_Configuration(struct am_uart* uart)
|
|||
|
||||
/* Disable the UART before configuring it */
|
||||
am_hal_uart_disable(uart->uart_device);
|
||||
|
||||
/* Configure the UART */
|
||||
am_hal_uart_config(uart->uart_device, &g_sUartConfig);
|
||||
|
||||
/* Enable the UART */
|
||||
am_hal_uart_enable(uart->uart_device);
|
||||
|
||||
/* Enable the UART FIFO */
|
||||
am_hal_uart_fifo_config(uart->uart_device, AM_HAL_UART_TX_FIFO_1_2 | AM_HAL_UART_RX_FIFO_1_2);
|
||||
}
|
||||
|
||||
static void NVIC_Configuration(struct am_uart* uart)
|
||||
{
|
||||
/* Enable interrupts */
|
||||
am_hal_uart_int_enable(uart->uart_device, AM_HAL_UART_INT_RX_TMOUT | AM_HAL_UART_INT_RX);
|
||||
|
||||
/* Enable the uart interrupt in the NVIC */
|
||||
am_hal_interrupt_enable(uart->uart_interrupt);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -379,7 +390,7 @@ static void NVIC_Configuration(struct am_uart* uart)
|
|||
*
|
||||
* @return None.
|
||||
*/
|
||||
void rt_hw_uart_init(void)
|
||||
int rt_hw_uart_init(void)
|
||||
{
|
||||
struct am_uart* uart;
|
||||
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||||
|
|
@ -389,14 +400,16 @@ void rt_hw_uart_init(void)
|
|||
#if defined(RT_USING_UART0)
|
||||
uart = &uart0;
|
||||
config.baud_rate = BAUD_RATE_115200;
|
||||
config.data_bits = DATA_BITS_8;
|
||||
config.stop_bits = STOP_BITS_1;
|
||||
config.parity = PARITY_NONE;
|
||||
|
||||
RCC_Configuration(uart);
|
||||
NVIC_Configuration(uart);
|
||||
|
||||
serial0.ops = &am_uart_ops;
|
||||
serial0.config = config;
|
||||
|
||||
/* register UART1 device */
|
||||
/* register UART0 device */
|
||||
rt_hw_serial_register(&serial0, "uart0",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
|
||||
RT_DEVICE_FLAG_INT_TX, uart);
|
||||
|
|
@ -405,9 +418,11 @@ void rt_hw_uart_init(void)
|
|||
#if defined(RT_USING_UART1)
|
||||
uart = &uart1;
|
||||
config.baud_rate = BAUD_RATE_115200;
|
||||
config.data_bits = DATA_BITS_8;
|
||||
config.stop_bits = STOP_BITS_1;
|
||||
config.parity = PARITY_NONE;
|
||||
|
||||
RCC_Configuration(uart);
|
||||
NVIC_Configuration(uart);
|
||||
|
||||
serial1.ops = &am_uart_ops;
|
||||
serial1.config = config;
|
||||
|
|
@ -417,6 +432,8 @@ void rt_hw_uart_init(void)
|
|||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
|
||||
RT_DEVICE_FLAG_INT_TX, uart);
|
||||
#endif /* RT_USING_UART1 */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
|
|
|||
|
|
@ -21,10 +21,16 @@
|
|||
* Date Author Notes
|
||||
* 2017-09-14 Haley the first version
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __UART_H_
|
||||
#define __UART_H_
|
||||
|
||||
void rt_hw_uart_init(void);
|
||||
#include <rtthread.h>
|
||||
|
||||
/**
|
||||
* @brief External function definitions
|
||||
*
|
||||
*/
|
||||
int rt_hw_uart_init(void);
|
||||
|
||||
#endif // __UART_H_
|
||||
|
|
|
|||
|
|
@ -11,15 +11,21 @@ hal/am_hal_debug.c
|
|||
hal/am_hal_cachectrl.c
|
||||
hal/am_hal_pwrctrl.c
|
||||
hal/am_hal_sysctrl.c
|
||||
hal/am_hal_reset.c
|
||||
hal/am_hal_stimer.c
|
||||
hal/am_hal_ctimer.c
|
||||
hal/am_hal_rtc.c
|
||||
hal/am_hal_interrupt.c
|
||||
hal/am_hal_queue.c
|
||||
hal/am_hal_iom.c
|
||||
hal/am_hal_ios.c
|
||||
hal/am_hal_vcomp.c
|
||||
hal/am_hal_flash.c
|
||||
hal/am_hal_gpio.c
|
||||
hal/am_hal_uart.c
|
||||
hal/am_hal_adc.c
|
||||
hal/am_hal_pdm.c
|
||||
hal/am_hal_i2c_bit_bang.c
|
||||
""")
|
||||
|
||||
path = [cwd]
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@
|
|||
#include <stdbool.h>
|
||||
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_util.h"
|
||||
//#include "am_util.h"
|
||||
#include "am_hal_i2c_bit_bang.h"
|
||||
|
||||
// Max number of clock cycles to wait for clock stretch
|
||||
|
|
@ -133,7 +133,7 @@ static am_hal_i2c_bit_bang_priv_t am_hal_i2c_bit_bang_priv;
|
|||
// Wait for any stretched clock to go high
|
||||
// If it times out - return failure
|
||||
//
|
||||
static inline bool
|
||||
static bool
|
||||
i2c_pull_and_wait_scl_hi(void)
|
||||
{
|
||||
// Maximum time to wait for clock stretching
|
||||
|
|
@ -284,7 +284,7 @@ am_hal_i2c_bit_bang_init(uint32_t sck_gpio_number,
|
|||
//! returns the byte received
|
||||
//
|
||||
//*****************************************************************************
|
||||
static inline am_hal_i2c_bit_bang_enum_t
|
||||
static am_hal_i2c_bit_bang_enum_t
|
||||
i2c_receive_byte(uint8_t *pRxByte, bool bNack)
|
||||
{
|
||||
int i;
|
||||
|
|
@ -389,7 +389,7 @@ i2c_receive_byte(uint8_t *pRxByte, bool bNack)
|
|||
//! }
|
||||
//
|
||||
//*****************************************************************************
|
||||
static inline am_hal_i2c_bit_bang_enum_t
|
||||
static am_hal_i2c_bit_bang_enum_t
|
||||
i2c_send_byte(uint8_t one_byte)
|
||||
{
|
||||
int i;
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@
|
|||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "am_mcu_apollo.h"
|
||||
#include "am_util_delay.h"
|
||||
//#include "am_util_delay.h"
|
||||
|
||||
#ifdef __IAR_SYSTEMS_ICC__
|
||||
#define AM_INSTR_CLZ(n) __CLZ(n)
|
||||
|
|
@ -62,6 +62,22 @@
|
|||
#define AM_ASSERT_INVALID_THRESHOLD (1)
|
||||
#endif
|
||||
|
||||
uint32_t am_util_wait_status_change(uint32_t ui32Iterations, uint32_t ui32Address, uint32_t ui32Mask, uint32_t ui32Value)
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < ui32Iterations; i++)
|
||||
{
|
||||
// Check the status
|
||||
if (((*(uint32_t *)ui32Address) & ui32Mask) == ui32Value)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
// Call the BOOTROM cycle delay function to get about 1 usec @ 48MHz
|
||||
am_hal_flash_delay(16);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forcing optimizations
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,7 +1,10 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rtthread-apollo2</TargetName>
|
||||
|
|
@ -15,28 +18,28 @@
|
|||
<PackID>AmbiqMicro.Apollo_DFP.1.0.0</PackID>
|
||||
<PackURL>http://s3.asia.ambiqmicro.com/pack/</PackURL>
|
||||
<Cpu>IROM(0x00000000,0x100000) IRAM(0x10000000,0x40000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec />
|
||||
<StartupFile />
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FC4000 -FN1 -FF0Apollo2 -FS00 -FL010000 -FP0($$Device:AMAPH1KK-KBR$Flash\Apollo2.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:AMAPH1KK-KBR$Device\Include\apollo2.h</RegisterFile>
|
||||
<MemoryEnv />
|
||||
<Cmp />
|
||||
<Asm />
|
||||
<Linker />
|
||||
<OHString />
|
||||
<InfinionOptionDll />
|
||||
<SLE66CMisc />
|
||||
<SLE66AMisc />
|
||||
<SLE66LinkerMisc />
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:AMAPH1KK-KBR$SVD\apollo2.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath />
|
||||
<IncludePath />
|
||||
<LibPath />
|
||||
<RegisterFilePath />
|
||||
<DBRegisterFilePath />
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
|
|
@ -58,8 +61,8 @@
|
|||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
|
|
@ -68,8 +71,8 @@
|
|||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
|
|
@ -79,14 +82,14 @@
|
|||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||
<UserProg2Name />
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString />
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
|
|
@ -100,8 +103,8 @@
|
|||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument />
|
||||
<IncludeLibraryModules />
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
|
|
@ -149,18 +152,18 @@
|
|||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>6</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll />
|
||||
<CpuDllArguments />
|
||||
<PeripheralDll />
|
||||
<PeripheralDllArguments />
|
||||
<InitializationFile />
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll />
|
||||
<CpuDllArguments />
|
||||
<PeripheralDll />
|
||||
<PeripheralDllArguments />
|
||||
<InitializationFile />
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
<Driver>Segger\JL2CM3.dll</Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
|
|
@ -176,10 +179,10 @@
|
|||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4 />
|
||||
<pFcarmOut />
|
||||
<pFcarmGrp />
|
||||
<pFcArmRoot />
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
|
|
@ -212,7 +215,7 @@
|
|||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName />
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
|
|
@ -344,7 +347,7 @@
|
|||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector />
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
|
|
@ -367,10 +370,10 @@
|
|||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<VariousControls>
|
||||
<MiscControls />
|
||||
<Define>AM_PART_APOLLO2, AM_PACKAGE_BGA, keil</Define>
|
||||
<Undefine />
|
||||
<IncludePath>applications;.;board;libraries\drivers;libraries\startup;..\..\include;..\..\libcpu\arm\cortex-m4;..\..\libcpu\arm\common;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh</IncludePath>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>AM_PART_APOLLO2, RT_USING_ARM_LIBC, AM_PACKAGE_BGA, keil</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>applications;.;board;libraries\drivers;libraries\startup;..\..\include;..\..\libcpu\arm\cortex-m4;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
|
|
@ -384,10 +387,10 @@
|
|||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls />
|
||||
<Define />
|
||||
<Undefine />
|
||||
<IncludePath />
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
|
|
@ -399,13 +402,13 @@
|
|||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase />
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\build\rtthread.sct</ScatterFile>
|
||||
<IncludeLibs />
|
||||
<IncludeLibsPath />
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
|
||||
<LinkerInputFile />
|
||||
<DisabledWarnings />
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
|
|
@ -423,27 +426,61 @@
|
|||
<Group>
|
||||
<GroupName>Board</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\board.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\gpio.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>led.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\led.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>pdm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\pdm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>pwm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\pwm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>rtc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\rtc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>smbus.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\smbus.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
|
|
@ -459,99 +496,101 @@
|
|||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_clkgen.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_debug.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_debug.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_cachectrl.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_cachectrl.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_pwrctrl.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_pwrctrl.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_sysctrl.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_sysctrl.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_reset.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_reset.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>am_hal_stimer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_stimer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_ctimer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_ctimer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_rtc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_rtc.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_interrupt.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_interrupt.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_queue.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_iom.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_iom.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>am_hal_ios.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_ios.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>am_hal_vcomp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_vcomp.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_flash.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_gpio.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_uart.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>am_hal_adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>am_hal_pdm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_pdm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>am_hal_i2c_bit_bang.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\drivers\hal\am_hal_i2c_bit_bang.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup_keil.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
|
|
@ -567,85 +606,66 @@
|
|||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\clock.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>components.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\components.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>device.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\device.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>idle.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\idle.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>ipc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\ipc.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>irq.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\irq.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>kservice.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\kservice.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>mem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\mem.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>mempool.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\mempool.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>object.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\object.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>scheduler.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\scheduler.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>signal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\signal.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>thread.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\thread.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>timer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
|
|
@ -661,29 +681,21 @@
|
|||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>context_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>backtrace.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>div0.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>showmem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
|
|
@ -691,58 +703,109 @@
|
|||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Filesystem</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>dfs.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\dfs\src\dfs.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>dfs_file.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\dfs\src\dfs_file.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>dfs_fs.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\dfs\src\dfs_fs.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>dfs_posix.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\dfs\src\dfs_posix.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>poll.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\dfs\src\poll.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>select.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\dfs\src\select.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>devfs.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\dfs\filesystems\devfs\devfs.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>DeviceDrivers</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>i2c_core.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\i2c\i2c_core.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>i2c_dev.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\i2c\i2c_dev.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>pin.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\misc\pin.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>rtc_rtc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\rtc\rtc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>serial.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\serial\serial.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>spi_core.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\spi\spi_core.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>spi_dev.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\spi\spi_dev.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>completion.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\completion.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>dataqueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>pipe.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\pipe.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>ringbuffer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>waitqueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>workqueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
|
|
@ -758,85 +821,76 @@
|
|||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\shell.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>symbol.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\symbol.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmd.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\cmd.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>msh.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\msh.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh_cmd.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\msh_cmd.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh_file.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\msh_file.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_compiler.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>finsh_error.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_error.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>finsh_heap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>finsh_init.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_init.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>finsh_node.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_node.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>finsh_ops.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>finsh_parser.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>finsh_var.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_var.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>finsh_vm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>finsh_token.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
|
|
@ -844,7 +898,43 @@
|
|||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>libc</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>libc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\libc\compilers\armlibc\libc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>libc_syms.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\libc\compilers\armlibc\libc_syms.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mem_std.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stdio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\libc\compilers\armlibc\stdio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stubs.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>time.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\libc\compilers\armlibc\time.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
|
|
|
|||
|
|
@ -1,99 +1,193 @@
|
|||
/* RT-Thread config file */
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* RT_NAME_MAX*/
|
||||
#define RT_NAME_MAX 6
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT_ALIGN_SIZE*/
|
||||
#define RT_ALIGN_SIZE 4
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
/* PRIORITY_MAX */
|
||||
#define RT_THREAD_PRIORITY_MAX 8
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 500
|
||||
#define RT_DEBUG
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_DEBUG_INIT 0
|
||||
#define RT_DEBUG_THREAD 0
|
||||
#define RT_USING_HOOK
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
/* RT_USING_TIMER_SOFT is not set */
|
||||
|
||||
/* Tick per Second */
|
||||
#define RT_TICK_PER_SECOND 200
|
||||
/* Inter-Thread communication */
|
||||
|
||||
/* SECTION: RT_DEBUG */
|
||||
/* Thread Debug */
|
||||
//#define RT_DEBUG
|
||||
//#define RT_DEBUG_INIT 1
|
||||
//#define RT_USING_OVERFLOW_CHECK
|
||||
|
||||
/* Using Hook */
|
||||
//#define RT_USING_HOOK
|
||||
|
||||
#define RT_USING_IDLE_HOOK
|
||||
|
||||
#define IDLE_THREAD_STACK_SIZE 384
|
||||
|
||||
/* Using Software Timer */
|
||||
//#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 1
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
#define RT_TIMER_TICK_PER_SECOND 200
|
||||
|
||||
/* SECTION: IPC */
|
||||
/* Using Semaphore*/
|
||||
#define RT_USING_SEMAPHORE
|
||||
|
||||
/* Using Mutex */
|
||||
#define RT_USING_MUTEX
|
||||
|
||||
/* Using Event */
|
||||
#define RT_USING_EVENT
|
||||
|
||||
/* Using MailBox */
|
||||
/* #define RT_USING_MAILBOX */
|
||||
|
||||
/* Using Message Queue */
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
/* RT_USING_SIGNALS is not set */
|
||||
|
||||
/* SECTION: Memory Management */
|
||||
/* Using Memory Pool Management*/
|
||||
/* #define RT_USING_MEMPOOL */
|
||||
/* Memory Management */
|
||||
|
||||
/* Using Dynamic Heap Management */
|
||||
#define RT_USING_MEMPOOL
|
||||
/* RT_USING_MEMHEAP is not set */
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Using Small MM */
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_TINY_SIZE
|
||||
/* RT_USING_SLAB is not set */
|
||||
|
||||
/* Using USER MAIN */
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
/* RT_USING_INTERRUPT_INFO is not set */
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart0"
|
||||
/* RT_USING_MODULE is not set */
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
|
||||
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
/* C++ features */
|
||||
|
||||
/* SECTION: Device System */
|
||||
/* Using Device System */
|
||||
#define RT_USING_DEVICE
|
||||
// <bool name="RT_USING_DEVICE_IPC" description="Using device communication" default="true" />
|
||||
#define RT_USING_DEVICE_IPC
|
||||
// <bool name="RT_USING_SERIAL" description="Using Serial" default="true" />
|
||||
#define RT_USING_SERIAL
|
||||
/* RT_USING_CPLUSPLUS is not set */
|
||||
|
||||
/* SECTION: Console options */
|
||||
#define RT_USING_CONSOLE
|
||||
/* the buffer size of console*/
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart1" />
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart0"
|
||||
/* Command shell */
|
||||
|
||||
/* Using GPIO pin framework */
|
||||
#define RT_USING_PIN
|
||||
|
||||
// #define RT_USING_SPI
|
||||
|
||||
/* SECTION: finsh, a C-Express shell */
|
||||
#define RT_USING_FINSH
|
||||
/* configure finsh parameters */
|
||||
#define FINSH_THREAD_PRIORITY 6
|
||||
#define FINSH_THREAD_STACK_SIZE 1024
|
||||
#define FINSH_HISTORY_LINES 1
|
||||
/* Using symbol table */
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_CMD_SIZE 80
|
||||
/* FINSH_USING_AUTH is not set */
|
||||
#define FINSH_USING_MSH
|
||||
//#define FINSH_USING_MSH_DEFAULT
|
||||
/* FINSH_USING_MSH_ONLY is not set */
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
#define DFS_FD_MAX 4
|
||||
//#define RT_USING_DFS_ELMFAT
|
||||
|
||||
/* elm-chan's FatFs, Generic FAT Filesystem Module */
|
||||
|
||||
#define RT_DFS_ELM_CODE_PAGE 437
|
||||
#define RT_DFS_ELM_WORD_ACCESS
|
||||
#define RT_DFS_ELM_USE_LFN_0
|
||||
/* RT_DFS_ELM_USE_LFN_1 is not set */
|
||||
/* RT_DFS_ELM_USE_LFN_2 is not set */
|
||||
/* RT_DFS_ELM_USE_LFN_3 is not set */
|
||||
#define RT_DFS_ELM_USE_LFN 0
|
||||
#define RT_DFS_ELM_MAX_LFN 255
|
||||
#define RT_DFS_ELM_DRIVES 2
|
||||
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
|
||||
/* RT_DFS_ELM_USE_ERASE is not set */
|
||||
#define RT_DFS_ELM_REENTRANT
|
||||
#define RT_USING_DFS_DEVFS
|
||||
/* RT_USING_DFS_NET is not set */
|
||||
/* RT_USING_DFS_ROMFS is not set */
|
||||
/* RT_USING_DFS_RAMFS is not set */
|
||||
/* RT_USING_DFS_UFFS is not set */
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_USING_SERIAL
|
||||
/* RT_USING_CAN is not set */
|
||||
/* RT_USING_HWTIMER is not set */
|
||||
#define RT_USING_I2C
|
||||
/* RT_USING_I2C_BITOPS is not set */
|
||||
#define RT_USING_PIN
|
||||
/* RT_USING_MTD_NOR is not set */
|
||||
/* RT_USING_MTD_NAND is not set */
|
||||
#define RT_USING_RTC
|
||||
/* RT_USING_SDIO is not set */
|
||||
#define RT_USING_SPI
|
||||
/* RT_USING_SFUD is not set */
|
||||
/* RT_USING_W25QXX is not set */
|
||||
/* RT_USING_GD is not set */
|
||||
/* RT_USING_ENC28J60 is not set */
|
||||
/* RT_USING_SPI_WIFI is not set */
|
||||
/* RT_USING_WDT is not set */
|
||||
/* RT_USING_USB_HOST is not set */
|
||||
/* RT_USING_USB_DEVICE is not set */
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
/* RT_USING_PTHREADS is not set */
|
||||
#define RT_USING_POSIX
|
||||
/* RT_USING_POSIX_MMAP is not set */
|
||||
/* RT_USING_POSIX_TERMIOS is not set */
|
||||
|
||||
/* Network stack */
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
/* RT_USING_LWIP is not set */
|
||||
|
||||
/* Modbus master and slave stack */
|
||||
|
||||
/* RT_USING_MODBUS is not set */
|
||||
|
||||
/* RT-Thread UI Engine */
|
||||
|
||||
/* RT_USING_GUIENGINE is not set */
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
/* RT_USING_VBUS is not set */
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* PKG_USING_PARTITION is not set */
|
||||
/* PKG_USING_SQLITE is not set */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
/* PKG_USING_PAHOMQTT is not set */
|
||||
/* PKG_USING_WEBCLIENT is not set */
|
||||
/* PKG_USING_MONGOOSE is not set */
|
||||
/* PKG_USING_WEBTERMINAL is not set */
|
||||
/* PKG_USING_CJSON is not set */
|
||||
/* PKG_USING_EZXML is not set */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
/* PKG_USING_MARVELLWIFI is not set */
|
||||
|
||||
/* security packages */
|
||||
|
||||
/* PKG_USING_MBEDTLS is not set */
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* PKG_USING_JERRYSCRIPT is not set */
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* PKG_USING_FASTLZ is not set */
|
||||
|
||||
/* tools packages */
|
||||
|
||||
/* PKG_USING_CMBACKTRACE is not set */
|
||||
/* PKG_USING_EASYLOGGER is not set */
|
||||
/* PKG_USING_SYSTEMVIEW is not set */
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* PKG_USING_HELLO is not set */
|
||||
|
||||
/* BSP_SPECIAL CONFIG */
|
||||
|
||||
/* RT_USING_UART1 is not set */
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ if PLATFORM == 'gcc':
|
|||
DEVICE = ' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-nrf52832.map,-cref,-u,Reset_Handler -T nrf52_xxaa.ld'
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-apollo2.map,-cref,-u,Reset_Handler -T'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
|
@ -67,7 +67,7 @@ elif PLATFORM == 'armcc':
|
|||
DEVICE = ' --device DARMSTM'
|
||||
CFLAGS = DEVICE + ' --apcs=interwork'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-nrf52832.map --scatter rtthread-nrf52832.sct'
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-apollo2.map --scatter rtthread-apollo2.sct'
|
||||
|
||||
CFLAGS += ' --c99'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@
|
|||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U4294967295 -O78 -S0 -ZTIFSpeedSel20000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FC4000 -FN1 -FF0Apollo2.FLM -FS00 -FL010000 -FP0($$Device:AMAPH1KK-KBR$Flash\Apollo2.FLM)</Name>
|
||||
<Name>-U4294967295 -O78 -S0 -ZTIFSpeedSel20000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FC4000 -FN1 -FF0Apollo2 -FS00 -FL0100000 -FP0($$Device:AMAPH1KK-KBR$Flash\Apollo2.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
|
|
|
|||
Loading…
Reference in New Issue