[bsp][at91sam9g45]Fix build bugs which caused by the change of libcpu/arm/arm926/start_gcc.S

bsp/allwinner_tina/libcpu/interrupt.c

@@ -102,6 +102,7 @@ void rt_hw_interrupt_mask(int vector)
 }
 
 /**
+
  * This function will un-mask a interrupt.
  * @param vector the interrupt number
  */
@@ -167,7 +168,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
     return old_handler;
 }
 
-void rt_interrupt_dispatch(void)
+void rt_interrupt_dispatch(rt_uint32_t fiq_irq)
 {
     void *param;
     int vector;

bsp/at91sam9g45/drivers/board.c

@@ -36,8 +36,8 @@
 extern int Image$$ER_ZI$$ZI$$Limit;
 #define HEAP_BEGIN  (&Image$$ER_ZI$$ZI$$Limit)
 #elif (defined (__GNUC__))
-extern unsigned char __bss_end__;
-#define HEAP_BEGIN  (&__bss_end__)
+extern unsigned char __bss_end;
+#define HEAP_BEGIN  (&__bss_end)
 #elif (defined (__ICCARM__))
 #pragma section=".noinit"
 #define HEAP_BEGIN  (__section_end(".noinit"))

bsp/at91sam9g45/link_scripts/at91sam9g45_ram.ld

@@ -1,6 +1,6 @@
 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
-ENTRY(start)
+ENTRY(system_vectors)
 SECTIONS
 {
     . = 0x70000000;
@@ -8,7 +8,7 @@ SECTIONS
     . = ALIGN(4);
     .text : 
     {
-        *(.init)
+        *(.vectors)
         *(.text)
         *(.gnu.linkonce.t*)
         
@@ -76,9 +76,9 @@ SECTIONS
     .nobss : { *(.nobss) }
     
     . = ALIGN(4);
-    __bss_start__ = .;
+    __bss_start = .;
     .bss : { *(.bss)}
-    __bss_end__ = .;
+    __bss_end = .;
 
     /* stabs debugging sections. */
     .stab 0 : { *(.stab) }

bsp/at91sam9g45/platform/interrupt.c

@@ -332,7 +332,7 @@ void rt_hw_interrupt_umask(int irq)
  * @return old handler
  */
 rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
-                                    void *param, char *name)
+                                    void *param, const char *name)
 {
     rt_isr_handler_t old_handler = RT_NULL;
 
@@ -419,6 +419,29 @@ void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
     AT91C_BASE_AIC->AIC_EOICR = 0x0;
 }
 
+void rt_interrupt_dispatch(rt_uint32_t fiq_irq)
+{
+    rt_isr_handler_t isr_func;
+    rt_uint32_t irq;
+    void *param;
+
+    /* get irq number */
+    irq = rt_hw_interrupt_get_active(fiq_irq);
+
+    /* get interrupt service routine */
+    isr_func = irq_desc[irq].handler;
+    param = irq_desc[irq].param;
+
+    /* turn to interrupt service routine */
+    isr_func(irq, param);
+
+    rt_hw_interrupt_ack(fiq_irq, irq);
+#ifdef RT_USING_INTERRUPT_INFO
+    irq_desc[irq].counter ++;
+#endif
+}
+
+
 #ifdef RT_USING_FINSH
 #ifdef RT_USING_INTERRUPT_INFO
 void list_irq(void)

bsp/at91sam9g45/rtconfig.py

@@ -10,7 +10,7 @@ if os.getenv('RTT_CC'):
 
 if  CROSS_TOOL == 'gcc':
 	PLATFORM 	= 'gcc'
-	EXEC_PATH = r'D:\arm-2013.11\bin'
+	EXEC_PATH = '/usr/bin'
 elif CROSS_TOOL == 'keil':
 	PLATFORM 	= 'armcc'
 	EXEC_PATH 	= 'C:/Keil_v5'

libcpu/arm/arm926/trap.c

@@ -197,14 +197,14 @@ void rt_hw_trap_resv(struct rt_hw_register *regs)
     rt_hw_cpu_shutdown();
 }
 
-extern void rt_interrupt_dispatch(void);
+extern void rt_interrupt_dispatch(rt_uint32_t fiq_irq);
 
 void rt_hw_trap_irq(void)
 {
-    rt_interrupt_dispatch();
+    rt_interrupt_dispatch(INT_IRQ);
 }
 
 void rt_hw_trap_fiq(void)
 {
-    rt_interrupt_dispatch();
+    rt_interrupt_dispatch(INT_FIQ);
 }