[pin] pin_read/write rt_uint8_t to rt_ssize_t

This commit is contained in:
kk 2024-03-24 02:50:31 +08:00 committed by GitHub
parent b6f725c7e4
commit 2549b82bd6
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
83 changed files with 133 additions and 133 deletions

View File

@ -21,9 +21,9 @@ static void mcu_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
/*TODO:set gpio out put mode */
}
static rt_int8_t mcu_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t mcu_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
value = gpio_get_level(pin);
return value;
}

View File

@ -150,7 +150,7 @@ static void ifx_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
cyhal_gpio_write(gpio_pin, value);
}
static rt_int8_t ifx_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t ifx_pin_read(struct rt_device *device, rt_base_t pin)
{
rt_uint16_t gpio_pin;

View File

@ -140,11 +140,11 @@ static void v85xx_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t v85xx_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t v85xx_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
int value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (PIN_PORT(pin) == PIN_V85XXPORT_A)
{

View File

@ -141,11 +141,11 @@ static void V85XXP_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t V85XXP_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t V85XXP_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_Type *gpio_port;
uint16_t gpio_pin;
int value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (PIN_PORT(pin) == PIN_V85XXPPORT_A)
{

View File

@ -188,7 +188,7 @@ static void acm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
HAL_GPIO_WritePin(index->gpio, index->pin, (enum_PinState_t)value);
}
static rt_int8_t acm32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t acm32_pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
const struct pin_index *index;

View File

@ -206,7 +206,7 @@ static void _pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
HAL_GPIO_WritePin(index->gpio, index->pin, (enum_PinState_t)value);
}
static rt_int8_t _pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t _pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
const struct pin_index *index;

View File

@ -60,7 +60,7 @@ static void air105_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t air105_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t air105_pin_read(rt_device_t dev, rt_base_t pin)
{
if (pin < GPIO_MAX)
{

View File

@ -157,7 +157,7 @@ static void air32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t air32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t air32_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;

View File

@ -32,11 +32,11 @@ static void hal_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t va
hal_gpio_set_data(pin,value);
}
static rt_int8_t hal_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t hal_pin_read(struct rt_device *device, rt_base_t pin)
{
gpio_data_t value;
hal_gpio_get_data(pin,&value);
return (rt_int8_t)value;
return (rt_ssize_t)value;
}
static rt_err_t hal_pin_attach_irq(struct rt_device *device, rt_base_t pin,

View File

@ -453,7 +453,7 @@ static void pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t value)
gpio_set_value(pin_index[pin].pin_port, pin_index[pin].pin, value);
}
static rt_int8_t pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t pin_read(struct rt_device *device, rt_base_t pin)
{
if ((pin > PIN_NUM(pin_index)) || (pin_index[pin].magic != PIN_MAGIC))
{

View File

@ -173,7 +173,7 @@ static void apm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t apm32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t apm32_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_T *gpio_port;
uint16_t gpio_pin;

View File

@ -59,9 +59,9 @@ void am_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
rt_int8_t am_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t am_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (am_hal_gpio_pin_config_read(pin) == AM_HAL_GPIO_OUTPUT)
{

View File

@ -184,7 +184,7 @@ static void at32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
gpio_bits_write(gpio_port, gpio_pin, (confirm_state)value);
}
static rt_int8_t at32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t at32_pin_read(rt_device_t dev, rt_base_t pin)
{
gpio_type *gpio_port;
uint16_t gpio_pin;

View File

@ -59,7 +59,7 @@ static void at32uc3_pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t v
}
}
static rt_int8_t at32uc3_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t at32uc3_pin_read(struct rt_device *device, rt_base_t pin)
{
RT_ASSERT((AVR32_BSP_GPIO_PMIN <= pin) && (pin <= AVR32_BSP_GPIO_PMAX));
return (gpio_get_pin_value(pin) ? PIN_HIGH : PIN_LOW);

View File

@ -170,7 +170,7 @@ static void am33xx_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t
}
}
static rt_int8_t am33xx_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t am33xx_pin_read(struct rt_device *device, rt_base_t pin)
{
RT_ASSERT(pin >= 0 && pin < 128);
rt_base_t gpiox = pin >> 5;

View File

@ -106,7 +106,7 @@ static void ab32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
hal_gpio_write(PORT_SFR(port), gpio_pin, (rt_uint8_t)value);
}
static rt_int8_t ab32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t ab32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_uint8_t port = PIN_PORT(pin);
rt_uint8_t gpio_pin = pin - port_table[port].total_pin;

View File

@ -48,7 +48,7 @@ static void _pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
bflb_gpio_reset(gpio, pin);
}
static rt_int8_t _pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t _pin_read(rt_device_t dev, rt_base_t pin)
{
return bflb_gpio_read(gpio, pin);
}

View File

@ -126,7 +126,7 @@ static void dwapb_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t
dwapb_write32(base_addr + GPIO_SWPORTA_DR, reg_val);
}
static rt_int8_t dwapb_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t dwapb_pin_read(struct rt_device *device, rt_base_t pin)
{
rt_uint8_t bit, port;
rt_ubase_t base_addr;

View File

@ -246,9 +246,9 @@ void es32f0_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
ald_gpio_write_pin(index->gpio, index->pin, value);
}
rt_int8_t es32f0_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t es32f0_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;
index = get_pin(pin);

View File

@ -247,9 +247,9 @@ void es32f3_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
ald_gpio_write_pin(index->gpio, index->pin, value);
}
rt_int8_t es32f3_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t es32f3_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;
index = get_pin(pin);

View File

@ -246,7 +246,7 @@ void es32f3_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
ald_gpio_write_pin(index->gpio, index->pin, value);
}
rt_int8_t es32f3_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t es32f3_pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
const struct pin_index *index;

View File

@ -148,11 +148,11 @@ static void fm33_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t fm33_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t fm33_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_Type *gpio_port;
uint16_t gpio_pin;
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (PIN_PORT(pin) < PIN_STPORT_MAX)
{

View File

@ -135,11 +135,11 @@ static void ft32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t ft32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t ft32_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (PIN_PORT(pin) < PIN_STPORT_MAX)
{

View File

@ -362,9 +362,9 @@ static void gd32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
* @param dev, pin
* @retval None
*/
static rt_int8_t gd32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t gd32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
const struct pin_index *index = RT_NULL;
index = get_pin(pin);

View File

@ -248,9 +248,9 @@ static void gd32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
* @param dev, pin
* @retval None
*/
static rt_int8_t gd32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t gd32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
const struct pin_index *index = RT_NULL;
index = get_pin(pin);

View File

@ -283,7 +283,7 @@ static void hc32_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t v
}
}
static rt_int8_t hc32_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t hc32_pin_read(struct rt_device *device, rt_base_t pin)
{
uint8_t gpio_port;
uint16_t gpio_pin;

View File

@ -145,11 +145,11 @@ static void _pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t _pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t _pin_read(rt_device_t dev, rt_base_t pin)
{
uint8_t gpio_port;
uint16_t gpio_pin;
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (pin < PIN_MAX_NUM)
{

View File

@ -103,7 +103,7 @@ static void _pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t _pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t _pin_read(rt_device_t dev, rt_base_t pin)
{
en_gpio_port_t gpio_port;
en_gpio_pin_t gpio_pin;

View File

@ -217,13 +217,13 @@ static void hpm_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
HPM_IOC->PAD[pin].FUNC_CTL = IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
}
static rt_int8_t hpm_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t hpm_pin_read(rt_device_t dev, rt_base_t pin)
{
/* TODO: Check the validity of the pin value */
uint32_t gpio_idx = pin >> 5;
uint32_t pin_idx = pin & 0x1FU;
return (int) gpio_read_pin(HPM_GPIO0, gpio_idx, pin_idx);
return (rt_ssize_t) gpio_read_pin(HPM_GPIO0, gpio_idx, pin_idx);
}
static void hpm_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)

View File

@ -111,7 +111,7 @@ static void drv_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t va
gpiohs_set_pin(pin_channel, value == PIN_HIGH ? GPIO_PV_HIGH : GPIO_PV_LOW);
}
static rt_int8_t drv_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t drv_pin_read(struct rt_device *device, rt_base_t pin)
{
int pin_channel = get_pin_channel(pin);
if(pin_channel == -1)

View File

@ -51,10 +51,10 @@ void ls1c_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value)
}
rt_int8_t ls1c_pin_read(struct rt_device *device, rt_base_t pin)
rt_ssize_t ls1c_pin_read(struct rt_device *device, rt_base_t pin)
{
unsigned int gpio = pin;
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (0 == gpio_get(gpio))
{

View File

@ -67,10 +67,10 @@ static void loongson_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8
else
gpio->GPIO0_O &= ~m;
}
static rt_int8_t loongson_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t loongson_pin_read(struct rt_device *device, rt_base_t pin)
{
struct loongson_gpio *gpio;
rt_int8_t rc;
rt_ssize_t rc;
gpio = (void *)device->user_data;
rt_uint64_t m;

View File

@ -46,9 +46,9 @@ static void mcu_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
static rt_int8_t mcu_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t mcu_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
gpio_cfg_t tmp_gpio_cfg;
tmp_gpio_cfg.port = PIN_PORT(pin);
tmp_gpio_cfg.mask = PIN_MCU_PIN(pin);

View File

@ -134,11 +134,11 @@ static void mm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t mm32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t mm32_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_Type *gpio_port;
uint16_t gpio_pin;
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (PIN_PORT(pin) < PIN_STPORT_MAX)
{

View File

@ -175,9 +175,9 @@ void mm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
rt_int8_t mm32_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t mm32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;

View File

@ -171,9 +171,9 @@ void mm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
rt_int8_t mm32_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t mm32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;

View File

@ -160,9 +160,9 @@ void mm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
rt_int8_t mm32_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t mm32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;

View File

@ -264,15 +264,15 @@ static void msp432_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t
}
}
static rt_int8_t msp432_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t msp432_pin_read(struct rt_device *device, rt_base_t pin)
{
const struct pin_index *index = RT_NULL;
rt_int8_t value = -1;
rt_ssize_t value = -1;
index = _get_pin(pin);
if (index != RT_NULL)
{
value = (rt_int8_t)GPIOPinRead(index->gpioBaseAddress, index->pin);
value = (rt_ssize_t)GPIOPinRead(index->gpioBaseAddress, index->pin);
}
return value;

View File

@ -218,9 +218,9 @@ static void n32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
GPIO_WriteBit(index->gpio, index->pin, (Bit_OperateType)value);
}
static rt_int8_t n32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t n32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;

View File

@ -578,9 +578,9 @@ void n32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
rt_int8_t n32_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t n32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;

View File

@ -114,9 +114,9 @@ static void nrf5x_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
nrf_gpio_pin_write(pin, value);
}
static rt_int8_t nrf5x_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t nrf5x_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;

View File

@ -174,9 +174,9 @@ static void gd32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
gpio_bit_write(index->gpio, index->pin, (bit_status)value);
}
static rt_int8_t gd32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t gd32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;

View File

@ -31,7 +31,7 @@
static void nu_gpio_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args);
static rt_err_t nu_gpio_detach_irq(struct rt_device *device, rt_int32_t pin);
static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
@ -173,7 +173,7 @@ static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t va
GPIO_PIN_DATA(NU_GET_PORT(pin), NU_GET_PINS(pin)) = value;
}
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
{
if (nu_port_check(pin))
return PIN_LOW;

View File

@ -31,7 +31,7 @@
static void nu_gpio_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args);
static rt_err_t nu_gpio_detach_irq(struct rt_device *device, rt_int32_t pin);
static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
@ -172,7 +172,7 @@ static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t va
GPIO_PIN_DATA_S(NU_GET_PORT(pin), NU_GET_PINS(pin)) = value;
}
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
{
if (nu_port_check(pin))
return PIN_LOW;

View File

@ -31,7 +31,7 @@
static void nu_gpio_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args);
static rt_err_t nu_gpio_detach_irq(struct rt_device *device, rt_int32_t pin);
static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
@ -172,7 +172,7 @@ static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t va
GPIO_PIN_DATA(NU_GET_PORT(pin), NU_GET_PINS(pin)) = value;
}
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
{
if (nu_port_check(pin))
return PIN_LOW;

View File

@ -31,7 +31,7 @@
static void nu_gpio_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args);
static rt_err_t nu_gpio_detach_irq(struct rt_device *device, rt_int32_t pin);
static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
@ -172,7 +172,7 @@ static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t va
GPIO_PIN_DATA(NU_GET_PORT(pin), NU_GET_PINS(pin)) = value;
}
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
{
if (nu_port_check(pin))
return PIN_LOW;

View File

@ -30,7 +30,7 @@
static void nu_gpio_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args);
static rt_err_t nu_gpio_detach_irq(struct rt_device *device, rt_int32_t pin);
static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
@ -169,7 +169,7 @@ static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t va
GPIO_PIN_DATA(NU_GET_PORT(pin), NU_GET_PINS(pin)) = value;
}
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
{
if (nu_port_check(pin))
return PIN_LOW;

View File

@ -39,7 +39,7 @@
static void nu_gpio_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args);
static rt_err_t nu_gpio_detach_irq(struct rt_device *device, rt_int32_t pin);
static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
@ -193,7 +193,7 @@ static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t va
GPIO_ClrBit(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)));
}
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
{
GPIO_PORT PORT;

View File

@ -31,7 +31,7 @@
static void nu_gpio_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args);
static rt_err_t nu_gpio_detach_irq(struct rt_device *device, rt_int32_t pin);
static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
@ -170,7 +170,7 @@ static void nu_gpio_write(struct rt_device *device, rt_base_t pin, rt_uint8_t va
GPIO_PIN_DATA(NU_GET_PORT(pin), NU_GET_PINS(pin)) = value;
}
static rt_int8_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t nu_gpio_read(struct rt_device *device, rt_base_t pin)
{
if (nu_port_check(pin))
return PIN_LOW;

View File

@ -279,9 +279,9 @@ static void imx6ull_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_
GPIO_WritePinOutput(mask_tab[port].gpio, pin_num, value);
}
static rt_int8_t imx6ull_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t imx6ull_pin_read(struct rt_device *device, rt_base_t pin)
{
rt_int8_t value = 0;
rt_ssize_t value = 0;
rt_int8_t port = 0, pin_num = 0;
value = PIN_LOW;

View File

@ -622,9 +622,9 @@ static void imxrt_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
GPIO_PinInit(mask_tab[port].gpio, pin_num, &gpio);
}
static rt_int8_t imxrt_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t imxrt_pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
rt_ssize_t value;
rt_int8_t port, pin_num;
value = PIN_LOW;

View File

@ -141,10 +141,10 @@ static void lpc_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
GPIO_PinWrite(GPIO, portx, piny, value);
}
static rt_int8_t lpc_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t lpc_pin_read(rt_device_t dev, rt_base_t pin)
{
int portx, piny;
rt_int8_t value;
rt_ssize_t value;
if(pin > PIN_MAX_VAL)
return -RT_ERROR;
@ -152,7 +152,7 @@ static rt_int8_t lpc_pin_read(rt_device_t dev, rt_base_t pin)
portx = get_port(pin);
piny = get_pin(pin);
value = (rt_int8_t)(GPIO_PinRead(GPIO, portx, piny));
value = (rt_ssize_t)(GPIO_PinRead(GPIO, portx, piny));
return value;
}

View File

@ -201,9 +201,9 @@ static void lpc_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
GPIO_PinWrite(lpc_pin_map[pin].gpio, lpc_pin_map[pin].gpio_port, lpc_pin_map[pin].gpio_pin, value);
}
static rt_int8_t lpc_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t lpc_pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
rt_ssize_t value;
if ((pin > __ARRAY_LEN(lpc_pin_map)) || (pin == 0))
{
return -RT_ERROR;

View File

@ -96,7 +96,7 @@ static void mcx_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
GPIO_PinWrite(PIN2GPIO(pin), GET_GPIO_PIN(pin), value);
}
static rt_int8_t mcx_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t mcx_pin_read(rt_device_t dev, rt_base_t pin)
{
return GPIO_PinRead(PIN2GPIO(pin), GET_GPIO_PIN(pin));
}

View File

@ -96,7 +96,7 @@ static void mcx_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
GPIO_PinWrite(PIN2GPIO(pin), GET_GPIO_PIN(pin), value);
}
static rt_int8_t mcx_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t mcx_pin_read(rt_device_t dev, rt_base_t pin)
{
return GPIO_PinRead(PIN2GPIO(pin), GET_GPIO_PIN(pin));
}

View File

@ -186,7 +186,7 @@ void drv_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value)
FGpioSetOutputValue(pin_instance, (value == PIN_HIGH) ? FGPIO_PIN_HIGH : FGPIO_PIN_LOW);
}
rt_int8_t drv_pin_read(struct rt_device *device, rt_base_t pin)
rt_ssize_t drv_pin_read(struct rt_device *device, rt_base_t pin)
{
u32 ctrl_id = FGPIO_OPS_PIN_CTRL_ID(pin);
u32 port_id = FGPIO_OPS_PIN_PORT_ID(pin);

View File

@ -106,7 +106,7 @@ static void pl061_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t
pl061_write8(BIT(pin + 2), !!value << pin);
}
static rt_int8_t pl061_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t pl061_pin_read(struct rt_device *device, rt_base_t pin)
{
return !!pl061_read8((BIT(pin + 2)));
}

View File

@ -141,7 +141,7 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t val
}
static rt_int8_t raspi_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t raspi_pin_read(struct rt_device *device, rt_base_t pin)
{
RT_ASSERT((BCM_GPIO_PIN_0 <= pin) && (pin < BCM_GPIO_PIN_NULL));
return (BCM2835_GPIO_GPLEV(pin / 32) & (1 << (pin % 32)))? PIN_HIGH : PIN_LOW;

View File

@ -142,7 +142,7 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t val
}
static rt_int8_t raspi_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t raspi_pin_read(struct rt_device *device, rt_base_t pin)
{
RT_ASSERT((BCM_GPIO_PIN_0 <= pin) && (pin < BCM_GPIO_PIN_NULL));
return (BCM2835_GPIO_GPLEV(pin / 32) & (1 << (pin % 32)))? PIN_HIGH : PIN_LOW;

View File

@ -180,10 +180,10 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t val
prev_raspi_pin_write(pin, value);
}
static rt_int8_t raspi_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t raspi_pin_read(struct rt_device *device, rt_base_t pin)
{
uint32_t num = pin / 32;
rt_int8_t pin_level = 0;
rt_ssize_t pin_level = 0;
if(num == 0)
{

View File

@ -180,10 +180,10 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t val
prev_raspi_pin_write(pin, value);
}
static rt_int8_t raspi_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t raspi_pin_read(struct rt_device *device, rt_base_t pin)
{
uint32_t num = pin / 32;
uint32_t pin_level = 0;
rt_ssize_t pin_level = 0;
if(num == 0)
{

View File

@ -43,7 +43,7 @@ static void pico_pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t valu
gpio_put(pin, value);
}
static rt_int8_t pico_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t pico_pin_read(struct rt_device *device, rt_base_t pin)
{
RT_ASSERT((0 <= pin) && (pin < NUM_BANK0_GPIOS));
return (gpio_get(pin)? PIN_HIGH : PIN_LOW);

View File

@ -168,7 +168,7 @@ static void ra_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
R_BSP_PinAccessDisable();
}
static rt_int8_t ra_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t ra_pin_read(rt_device_t dev, rt_base_t pin)
{
if ((pin > RA_MAX_PIN_VALUE) || (pin < RA_MIN_PIN_VALUE))
{

View File

@ -248,7 +248,7 @@ static void pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t value)
HAL_GPIO_SetPinLevel(get_st_gpio(pin), get_st_pin(pin), value);
}
static rt_int8_t pin_read(struct rt_device *dev, rt_base_t pin)
static rt_ssize_t pin_read(struct rt_device *dev, rt_base_t pin)
{
RT_ASSERT(PIN_BANK(pin) < GPIO_BANK_NUM);
return HAL_GPIO_GetPinLevel(get_st_gpio(pin), get_st_pin(pin));;

View File

@ -355,7 +355,7 @@ static void vega_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
GPIO_PinInit(vega_pin_map[pin].gpio, vega_pin_map[pin].gpio_pin, &gpio);
}
static rt_int8_t vega_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t vega_pin_read(rt_device_t dev, rt_base_t pin)
{
uint32_t value;

View File

@ -71,7 +71,7 @@ static void sf2_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
MSS_GPIO_config((mss_gpio_id_t )pin, config);
}
static rt_int8_t sf2_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t sf2_pin_read(rt_device_t dev, rt_base_t pin)
{
uint32_t value;
value = MSS_GPIO_get_inputs() & (1<<pin);

View File

@ -217,7 +217,7 @@ static void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t stm32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t stm32_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;

View File

@ -325,7 +325,7 @@ static void swm_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t swm_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t swm_pin_read(rt_device_t dev, rt_base_t pin)
{
const struct swm_pin_device *gpio_obj;
@ -334,7 +334,7 @@ static rt_int8_t swm_pin_read(rt_device_t dev, rt_base_t pin)
{
return PIN_LOW;
}
return (rt_int8_t)GPIO_GetBit(gpio_obj->gpio, gpio_obj->pin);
return (rt_ssize_t)GPIO_GetBit(gpio_obj->gpio, gpio_obj->pin);
}
static rt_err_t swm_pin_attach_irq(struct rt_device *device,

View File

@ -347,7 +347,7 @@ static void swm_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t swm_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t swm_pin_read(rt_device_t dev, rt_base_t pin)
{
const struct swm_pin_device *gpio_obj;
@ -356,7 +356,7 @@ static rt_int8_t swm_pin_read(rt_device_t dev, rt_base_t pin)
{
return PIN_LOW;
}
return (rt_int8_t)GPIO_GetBit(gpio_obj->gpio, gpio_obj->pin);
return (rt_ssize_t)GPIO_GetBit(gpio_obj->gpio, gpio_obj->pin);
}
static rt_err_t swm_pin_attach_irq(struct rt_device *device,

View File

@ -123,9 +123,9 @@ void _pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
rt_int8_t _pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t _pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;

View File

@ -76,10 +76,10 @@ static void c28x_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t c28x_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t c28x_pin_read(rt_device_t dev, rt_base_t pin)
{
volatile Uint32 *gpioDataReg;
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (PIN_PORT(pin) < PIN_c28x_PORT_MAX)
{

View File

@ -203,9 +203,9 @@ void tkm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
rt_int8_t tkm32_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t tkm32_pin_read(rt_device_t dev, rt_base_t pin)
{
rt_int8_t value;
rt_ssize_t value;
const struct pin_index *index;
value = PIN_LOW;

View File

@ -110,10 +110,10 @@ static void tm4c123_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t ui8Val)
}
}
static int tm4c123_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t tm4c123_pin_read(rt_device_t dev, rt_base_t pin)
{
const struct pin_index *index;
int value = 0;
rt_ssize_t value = 0;
index = get_pin(pin);
if (index == RT_NULL)

View File

@ -58,7 +58,7 @@ static void wm_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t val
return;
}
static rt_int8_t wm_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t wm_pin_read(struct rt_device *device, rt_base_t pin)
{
rt_int16_t gpio_pin;
gpio_pin = wm_get_pin(pin);

View File

@ -323,7 +323,7 @@ void ch32f1_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
GPIO_WriteBit(item->gpio, item->gpio_pin, (BitAction)value);
}
rt_int8_t ch32f1_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t ch32f1_pin_read(rt_device_t dev, rt_base_t pin)
{
const struct pin_info *item;

View File

@ -354,7 +354,7 @@ void ch32f2_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
GPIO_WriteBit(item->gpio, item->gpio_pin, (BitAction)value);
}
rt_int8_t ch32f2_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t ch32f2_pin_read(rt_device_t dev, rt_base_t pin)
{
const struct pin_info *item;

View File

@ -143,11 +143,11 @@ static void ch32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t ch32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t ch32_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_TypeDef *gpio_port;
rt_uint16_t gpio_pin;
rt_int8_t value = PIN_LOW;
rt_ssize_t value = PIN_LOW;
if (PIN_PORT(pin) < PIN_STPORT_MAX)
{

View File

@ -149,7 +149,7 @@ static void gpio_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t v
BITS_SET(px->OUT, bitpos);
}
static rt_int8_t gpio_pin_read(struct rt_device *device, rt_base_t pin)
static rt_ssize_t gpio_pin_read(struct rt_device *device, rt_base_t pin)
{
volatile struct gpio_px_regs *px;

View File

@ -122,7 +122,7 @@ static void yc_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t yc_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t yc_pin_read(rt_device_t dev, rt_base_t pin)
{
return GPIO_IN(pin / 16) & (1 << (pin % 16)) ? 1 : 0;
}

View File

@ -122,7 +122,7 @@ static void yc_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
}
}
static rt_int8_t yc_pin_read(rt_device_t dev, rt_base_t pin)
static rt_ssize_t yc_pin_read(rt_device_t dev, rt_base_t pin)
{
//return GPIO_IN(pin / 16) & (1 << (pin % 16)) ? 1 : 0;
return GPIO_ReadInputDataBit((GPIO_TypeDef)(pin / 16), (GPIO_Pin_TypeDef)(1 << (pin % 16)));

View File

@ -47,7 +47,7 @@ void xgpiops_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
XGpioPs_WritePin(&Gpio, pin, (value == PIN_HIGH)?1:0);
}
rt_int8_t xgpiops_pin_read(rt_device_t dev, rt_base_t pin)
rt_ssize_t xgpiops_pin_read(rt_device_t dev, rt_base_t pin)
{
if (pin >= Gpio.MaxPinNum)
return 0;

View File

@ -128,7 +128,7 @@ struct rt_pin_ops
{
void (*pin_mode)(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
void (*pin_write)(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
rt_int8_t (*pin_read)(struct rt_device *device, rt_base_t pin);
rt_ssize_t (*pin_read)(struct rt_device *device, rt_base_t pin);
rt_err_t (*pin_attach_irq)(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args);
rt_err_t (*pin_detach_irq)(struct rt_device *device, rt_base_t pin);
@ -145,8 +145,8 @@ struct rt_pin_ops
int rt_device_pin_register(const char *name, const struct rt_pin_ops *ops, void *user_data);
void rt_pin_mode(rt_base_t pin, rt_uint8_t mode);
void rt_pin_write(rt_base_t pin, rt_uint8_t value);
rt_int8_t rt_pin_read(rt_base_t pin);
void rt_pin_write(rt_base_t pin, rt_ssize_t value);
rt_ssize_t rt_pin_read(rt_base_t pin);
rt_base_t rt_pin_get(const char *name);
rt_err_t rt_pin_attach_irq(rt_base_t pin, rt_uint8_t mode,
void (*hdr)(void *args), void *args);

View File

@ -139,13 +139,13 @@ void rt_pin_mode(rt_base_t pin, rt_uint8_t mode)
_hw_pin.ops->pin_mode(&_hw_pin.parent, pin, mode);
}
void rt_pin_write(rt_base_t pin, rt_uint8_t value)
void rt_pin_write(rt_base_t pin, rt_ssize_t value)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
_hw_pin.ops->pin_write(&_hw_pin.parent, pin, value);
}
rt_int8_t rt_pin_read(rt_base_t pin)
rt_ssize_t rt_pin_read(rt_base_t pin)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
return _hw_pin.ops->pin_read(&_hw_pin.parent, pin);