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https://github.com/RT-Thread/rt-thread.git
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Merge remote-tracking branch 'remotes/origin/master' into add_stm32_new_framework
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commit
224c171dc8
@ -132,12 +132,12 @@ extern "C" {
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#define SPI1_RX_DMA_INSTANCE DMA2_Stream2
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#define SPI1_RX_DMA_INSTANCE DMA2_Stream2
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#define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3
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#define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3
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#define SPI1_RX_DMA_IRQ DMA2_Stream2_IRQn
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#define SPI1_RX_DMA_IRQ DMA2_Stream2_IRQn
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(USART1_RX_DMA_INSTANCE)
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
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#define USART1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler
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#define UART1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler
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#define USART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define USART1_RX_DMA_INSTANCE DMA2_Stream2
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#define UART1_RX_DMA_INSTANCE DMA2_Stream2
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#define USART1_RX_DMA_CHANNEL DMA_CHANNEL_4
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#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4
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#define USART1_RX_DMA_IRQ DMA2_Stream2_IRQn
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#define UART1_RX_DMA_IRQ DMA2_Stream2_IRQn
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#endif
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#endif
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/* DMA2 stream3 */
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/* DMA2 stream3 */
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@ -184,12 +184,12 @@ extern "C" {
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#define SPI1_TX_DMA_INSTANCE DMA2_Stream5
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#define SPI1_TX_DMA_INSTANCE DMA2_Stream5
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#define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3
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#define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3
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#define SPI1_TX_DMA_IRQ DMA2_Stream5_IRQn
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#define SPI1_TX_DMA_IRQ DMA2_Stream5_IRQn
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(USART1_RX_DMA_INSTANCE)
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
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#define USART1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
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#define UART1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
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#define USART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define USART1_RX_DMA_INSTANCE DMA2_Stream5
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#define UART1_RX_DMA_INSTANCE DMA2_Stream5
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#define USART1_RX_DMA_CHANNEL DMA_CHANNEL_4
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#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4
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#define USART1_RX_DMA_IRQ DMA2_Stream5_IRQn
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#define UART1_RX_DMA_IRQ DMA2_Stream5_IRQn
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#elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE)
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#elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE)
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#define SPI5_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
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#define SPI5_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
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#define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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@ -33,10 +33,10 @@ extern "C" {
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#ifndef UART1_DMA_CONFIG
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#ifndef UART1_DMA_CONFIG
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#define UART1_DMA_CONFIG \
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#define UART1_DMA_CONFIG \
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{ \
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{ \
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.Instance = USART1_RX_DMA_INSTANCE, \
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.Instance = UART1_RX_DMA_INSTANCE, \
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.channel = USART1_RX_DMA_CHANNEL, \
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.channel = UART1_RX_DMA_CHANNEL, \
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.dma_rcc = USART1_RX_DMA_RCC, \
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.dma_rcc = UART1_RX_DMA_RCC, \
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.dma_irq = USART1_RX_DMA_IRQ, \
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.dma_irq = UART1_RX_DMA_IRQ, \
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}
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}
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#endif /* UART1_DMA_CONFIG */
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#endif /* UART1_DMA_CONFIG */
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#endif /* BSP_UART1_RX_USING_DMA */
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#endif /* BSP_UART1_RX_USING_DMA */
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@ -133,12 +133,12 @@ extern "C" {
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#define SPI1_RX_DMA_INSTANCE DMA2_Stream2
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#define SPI1_RX_DMA_INSTANCE DMA2_Stream2
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#define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3
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#define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3
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#define SPI1_RX_DMA_IRQ DMA2_Stream2_IRQn
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#define SPI1_RX_DMA_IRQ DMA2_Stream2_IRQn
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(USART1_RX_DMA_INSTANCE)
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
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#define USART1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler
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#define UART1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler
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#define USART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define USART1_RX_DMA_INSTANCE DMA2_Stream2
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#define UART1_RX_DMA_INSTANCE DMA2_Stream2
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#define USART1_RX_DMA_CHANNEL DMA_CHANNEL_4
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#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4
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#define USART1_RX_DMA_IRQ DMA2_Stream2_IRQn
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#define UART1_RX_DMA_IRQ DMA2_Stream2_IRQn
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#elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE)
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#elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE)
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#define QSPI_DMA_IRQHandler DMA2_Stream2_IRQHandler
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#define QSPI_DMA_IRQHandler DMA2_Stream2_IRQHandler
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#define QSPI_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define QSPI_DMA_RCC RCC_AHB1ENR_DMA2EN
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@ -190,12 +190,12 @@ extern "C" {
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#define SPI1_TX_DMA_INSTANCE DMA2_Stream5
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#define SPI1_TX_DMA_INSTANCE DMA2_Stream5
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#define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3
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#define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3
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#define SPI1_TX_DMA_IRQ DMA2_Stream5_IRQn
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#define SPI1_TX_DMA_IRQ DMA2_Stream5_IRQn
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(USART1_RX_DMA_INSTANCE)
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
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#define USART1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
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#define UART1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
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#define USART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define USART1_RX_DMA_INSTANCE DMA2_Stream5
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#define UART1_RX_DMA_INSTANCE DMA2_Stream5
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#define USART1_RX_DMA_CHANNEL DMA_CHANNEL_4
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#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4
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#define USART1_RX_DMA_IRQ DMA2_Stream5_IRQn
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#define UART1_RX_DMA_IRQ DMA2_Stream5_IRQn
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#elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE)
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#elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE)
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#define SPI5_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
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#define SPI5_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
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#define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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#define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
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@ -33,10 +33,10 @@ extern "C" {
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#ifndef UART1_DMA_CONFIG
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#ifndef UART1_DMA_CONFIG
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#define UART1_DMA_CONFIG \
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#define UART1_DMA_CONFIG \
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{ \
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{ \
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.Instance = USART1_RX_DMA_INSTANCE, \
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.Instance = UART1_RX_DMA_INSTANCE, \
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.channel = USART1_RX_DMA_CHANNEL, \
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.channel = UART1_RX_DMA_CHANNEL, \
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.dma_rcc = USART1_RX_DMA_RCC, \
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.dma_rcc = UART1_RX_DMA_RCC, \
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.dma_irq = USART1_RX_DMA_IRQ, \
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.dma_irq = UART1_RX_DMA_IRQ, \
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}
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}
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#endif /* UART1_DMA_CONFIG */
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#endif /* UART1_DMA_CONFIG */
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#endif /* BSP_UART1_RX_USING_DMA */
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#endif /* BSP_UART1_RX_USING_DMA */
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@ -308,7 +308,7 @@ void USART1_IRQHandler(void)
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rt_interrupt_leave();
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rt_interrupt_leave();
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}
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}
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
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void USART1_DMA_RX_IRQHandler(void)
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void UART1_DMA_RX_IRQHandler(void)
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{
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{
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/* enter interrupt */
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/* enter interrupt */
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rt_interrupt_enter();
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rt_interrupt_enter();
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@ -333,7 +333,7 @@ void USART2_IRQHandler(void)
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rt_interrupt_leave();
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rt_interrupt_leave();
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}
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}
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
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void USART2_DMA_RX_IRQHandler(void)
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void UART2_DMA_RX_IRQHandler(void)
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{
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{
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/* enter interrupt */
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/* enter interrupt */
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rt_interrupt_enter();
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rt_interrupt_enter();
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@ -358,7 +358,7 @@ void USART3_IRQHandler(void)
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rt_interrupt_leave();
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rt_interrupt_leave();
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}
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}
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
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void USART3_DMA_RX_IRQHandler(void)
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void UART3_DMA_RX_IRQHandler(void)
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{
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{
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/* enter interrupt */
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/* enter interrupt */
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rt_interrupt_enter();
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rt_interrupt_enter();
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@ -383,7 +383,7 @@ void UART4_IRQHandler(void)
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rt_interrupt_leave();
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rt_interrupt_leave();
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}
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}
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
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void USART4_DMA_RX_IRQHandler(void)
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void UART4_DMA_RX_IRQHandler(void)
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{
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{
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/* enter interrupt */
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/* enter interrupt */
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rt_interrupt_enter();
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rt_interrupt_enter();
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@ -408,7 +408,7 @@ void UART5_IRQHandler(void)
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rt_interrupt_leave();
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rt_interrupt_leave();
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}
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}
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
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void USART5_DMA_RX_IRQHandler(void)
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void UART5_DMA_RX_IRQHandler(void)
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{
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{
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/* enter interrupt */
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/* enter interrupt */
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rt_interrupt_enter();
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rt_interrupt_enter();
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