[CME_M7] update gcc compile script.
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@ -35,13 +35,13 @@ if PLATFORM == 'gcc':
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AS = PREFIX + 'gcc'
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AR = PREFIX + 'ar'
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LINK = PREFIX + 'gcc'
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TARGET_EXT = 'elf'
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TARGET_EXT = 'axf'
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SIZE = PREFIX + 'size'
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OBJDUMP = PREFIX + 'objdump'
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OBJCPY = PREFIX + 'objcopy'
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DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections'
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CFLAGS = DEVICE + ' -g -Wall -D__FPU_USED'
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DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections'
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CFLAGS = DEVICE + ' -g -Wall '
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AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
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LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T CME_M7.ld'
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@ -64,7 +64,7 @@ elif PLATFORM == 'armcc':
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LINK = 'armlink'
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TARGET_EXT = 'axf'
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DEVICE = ' --cortex-m4.fp'
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DEVICE = ' --cortex-m3'
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CFLAGS = DEVICE + ' --c99 --apcs=interwork'
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AFLAGS = DEVICE
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LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter nuc472_flash.sct'
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@ -113,10 +113,10 @@ elif PLATFORM == 'iar':
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AFLAGS += ' -s+'
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AFLAGS += ' -w+'
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AFLAGS += ' -r'
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AFLAGS += ' --cpu Cortex-M4'
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AFLAGS += ' --cpu Cortex-M3'
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AFLAGS += ' --fpu None'
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LFLAGS = ' --config nuc472_flash.icf'
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LFLAGS = ' --config CME_M7.icf'
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LFLAGS += ' --semihosting'
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LFLAGS += ' --entry __iar_program_start'
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