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[bsp][bluetrum] Optimizing the uart driver

This commit is contained in:
greedyhao 2021-08-08 16:31:00 +08:00
parent 1c61d6e56c
commit 1e7290231e
9 changed files with 252 additions and 88 deletions
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30
bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig
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@ -35,14 +35,34 @@ menu "On-chip Peripheral Drivers"
bool "Enable UART0"
select RT_USING_SERIAL
default y
if BSP_USING_UART0
config BSP_UART0_FIFO_SIZE
int "BSP_UART0_FIFO_SIZE"
range 5 255
default 10
endif
config BSP_USING_UART1
bool "Enable UART1"
select RT_USING_SERIAL
default n
if BSP_USING_UART1
config BSP_UART1_FIFO_SIZE
int "BSP_UART1_FIFO_SIZE"
range 5 255
default 10
endif
config BSP_USING_UART2
bool "Enable UART2"
select RT_USING_SERIAL
default n
if BSP_USING_UART2
config BSP_UART2_FIFO_SIZE
int "BSP_UART2_FIFO_SIZE"
range 5 255
default 10
endif
endif
config BSP_USING_SDIO
@ -174,12 +194,12 @@ menu "On-chip Peripheral Drivers"
default n
if BSP_USING_ONCHIP_RTC
config RTC_USING_INTERNAL_CLK
bool "Using internal clock RTC"
default y
bool "Using internal clock RTC"
default y
config RTC_USING_1S_INT
bool "Using 1 second interrupt"
depends on RT_USING_ALARM
default n
bool "Using 1 second interrupt"
depends on RT_USING_ALARM
default n
endif
menuconfig BSP_USING_ADC

4
bsp/bluetrum/ab32vg1-ab-prougen/board/board.c
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@ -21,6 +21,7 @@ void set_cpu_irq_comm(void (*irq_hook)(void));
void load_cache();
void os_cache_init(void);
void sys_error_hook(uint8_t err_no);
void huart_timer_isr(void);
typedef void (*spiflash_init_func)(uint8_t sf_read, uint8_t dummy);
@ -71,6 +72,9 @@ void timer0_isr(int vector, void *param)
rt_interrupt_enter();
TMR0CPND = BIT(9);
rt_tick_increase();
#ifdef RT_USING_SERIAL
huart_timer_isr();
#endif
rt_interrupt_leave();
}

1
bsp/bluetrum/libraries/hal_drivers/SConscript
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@ -4,6 +4,7 @@ from building import *
cwd = GetCurrentDir()
src = []
src += ['drv_common.c']
path = [cwd]
path += [cwd + '/config']

80
bsp/bluetrum/libraries/hal_drivers/drv_common.c Normal file
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@ -0,0 +1,80 @@
#include "drv_common.h"
#define DRV_THREAD_PRIORITY 18
#define DRV_THREAD_STACK_SIZE 512
#define DRV_THREAD_TIMESLICE 5
enum {
MSG_UART0_IRQ,
MSG_UART1_IRQ,
MSG_UART2_IRQ,
};
static rt_thread_t drv_tid = RT_NULL;
static rt_mq_t drv_mq = RT_NULL;
void uart0_irq_process(void);
void uart1_irq_process(void);
RT_SECTION(".irq.uart")
void uart0_irq_post(void)
{
uint8_t mq_msg = MSG_UART0_IRQ;
rt_mq_send(drv_mq, &mq_msg, 1);
}
RT_SECTION(".irq.uart")
void uart1_irq_post(void)
{
uint8_t mq_msg = MSG_UART1_IRQ;
rt_mq_send(drv_mq, &mq_msg, 1);
}
RT_SECTION(".irq.uart")
void uart2_irq_post(void)
{
uint8_t mq_msg = MSG_UART2_IRQ;
rt_mq_send(drv_mq, &mq_msg, 1);
}
static void drv_thread_entry(void *parameter)
{
uint8_t mq_msg = 0;
while (1) {
rt_mq_recv(drv_mq, &mq_msg, 1, RT_WAITING_FOREVER);
switch (mq_msg) {
#ifdef BSP_USING_UART0
case MSG_UART0_IRQ:
uart0_irq_process();
break;
#endif
#ifdef BSP_USING_UART1
case MSG_UART1_IRQ:
uart1_irq_process();
break;
#endif
#ifdef BSP_USING_UART2
case MSG_UART2_IRQ:
uart2_irq_process();
break;
#endif
default:
break;
}
}
}
static int drv_thread_init(void)
{
drv_mq = rt_mq_create("drv", 1, 128, RT_IPC_FLAG_FIFO);
drv_tid = rt_thread_create("drv",
drv_thread_entry,
RT_NULL,
DRV_THREAD_STACK_SIZE,
DRV_THREAD_PRIORITY,
DRV_THREAD_TIMESLICE);
if (drv_tid != RT_NULL)
rt_thread_startup(drv_tid);
}
INIT_PREV_EXPORT(drv_thread_init);

4
bsp/bluetrum/libraries/hal_drivers/drv_common.h
View File

@ -17,4 +17,8 @@
#define GET_PIN(PORTx,PIN) (uint8_t)__AB32_GET_PIN_##PORTx(PIN)
void uart0_irq_post(void);
void uart1_irq_post(void);
void uart2_irq_post(void);
#endif // DRV_COMMON_H__

183
bsp/bluetrum/libraries/hal_drivers/drv_usart.c
View File

@ -10,7 +10,7 @@
#include "board.h"
#include "drv_usart.h"
#include <shell.h>
#include "api_huart.h"
#ifdef RT_USING_SERIAL
@ -40,6 +40,7 @@ static struct ab32_uart_config uart_config[] =
.name = "uart0",
.instance = UART0_BASE,
.mode = UART_MODE_TX_RX | UART_MODE_1LINE,
.fifo_size = BSP_UART0_FIFO_SIZE,
},
#endif
#ifdef BSP_USING_UART1
@ -47,6 +48,7 @@ static struct ab32_uart_config uart_config[] =
.name = "uart1",
.instance = UART1_BASE,
.mode = UART_MODE_TX_RX,
.fifo_size = BSP_UART1_FIFO_SIZE,
},
#endif
#ifdef BSP_USING_UART2
@ -54,12 +56,17 @@ static struct ab32_uart_config uart_config[] =
.name = "uart2",
.instance = UART2_BASE,
.mode = UART_MODE_TX_RX,
.fifo_size = BSP_UART2_FIFO_SIZE,
}
#endif
};
static struct ab32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
#ifdef HUART_ENABLE
static uint8_t huart_dma[512];
#endif
static rt_err_t ab32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct ab32_uart *uart;
@ -101,7 +108,14 @@ static rt_err_t ab32_configure(struct rt_serial_device *serial, struct serial_co
uart->dma_rx.last_index = 0;
#endif
hal_uart_init(&uart->handle);
if (!uart->uart_dma_flag) {
hal_uart_init(&uart->handle);
}
#ifdef HUART_ENABLE
else {
huart_init_do(HUART_TR_PB3, HUART_TR_PB4, uart->handle.init.baud, huart_dma, 512);
}
#endif
return RT_EOK;
}
@ -141,25 +155,55 @@ static int ab32_putc(struct rt_serial_device *serial, char ch)
RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct ab32_uart, serial);
hal_uart_clrflag(uart->handle.instance, UART_FLAG_TXPND);
hal_uart_write(uart->handle.instance, ch);
while(hal_uart_getflag(uart->handle.instance, UART_FLAG_TXPND) == 0);
if (!uart->uart_dma_flag) {
hal_uart_clrflag(uart->handle.instance, UART_FLAG_TXPND);
hal_uart_write(uart->handle.instance, ch);
while(hal_uart_getflag(uart->handle.instance, UART_FLAG_TXPND) == 0);
}
#ifdef HUART_ENABLE
else {
huart_putchar(ch);
}
#endif
return 1;
}
RT_SECTION(".irq.usart")
static int ab32_getc(struct rt_serial_device *serial)
{
int ch;
struct ab32_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct ab32_uart, serial);
ch = -1;
if(hal_uart_getflag(uart->handle.instance, UART_FLAG_RXPND) != HAL_RESET) {
ch = hal_uart_read(uart->handle.instance);
hal_uart_clrflag(uart->handle.instance, UART_FLAG_RXPND);
switch ((uint32_t)(uart->handle.instance)) {
case (uint32_t)UART0_BASE:
if (uart->rx_idx != uart->rx_idx_prev) {
ch = (int)(uart->rx_buf[uart->rx_idx_prev++ % 10]);
}
break;
case (uint32_t)UART1_BASE:
#ifdef HUART_ENABLE
if ((uart->uart_dma_flag) && (huart_get_rxcnt())) {
ch = huart_getchar();
} else
#endif
{
if (uart->rx_idx != uart->rx_idx_prev) {
ch = (int)(uart->rx_buf[uart->rx_idx_prev++ % 10]);
}
}
break;
case (uint32_t)UART2_BASE:
if (uart->rx_idx != uart->rx_idx_prev) {
ch = (int)(uart->rx_buf[uart->rx_idx_prev++ % 10]);
}
break;
default:
break;
}
return ch;
@ -170,78 +214,24 @@ static rt_size_t ab32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *
return -1;
}
extern struct finsh_shell *shell;
RT_SECTION(".irq.usart")
static rt_err_t shell_rx_ind(void)
void uart0_irq_process(void)
{
RT_ASSERT(shell != RT_NULL);
/* release semaphore to let finsh thread rx data */
rt_sem_release(&shell->rx_sem);
return RT_EOK;
rt_hw_serial_isr(&(uart_obj[UART0_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
}
RT_SECTION(".irq.usart")
void uart_irq_process(struct rt_serial_device *serial)
#ifdef BSP_USING_UART1
void uart1_irq_process(void)
{
int ch = -1;
rt_base_t level;
struct rt_serial_rx_fifo* rx_fifo;
/* interrupt mode receive */
rx_fifo = (struct rt_serial_rx_fifo*)serial->serial_rx;
RT_ASSERT(rx_fifo != RT_NULL);
while (1)
{
ch = serial->ops->getc(serial);
if (ch == -1) break;
/* disable interrupt */
level = rt_hw_interrupt_disable();
rx_fifo->buffer[rx_fifo->put_index] = ch;
rx_fifo->put_index += 1;
if (rx_fifo->put_index >= serial->config.bufsz) rx_fifo->put_index = 0;
/* if the next position is read index, discard this 'read char' */
if (rx_fifo->put_index == rx_fifo->get_index)
{
rx_fifo->get_index += 1;
rx_fifo->is_full = RT_TRUE;
if (rx_fifo->get_index >= serial->config.bufsz) rx_fifo->get_index = 0;
// _serial_check_buffer_size();
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
rt_size_t rx_length;
/* get rx length */
level = rt_hw_interrupt_disable();
rx_length = (rx_fifo->put_index >= rx_fifo->get_index)? (rx_fifo->put_index - rx_fifo->get_index):
(serial->config.bufsz - (rx_fifo->get_index - rx_fifo->put_index));
rt_hw_interrupt_enable(level);
if ((serial->parent.rx_indicate != RT_NULL) && (rx_length != 0)) {
#ifdef RT_CONSOLE_DEVICE_NAME
if (serial == &uart_obj[*(RT_CONSOLE_DEVICE_NAME + 4) - '0'].serial) {
shell_rx_ind();
} else
#endif
{
rt_kprintf("rx_indicate must loacted in the .comm section!\n");
//serial->parent.rx_indicate(&serial->parent, rx_length);
}
}
rt_hw_serial_isr(&(uart_obj[UART1_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
}
#endif
#ifdef BSP_USING_UART2
void uart2_irq_process(void)
{
rt_hw_serial_isr(&(uart_obj[UART2_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
}
#endif
RT_SECTION(".irq.usart")
static void uart_isr(int vector, void *param)
@ -251,25 +241,50 @@ static void uart_isr(int vector, void *param)
#ifdef BSP_USING_UART0
if(hal_uart_getflag(UART0_BASE, UART_FLAG_RXPND)) //RX one byte finish
{
uart_irq_process(&(uart_obj[UART0_INDEX].serial));
uart_obj[0].rx_buf[uart_obj[0].rx_idx++ % 10] = hal_uart_read(UART0_BASE);
hal_uart_clrflag(UART0_BASE, UART_FLAG_RXPND);
uart0_irq_post();
}
#endif
#ifdef BSP_USING_UART1
if(hal_uart_getflag(UART1_BASE, UART_FLAG_RXPND)) //RX one byte finish
{
uart_irq_process(&(uart_obj[UART1_INDEX].serial));
uart_obj[1].rx_buf[uart_obj[1].rx_idx++ % 10] = hal_uart_read(UART1_BASE);
hal_uart_clrflag(UART1_BASE, UART_FLAG_RXPND);
uart1_irq_post();
}
#endif
#ifdef BSP_USING_UART2
if(hal_uart_getflag(UART2_BASE, UART_FLAG_RXPND)) //RX one byte finish
{
uart_irq_process(&(uart_obj[UART2_INDEX].serial));
uart_obj[2].rx_buf[uart_obj[2].rx_idx++ % 10] = hal_uart_read(UART2_BASE);
hal_uart_clrflag(UART2_BASE, UART_FLAG_RXPND);
uart2_irq_post();
}
#endif
rt_interrupt_leave();
}
#ifdef HUART_ENABLE
RT_SECTION(".irq.huart")
void huart_timer_isr(void)
{
huart_if_rx_ovflow();
if (0 == huart_get_rxcnt()) {
return;
}
uart1_irq_post();
}
#else
RT_SECTION(".irq.huart")
void huart_timer_isr(void)
{
}
#endif
static const struct rt_uart_ops ab32_uart_ops =
{
.configure = ab32_configure,
@ -291,9 +306,17 @@ int rt_hw_usart_init(void)
{
/* init UART object */
uart_obj[i].config = &uart_config[i];
uart_obj[i].rx_idx = 0;
uart_obj[i].rx_idx_prev = 0;
uart_obj[i].serial.ops = &ab32_uart_ops;
uart_obj[i].serial.config = config;
uart_obj[i].serial.config.baud_rate = 1500000;
uart_obj[i].rx_buf = rt_malloc(uart_config[i].fifo_size);
if (uart_obj[i].rx_buf == RT_NULL) {
LOG_E("uart%d malloc failed!", i);
continue;
}
/* register UART device */
result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
@ -305,7 +328,7 @@ int rt_hw_usart_init(void)
RT_ASSERT(result == RT_EOK);
}
return result;
return result;
}
#endif

10
bsp/bluetrum/libraries/hal_drivers/drv_usart.h
View File

@ -19,9 +19,10 @@
struct ab32_uart_config
{
const char *name;
hal_sfr_t instance;
uint8_t mode;
uint8_t reserve[3];
hal_sfr_t instance;
uint8_t mode;
uint16_t fifo_size;
uint8_t reserve[1];
// struct dma_config *dma_rx;
// struct dma_config *dma_tx;
};
@ -45,6 +46,9 @@ struct ab32_uart
#endif
rt_uint16_t uart_dma_flag;
struct rt_serial_device serial;
rt_uint8_t *rx_buf;
rt_uint8_t rx_idx;
rt_uint8_t rx_idx_prev;
};
#endif

28
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/api_huart.h Normal file
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@ -0,0 +1,28 @@
#ifndef API_HUART_H__
#define API_HUART_H__
enum {
HUART_TR_PA7 = 0,
HUART_TR_PB2,
HUART_TR_PB3,
HUART_TR_PE7,
HUART_TR_PA1,
HUART_TR_PA6,
HUART_TR_PB1,
HUART_TR_PB4,
HUART_TR_PE6,
HUART_TR_PA0,
};
void huart_init_do(uint8_t tx_port, uint8_t rx_port, uint32_t baud_rate, uint8_t *buf, uint16_t buf_size);
void huart_setbaudrate(unsigned int baudrate);
void huart_putchar(const char ch);
void huart_tx(const void *buf, unsigned int len);
unsigned int huart_get_rxcnt(void);
void huart_rxfifo_clear(void);
char huart_getchar(void);
void huart_exit(void);
void huart_if_rx_ovflow(void);
#endif

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bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/libhal.a
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