parent
56e83fe735
commit
1e10891f37
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@ -660,12 +660,12 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
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|| defined(SOC_SERIES_STM32L0)
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|| defined(SOC_SERIES_STM32L0)
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
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SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
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tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
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tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
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#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
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#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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SET_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);
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SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
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tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);
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tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
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#endif
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#endif
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UNUSED(tmpreg); /* To avoid compiler warnings */
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UNUSED(tmpreg); /* To avoid compiler warnings */
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}
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}
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