[libcpu] Add JuiceVm SUPPORT.
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# RT-Thread building script for component
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from building import *
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Import('rtconfig')
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cwd = GetCurrentDir()
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src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
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CPPPATH = [cwd]
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ASFLAGS = ''
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group = DefineGroup('CPU', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
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Return('group')
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021/04/24 Juice The first version
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*/
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#include <rthw.h>
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#include <board.h>
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typedef void (*irq_handler_t)(void);
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extern const irq_handler_t isrTable[];
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uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc, uintptr_t *sp)
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{
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uint32_t intNum;
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if (mcause & 0x80000000) /* For external interrupt. */
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{
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}
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else
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{
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intNum = mcause & 0x1FUL;
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/* Now call the real irq handler for intNum */
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if (intNum <= 24)
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{
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if (isrTable[intNum])isrTable[intNum]();
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}
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}
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}
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021/04/24 Juice The first version
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*/
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#include "cpuport.h"
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.section .text.entry
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.align 2
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.global trap_entry
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trap_entry:
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/* save thread context to thread stack */
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addi sp, sp, -32 * REGBYTES
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STORE x1, 1 * REGBYTES(sp)
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csrr x1, mstatus
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STORE x1, 2 * REGBYTES(sp)
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csrr x1, mepc
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STORE x1, 0 * REGBYTES(sp)
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STORE x4, 4 * REGBYTES(sp)
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STORE x5, 5 * REGBYTES(sp)
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STORE x6, 6 * REGBYTES(sp)
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STORE x7, 7 * REGBYTES(sp)
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STORE x8, 8 * REGBYTES(sp)
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STORE x9, 9 * REGBYTES(sp)
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STORE x10, 10 * REGBYTES(sp)
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STORE x11, 11 * REGBYTES(sp)
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STORE x12, 12 * REGBYTES(sp)
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STORE x13, 13 * REGBYTES(sp)
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STORE x14, 14 * REGBYTES(sp)
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STORE x15, 15 * REGBYTES(sp)
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STORE x16, 16 * REGBYTES(sp)
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STORE x17, 17 * REGBYTES(sp)
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STORE x18, 18 * REGBYTES(sp)
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STORE x19, 19 * REGBYTES(sp)
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STORE x20, 20 * REGBYTES(sp)
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STORE x21, 21 * REGBYTES(sp)
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STORE x22, 22 * REGBYTES(sp)
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STORE x23, 23 * REGBYTES(sp)
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STORE x24, 24 * REGBYTES(sp)
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STORE x25, 25 * REGBYTES(sp)
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STORE x26, 26 * REGBYTES(sp)
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STORE x27, 27 * REGBYTES(sp)
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STORE x28, 28 * REGBYTES(sp)
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STORE x29, 29 * REGBYTES(sp)
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STORE x30, 30 * REGBYTES(sp)
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STORE x31, 31 * REGBYTES(sp)
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/* switch to interrupt stack */
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move s0, sp
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/* handle interrupt */
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call rt_interrupt_enter
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csrr a0, mcause
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csrr a1, mepc
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mv a2, s0
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call handle_trap
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call rt_interrupt_leave
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/* switch to from_thread stack */
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move sp, s0
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/* need to switch new thread */
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la s0, rt_thread_switch_interrupt_flag
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lw s2, 0(s0)
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beqz s2, spurious_interrupt
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sw zero, 0(s0)
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la s0, rt_interrupt_from_thread
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LOAD s1, 0(s0)
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STORE sp, 0(s1)
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la s0, rt_interrupt_to_thread
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LOAD s1, 0(s0)
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LOAD sp, 0(s1)
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spurious_interrupt:
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tail rt_hw_context_switch_exit
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@ -0,0 +1,65 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021/04/24 Juice The first version
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*/
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.global _start
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.section ".start", "ax"
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_start:
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.align 3
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csrw mideleg, 0
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csrw medeleg, 0
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csrw mie, 0
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csrw mip, 0
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la t0, trap_entry
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csrw mtvec, t0
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li x1, 0
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li x2, 0
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li x3, 0
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li x4, 0
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li x5, 0
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li x6, 0
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li x7, 0
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li x8, 0
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li x9, 0
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li x10, 0
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li x11, 0
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li x12, 0
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li x13, 0
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li x14, 0
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li x15, 0
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li x16, 0
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li x17, 0
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li x18, 0
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li x19, 0
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li x20, 0
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li x21, 0
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li x22, 0
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li x23, 0
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li x24, 0
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li x25, 0
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li x26, 0
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li x27, 0
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li x28, 0
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li x29, 0
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li x30, 0
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li x31, 0
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/* set to initial state of FPU and disable interrupt */
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li t0, 0
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csrs mstatus, t0
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.option push
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.option norelax
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la gp, __global_pointer$
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la sp, __stack
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call entry
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call exit
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.option pop
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