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lpc408x的ADC驱动进行格式处理

This commit is contained in:
fzxhub 2021-09-18 09:41:44 +08:00
parent 79bed2c0fd
commit 1b87dd23cb
1 changed files with 43 additions and 43 deletions
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64
bsp/lpc408x/drivers/drv_adc.c
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@ -20,47 +20,47 @@ struct lpc_adc
*/
static rt_err_t lpc_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
{
struct lpc_adc *adc;
struct lpc_adc *adc;
RT_ASSERT(device != RT_NULL);
adc = (struct lpc_adc *)device->parent.user_data;
//enabled ADC
if(enabled == RT_FALSE) adc->ADC->CR &= ~(1<<21);
else adc->ADC->CR |= (1<<21);
//enabled ADC
if(enabled == RT_FALSE) adc->ADC->CR &= ~(1<<21);
else adc->ADC->CR |= (1<<21);
//Select the channel
adc->ADC->CR |= (1<<channel);
//Select the channel
adc->ADC->CR |= (1<<channel);
return RT_EOK;
}
static rt_err_t lpc_adc_convert(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
{
rt_uint32_t data;
rt_uint32_t data;
struct lpc_adc *adc;
struct lpc_adc *adc;
RT_ASSERT(device != RT_NULL);
adc = (struct lpc_adc *)device->parent.user_data;
adc->ADC->CR = (LPC_ADC->CR & 0x00FFFF00) | (1<<channel) | (1 << 24);
while ((adc->ADC->GDR & 0x80000000) == 0);
adc->ADC->CR = adc->ADC->CR | (1 << 24);
while ((adc->ADC->GDR & 0x80000000) == 0);
adc->ADC->CR = (LPC_ADC->CR & 0x00FFFF00) | (1<<channel) | (1 << 24);
while ((adc->ADC->GDR & 0x80000000) == 0);
adc->ADC->CR = adc->ADC->CR | (1 << 24);
while ((adc->ADC->GDR & 0x80000000) == 0);
data = adc->ADC->GDR;
data = (data >> 4) & 0xFFF;
data = adc->ADC->GDR;
data = (data >> 4) & 0xFFF;
*value = data;
*value = data;
return RT_EOK;
return RT_EOK;
}
static const struct rt_adc_ops lpc_adc_ops =
{
lpc_adc_enabled,
lpc_adc_convert,
lpc_adc_enabled,
lpc_adc_convert,
};
struct lpc_adc lpc_adc0 =
@ -72,16 +72,16 @@ struct rt_adc_device adc0;
int rt_hw_adc_init(void)
{
rt_err_t ret = RT_EOK;
struct lpc_adc *adc;
rt_err_t ret = RT_EOK;
struct lpc_adc *adc;
adc = &lpc_adc0;
adc = &lpc_adc0;
adc0.ops = &lpc_adc_ops;
adc0.parent.user_data = adc;
adc0.ops = &lpc_adc_ops;
adc0.parent.user_data = adc;
//ADC port
LPC_IOCON->P0_23 = 0x01; //ADC0[0]
//ADC port
LPC_IOCON->P0_23 = 0x01; //ADC0[0]
LPC_IOCON->P0_24 = 0x01; //ADC0[1]
LPC_IOCON->P0_25 = 0x01; //ADC0[2]
LPC_IOCON->P0_26 = 0x01; //ADC0[3]
@ -91,10 +91,10 @@ int rt_hw_adc_init(void)
LPC_IOCON->P0_13 = 0x03; //ADC0[7]
//clock
LPC_SC->PCONP |= (1U << 12);
//config
LPC_ADC->CR = 0;
//clock
LPC_SC->PCONP |= (1U << 12);
//config
LPC_ADC->CR = 0;
LPC_ADC->CR = (1 << 0)| // SEL
((PeripheralClock / 1000000 - 1) << 8) | // CLKDIV = Fpclk / 1000000 - 1
(0 << 16)| // BURST
@ -103,12 +103,12 @@ int rt_hw_adc_init(void)
(0 << 22)| // TEST1
(1 << 24)| // START
(0 << 27); // EDGE
//waiting
//waiting
while ((LPC_ADC->GDR & 0x80000000) == 0);
ret = rt_hw_adc_register(&adc0,"adc0",&lpc_adc_ops,adc);
ret = rt_hw_adc_register(&adc0,"adc0",&lpc_adc_ops,adc);
return ret;
return ret;
}
INIT_BOARD_EXPORT(rt_hw_adc_init);