diff --git a/bsp/lpc408x/drivers/drv_adc.c b/bsp/lpc408x/drivers/drv_adc.c index ff7825df55..0d9501b505 100644 --- a/bsp/lpc408x/drivers/drv_adc.c +++ b/bsp/lpc408x/drivers/drv_adc.c @@ -20,47 +20,47 @@ struct lpc_adc */ static rt_err_t lpc_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled) { - struct lpc_adc *adc; + struct lpc_adc *adc; RT_ASSERT(device != RT_NULL); adc = (struct lpc_adc *)device->parent.user_data; - - //enabled ADC - if(enabled == RT_FALSE) adc->ADC->CR &= ~(1<<21); - else adc->ADC->CR |= (1<<21); - - //Select the channel - adc->ADC->CR |= (1<ADC->CR &= ~(1<<21); + else adc->ADC->CR |= (1<<21); + + //Select the channel + adc->ADC->CR |= (1<parent.user_data; - - adc->ADC->CR = (LPC_ADC->CR & 0x00FFFF00) | (1<ADC->GDR & 0x80000000) == 0); - adc->ADC->CR = adc->ADC->CR | (1 << 24); - while ((adc->ADC->GDR & 0x80000000) == 0); - data = adc->ADC->GDR; - data = (data >> 4) & 0xFFF; - - *value = data; - - return RT_EOK; + adc->ADC->CR = (LPC_ADC->CR & 0x00FFFF00) | (1<ADC->GDR & 0x80000000) == 0); + adc->ADC->CR = adc->ADC->CR | (1 << 24); + while ((adc->ADC->GDR & 0x80000000) == 0); + + data = adc->ADC->GDR; + data = (data >> 4) & 0xFFF; + + *value = data; + + return RT_EOK; } static const struct rt_adc_ops lpc_adc_ops = { - lpc_adc_enabled, - lpc_adc_convert, + lpc_adc_enabled, + lpc_adc_convert, }; struct lpc_adc lpc_adc0 = @@ -72,16 +72,16 @@ struct rt_adc_device adc0; int rt_hw_adc_init(void) { - rt_err_t ret = RT_EOK; - struct lpc_adc *adc; - - adc = &lpc_adc0; - - adc0.ops = &lpc_adc_ops; - adc0.parent.user_data = adc; - - //ADC port - LPC_IOCON->P0_23 = 0x01; //ADC0[0] + rt_err_t ret = RT_EOK; + struct lpc_adc *adc; + + adc = &lpc_adc0; + + adc0.ops = &lpc_adc_ops; + adc0.parent.user_data = adc; + + //ADC port + LPC_IOCON->P0_23 = 0x01; //ADC0[0] LPC_IOCON->P0_24 = 0x01; //ADC0[1] LPC_IOCON->P0_25 = 0x01; //ADC0[2] LPC_IOCON->P0_26 = 0x01; //ADC0[3] @@ -89,12 +89,12 @@ int rt_hw_adc_init(void) LPC_IOCON->P1_31 = 0x03; //ADC0[5] LPC_IOCON->P0_12 = 0x03; //ADC0[6] LPC_IOCON->P0_13 = 0x03; //ADC0[7] - - - //clock - LPC_SC->PCONP |= (1U << 12); - //config - LPC_ADC->CR = 0; + + + //clock + LPC_SC->PCONP |= (1U << 12); + //config + LPC_ADC->CR = 0; LPC_ADC->CR = (1 << 0)| // SEL ((PeripheralClock / 1000000 - 1) << 8) | // CLKDIV = Fpclk / 1000000 - 1 (0 << 16)| // BURST @@ -103,12 +103,12 @@ int rt_hw_adc_init(void) (0 << 22)| // TEST1 (1 << 24)| // START (0 << 27); // EDGE - //waiting + //waiting while ((LPC_ADC->GDR & 0x80000000) == 0); - ret = rt_hw_adc_register(&adc0,"adc0",&lpc_adc_ops,adc); - - return ret; + ret = rt_hw_adc_register(&adc0,"adc0",&lpc_adc_ops,adc); + + return ret; } INIT_BOARD_EXPORT(rt_hw_adc_init);