diff --git a/bsp/ls1cdev/.config b/bsp/ls1cdev/.config index a16ee472b4..e851e39127 100644 --- a/bsp/ls1cdev/.config +++ b/bsp/ls1cdev/.config @@ -228,20 +228,6 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # RT-Thread online packages # -# -# system packages -# - -# -# RT-Thread GUI Engine -# -# CONFIG_PKG_USING_GUIENGINE is not set -# CONFIG_PKG_USING_LVGL is not set -# CONFIG_PKG_USING_LWEXT4 is not set -# CONFIG_PKG_USING_PARTITION is not set -# CONFIG_PKG_USING_SQLITE is not set -# CONFIG_PKG_USING_RTI is not set - # # IoT - internet of things # @@ -271,6 +257,7 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_ONENET is not set # # security packages @@ -289,6 +276,7 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # multimedia packages # # CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set # # tools packages @@ -299,6 +287,26 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_IPERF is not set +# +# system packages +# + +# +# RT-Thread GUI Engine +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_STM32F4_HAL is not set +# CONFIG_PKG_USING_STM32F4_DRIVERS is not set + # # miscellaneous packages # @@ -306,13 +314,18 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set # CONFIG_PKG_USING_MULTIBUTTON is not set -# CONFIG_PKG_USING_SAMPLES is not set # CONFIG_PKG_USING_CANFESTIVAL is not set +# +# sample package +# +# CONFIG_PKG_USING_SAMPLES is not set + # # example package: hello # # CONFIG_PKG_USING_HELLO is not set +# CONFIG_RT_USING_SELF_BOOT is not set CONFIG_RT_USING_UART2=y CONFIG_RT_UART_RX_BUFFER_SIZE=64 CONFIG_RT_USING_GMAC_INT_MODE=y diff --git a/bsp/ls1cdev/SConstruct b/bsp/ls1cdev/SConstruct index 17e1d15db3..3096becfc7 100644 --- a/bsp/ls1cdev/SConstruct +++ b/bsp/ls1cdev/SConstruct @@ -12,6 +12,8 @@ from building import * TARGET = 'rtthread.' + rtconfig.TARGET_EXT +rtconfig.AFLAGS += ' -I' + str(Dir('#')) + env = Environment(tools = ['mingw'], AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, @@ -24,6 +26,13 @@ Export('rtconfig') # prepare building environment objs = PrepareBuilding(env, RTT_ROOT) + +if GetDepend('RT_USING_SELF_BOOT'): + rtconfig.LFLAGS += " -Ttext 0x80010000" +else: + rtconfig.LFLAGS += " -Ttext 0x80200000" +env.Replace(LINKFLAGS = rtconfig.LFLAGS) + if GetDepend('RT_USING_RTGUI'): objs = objs + SConscript(RTT_ROOT + '/examples/gui/SConscript', variant_dir='build/examples/gui', duplicate=0) diff --git a/bsp/ls1cdev/drivers/board.c b/bsp/ls1cdev/drivers/board.c index 64f0db56ab..a7100a04c4 100644 --- a/bsp/ls1cdev/drivers/board.c +++ b/bsp/ls1cdev/drivers/board.c @@ -100,6 +100,9 @@ void rt_hw_board_init(void) /* init hardware interrupt */ rt_hw_interrupt_init(); + /* clear bev */ + write_c0_status(read_c0_status()&(~(1<<22))); + /* copy vector */ rt_memcpy((void *)A_K0BASE, tlb_refill_exception, 0x80); rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x80); @@ -109,7 +112,7 @@ void rt_hw_board_init(void) invalidate_icache_all(); #ifdef RT_USING_HEAP - rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END); + rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END); #endif #ifdef RT_USING_SERIAL diff --git a/bsp/ls1cdev/drivers/net/synopGMAC.c b/bsp/ls1cdev/drivers/net/synopGMAC.c index 7e665d3964..6aff98d22b 100644 --- a/bsp/ls1cdev/drivers/net/synopGMAC.c +++ b/bsp/ls1cdev/drivers/net/synopGMAC.c @@ -31,6 +31,8 @@ #include "mii.c" #include "synopGMAC_debug.h" #include +#include "ls1c_pin.h" + #define RMII #define Gmac_base 0xbfe10000 @@ -865,10 +867,22 @@ int rt_hw_eth_init(void) u64 base_addr = Gmac_base; struct synopGMACNetworkAdapter * synopGMACadapter; static u8 mac_addr0[6] = DEFAULT_MAC_ADDRESS; - + int index; + rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO); rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO); + for(index=21; index<=30;index++) + { + pin_set_purpose(index, PIN_PURPOSE_OTHER); + pin_set_remap(index, PIN_REMAP_DEFAULT); + } + pin_set_purpose(35, PIN_PURPOSE_OTHER); + pin_set_remap(35, PIN_REMAP_DEFAULT); + *((volatile unsigned int *)0xbfd00424) &= ~(7 << 28); + *((volatile unsigned int *)0xbfd00424) |= (1 << 30); //wl rmii + + memset(ð_dev, 0, sizeof(eth_dev)); synopGMACadapter = (struct synopGMACNetworkAdapter * )plat_alloc_memory(sizeof (struct synopGMACNetworkAdapter)); diff --git a/bsp/ls1cdev/kconfig b/bsp/ls1cdev/kconfig index 9e9a7e9520..23ecbb3190 100644 --- a/bsp/ls1cdev/kconfig +++ b/bsp/ls1cdev/kconfig @@ -19,6 +19,10 @@ config $PKGS_DIR source "$RTT_DIR/Kconfig" source "$PKGS_DIR/Kconfig" +config RT_USING_SELF_BOOT + bool "Enable RT-Thread run without bootloader" + default n + if RT_USING_SERIAL config RT_USING_UART2 bool "Using RT_USING_UART2" diff --git a/bsp/ls1cdev/libraries/ls1c_pin.c b/bsp/ls1cdev/libraries/ls1c_pin.c index 15b4157b15..81f56c0b0c 100644 --- a/bsp/ls1cdev/libraries/ls1c_pin.c +++ b/bsp/ls1cdev/libraries/ls1c_pin.c @@ -1,4 +1,4 @@ -// 引脚功能(普通gpio，pwm，复用等)相关接口 +// 寮曡剼鍔熻兘(鏅歡pio锛宲wm锛屽鐢ㄧ瓑)鐩稿叧鎺ュ彛 #include "ls1c_public.h" @@ -8,21 +8,21 @@ /* - * 把指定pin设置为指定用途(普通gpio，非gpio) - * @gpio gpio引脚编号 - * @purpose 用途 + * 鎶婃寚瀹歱in璁剧疆涓烘寚瀹氱敤閫(鏅歡pio锛岄潪gpio) + * @gpio gpio寮曡剼缂栧彿 + * @purpose 鐢ㄩ */ void pin_set_purpose(unsigned int gpio, pin_purpose_t purpose) { - volatile unsigned int *gpio_cfgx; // GPIO_CFGx寄存器 + volatile unsigned int *gpio_cfgx; // GPIO_CFGx瀵勫瓨鍣 unsigned int pin = GPIO_GET_PIN(gpio); gpio_cfgx = gpio_get_cfg_reg(gpio); - if (PIN_PURPOSE_GPIO == purpose) // 引脚用作普通gpio + if (PIN_PURPOSE_GPIO == purpose) // 寮曡剼鐢ㄤ綔鏅歡pio { reg_set_one_bit(gpio_cfgx, pin); } - else // 引脚用作其它功能(非gpio) + else // 寮曡剼鐢ㄤ綔鍏跺畠鍔熻兘(闈瀏pio) { reg_clr_one_bit(gpio_cfgx, pin); } @@ -33,116 +33,118 @@ void pin_set_purpose(unsigned int gpio, pin_purpose_t purpose) /* - * 设置指定pin为第n复用 - * @gpio gpio编号 - * @remap 第n复用 + * 璁剧疆鎸囧畾pin涓虹n澶嶇敤 + * @gpio gpio缂栧彿 + * @remap 绗琻澶嶇敤 */ void pin_set_remap(unsigned int gpio, pin_remap_t remap) { - volatile unsigned int *reg = NULL; // 复用寄存器 + volatile unsigned int *reg = NULL; // 澶嶇敤瀵勫瓨鍣 unsigned int port = GPIO_GET_PORT(gpio); unsigned int pin = GPIO_GET_PIN(gpio); - int i; + int i; - /*指定全部pin复用为0*/ - for(i =0; i <=4; i++) - { - reg = (volatile unsigned int *)((LS1C_CBUS_FIRST0)+((port)*0x04)+((i)*0x10)); - // 置0 - reg_clr_one_bit(reg, pin); - } + /*鎸囧畾鍏ㄩ儴pin澶嶇敤涓0*/ + for (i = 0; i <= 4; i++) + { + reg = (volatile unsigned int *)((LS1C_CBUS_FIRST0) + ((port) * 0x04) + ((i) * 0x10)); + // 缃0 + reg_clr_one_bit(reg, pin); + } + + if (remap == PIN_REMAP_DEFAULT) return; switch (port) { - case 0: - switch (remap) - { - case PIN_REMAP_FIRST: - reg = (volatile unsigned int *)LS1C_CBUS_FIRST0; - break; - case PIN_REMAP_SECOND: - reg = (volatile unsigned int *)LS1C_CBUS_SECOND0; - break; - case PIN_REMAP_THIRD: - reg = (volatile unsigned int *)LS1C_CBUS_THIRD0; - break; - case PIN_REMAP_FOURTH: - reg = (volatile unsigned int *)LS1C_CBUS_FOURTH0; - break; - case PIN_REMAP_FIFTH: - reg = (volatile unsigned int *)LS1C_CBUS_FIFTH0; - break; - } + case 0: + switch (remap) + { + case PIN_REMAP_FIRST: + reg = (volatile unsigned int *)LS1C_CBUS_FIRST0; break; - - case 1: - switch (remap) - { - case PIN_REMAP_FIRST: - reg = (volatile unsigned int *)LS1C_CBUS_FIRST1; - break; - case PIN_REMAP_SECOND: - reg = (volatile unsigned int *)LS1C_CBUS_SECOND1; - break; - case PIN_REMAP_THIRD: - reg = (volatile unsigned int *)LS1C_CBUS_THIRD1; - break; - case PIN_REMAP_FOURTH: - reg = (volatile unsigned int *)LS1C_CBUS_FOURTH1; - break; - case PIN_REMAP_FIFTH: - reg = (volatile unsigned int *)LS1C_CBUS_FIFTH1; - break; - } + case PIN_REMAP_SECOND: + reg = (volatile unsigned int *)LS1C_CBUS_SECOND0; break; - - case 2: - switch (remap) - { - case PIN_REMAP_FIRST: - reg = (volatile unsigned int *)LS1C_CBUS_FIRST2; - break; - case PIN_REMAP_SECOND: - reg = (volatile unsigned int *)LS1C_CBUS_SECOND2; - break; - case PIN_REMAP_THIRD: - reg = (volatile unsigned int *)LS1C_CBUS_THIRD2; - break; - case PIN_REMAP_FOURTH: - reg = (volatile unsigned int *)LS1C_CBUS_FOURTH2; - break; - case PIN_REMAP_FIFTH: - reg = (volatile unsigned int *)LS1C_CBUS_FIFTH2; - break; - } + case PIN_REMAP_THIRD: + reg = (volatile unsigned int *)LS1C_CBUS_THIRD0; break; - - case 3: - switch (remap) - { - case PIN_REMAP_FIRST: - reg = (volatile unsigned int *)LS1C_CBUS_FIRST3; - break; - case PIN_REMAP_SECOND: - reg = (volatile unsigned int *)LS1C_CBUS_SECOND3; - break; - case PIN_REMAP_THIRD: - reg = (volatile unsigned int *)LS1C_CBUS_THIRD3; - break; - case PIN_REMAP_FOURTH: - reg = (volatile unsigned int *)LS1C_CBUS_FOURTH3; - break; - case PIN_REMAP_FIFTH: - reg = (volatile unsigned int *)LS1C_CBUS_FIFTH3; - break; - } + case PIN_REMAP_FOURTH: + reg = (volatile unsigned int *)LS1C_CBUS_FOURTH0; break; + case PIN_REMAP_FIFTH: + reg = (volatile unsigned int *)LS1C_CBUS_FIFTH0; + break; + } + break; - default: - return ; + case 1: + switch (remap) + { + case PIN_REMAP_FIRST: + reg = (volatile unsigned int *)LS1C_CBUS_FIRST1; + break; + case PIN_REMAP_SECOND: + reg = (volatile unsigned int *)LS1C_CBUS_SECOND1; + break; + case PIN_REMAP_THIRD: + reg = (volatile unsigned int *)LS1C_CBUS_THIRD1; + break; + case PIN_REMAP_FOURTH: + reg = (volatile unsigned int *)LS1C_CBUS_FOURTH1; + break; + case PIN_REMAP_FIFTH: + reg = (volatile unsigned int *)LS1C_CBUS_FIFTH1; + break; + } + break; + + case 2: + switch (remap) + { + case PIN_REMAP_FIRST: + reg = (volatile unsigned int *)LS1C_CBUS_FIRST2; + break; + case PIN_REMAP_SECOND: + reg = (volatile unsigned int *)LS1C_CBUS_SECOND2; + break; + case PIN_REMAP_THIRD: + reg = (volatile unsigned int *)LS1C_CBUS_THIRD2; + break; + case PIN_REMAP_FOURTH: + reg = (volatile unsigned int *)LS1C_CBUS_FOURTH2; + break; + case PIN_REMAP_FIFTH: + reg = (volatile unsigned int *)LS1C_CBUS_FIFTH2; + break; + } + break; + + case 3: + switch (remap) + { + case PIN_REMAP_FIRST: + reg = (volatile unsigned int *)LS1C_CBUS_FIRST3; + break; + case PIN_REMAP_SECOND: + reg = (volatile unsigned int *)LS1C_CBUS_SECOND3; + break; + case PIN_REMAP_THIRD: + reg = (volatile unsigned int *)LS1C_CBUS_THIRD3; + break; + case PIN_REMAP_FOURTH: + reg = (volatile unsigned int *)LS1C_CBUS_FOURTH3; + break; + case PIN_REMAP_FIFTH: + reg = (volatile unsigned int *)LS1C_CBUS_FIFTH3; + break; + } + break; + + default: + return ; } - // 置1 + // 缃1 reg_set_one_bit(reg, pin); return ; diff --git a/bsp/ls1cdev/ls1c_ram.lds b/bsp/ls1cdev/ls1c_ram.lds index a941b0d52b..9fa91ba5df 100644 --- a/bsp/ls1cdev/ls1c_ram.lds +++ b/bsp/ls1cdev/ls1c_ram.lds @@ -11,6 +11,7 @@ * Date Author Notes * 2010-05-17 swkyer first version * 2010-09-04 bernard move the beginning entry to 0x80200000 + * 2018-05-12 zhuangwei use -Ttext */ OUTPUT_ARCH(mips) @@ -19,16 +20,13 @@ GROUP(-lgcc -lc) ENTRY(_start) SECTIONS { - . = 0x80200000 ; - - .start : - { - *(.start); - } + . = 0x80000000 ; . = ALIGN(4); .text : { + start = ABSOLUTE(.); + *(.start); *(.text) *(.text.*) *(.rodata) diff --git a/bsp/ls1cdev/rtconfig.h b/bsp/ls1cdev/rtconfig.h index 72df0a83ef..18aa303c4b 100644 --- a/bsp/ls1cdev/rtconfig.h +++ b/bsp/ls1cdev/rtconfig.h @@ -156,11 +156,6 @@ /* RT-Thread online packages */ -/* system packages */ - -/* RT-Thread GUI Engine */ - - /* IoT - internet of things */ @@ -184,9 +179,20 @@ /* tools packages */ +/* system packages */ + +/* RT-Thread GUI Engine */ + + +/* peripheral libraries and drivers */ + + /* miscellaneous packages */ +/* sample package */ + + /* example package: hello */ #define RT_USING_UART2 diff --git a/libcpu/mips/loongson_1c/cpuport.c b/libcpu/mips/loongson_1c/cpuport.c index f4914dfec4..03fdc2a514 100644 --- a/libcpu/mips/loongson_1c/cpuport.c +++ b/libcpu/mips/loongson_1c/cpuport.c @@ -17,6 +17,8 @@ #include #include "ls1c.h" +register rt_uint32_t $GP __asm__ ("$28"); + /** * @addtogroup Loongson LS1B */ @@ -68,12 +70,15 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_ad { rt_uint32_t *stk; static rt_uint32_t g_sr = 0; + static rt_uint32_t g_gp = 0; if (g_sr == 0) { g_sr = cp0_get_status(); g_sr &= 0xfffffffe; g_sr |= 0x8401; + + g_gp = $GP; } /** Start at stack top */ @@ -87,7 +92,7 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_ad *(--stk) = (rt_uint32_t) texit; /* ra */ *(--stk) = (rt_uint32_t) 0x0000001e; /* s8 */ *(--stk) = (rt_uint32_t) stack_addr; /* sp */ - *(--stk) = (rt_uint32_t) 0x0000001c; /* gp */ + *(--stk) = (rt_uint32_t) g_gp; /* gp */ *(--stk) = (rt_uint32_t) 0x0000001b; /* k1 */ *(--stk) = (rt_uint32_t) 0x0000001a; /* k0 */ *(--stk) = (rt_uint32_t) 0x00000019; /* t9 */ diff --git a/libcpu/mips/loongson_1c/sdram_cfg.h b/libcpu/mips/loongson_1c/sdram_cfg.h new file mode 100644 index 0000000000..3f88f26623 --- /dev/null +++ b/libcpu/mips/loongson_1c/sdram_cfg.h @@ -0,0 +1,85 @@ + +#ifndef __OPENLOONGSON_SDRAM_CFG_H +#define __OPENLOONGSON_SDRAM_CFG_H + + +//#define SD_FREQ (6 * PLL_M) / (2 * SDRAM_PARAM_DIV_NUM) +#define SD_FREQ (((APB_CLK / 4) * (PLL_MULT / CPU_DIV)) / SDRAM_PARAM_DIV_NUM) + + +/* 棰楃矑琛屾暟 */ +#define ROW_1K 0x7 +#define ROW_2K 0x0 +#define ROW_4K 0x1 +#define ROW_8K 0x2 +#define ROW_16K 0x3 +/* 棰楃矑鍒楁暟 */ +#define COL_256 0x7 +#define COL_512 0x0 +#define COL_1K 0x1 +#define COL_2K 0x2 +#define COL_4K 0x3 +/* 棰楃矑浣嶅 */ +#define WIDTH_8 0x0 +#define WIDTH_16 0x1 +#define WIDTH_32 0x2 + +#define TRCD 3 +#define TCL 3 +#define TRP 3 +#define TRFC 8 +#define TRAS 6 +#define TREF 0x818 +#define TWR 2 + +#define DEF_SEL 0x1 +#define DEF_SEL_N 0x0 +#define HANG_UP 0x1 +#define HANG_UP_N 0x0 +#define CFG_VALID 0x1 + + +#if 0 +// 鐧借彍鏉8MB +/* + 浠ュ瀷鍙蜂负IS42S16400鐨凷DRAM涓轰緥锛 + 鐗╃悊鍙傛暟涓猴紝 + 瀹归噺锛8MB + 浣嶅锛16浣 + 鍒楀锛8浣嶏紝鍗2鐨8娆℃柟锛屽嵆256 + 琛屽锛12浣嶏紝鍗2鐨12娆℃柟锛屽嵆4K + + 鎵浠ワ紝 + 棰楃矑鐨勪綅瀹=WIDTH_16 + 棰楃矑鐨勫垪鏁=COL_256 + 棰楃矑鐨勮鏁=ROW_4K + + 鍐嶇粨鍚堝畯SD_PARA0鍜岃姱鐗囨墜鍐屼腑瀵勫瓨鍣⊿D_CONFIG锛岀浉淇′竴鐪嬪氨鑳芥槑鐧 + 鏇挎崲瀹廠D_PARA0涓殑琛屽銆佸垪瀹藉拰浣嶅 +*/ +#define SDRAM_WIDTH (WIDTH_16) +#define SDRAM_COL (COL_256) +#define SDRAM_ROW (ROW_4K) + +#else + +// 鏅洪緳32MByte +#define SDRAM_WIDTH (WIDTH_16) +#define SDRAM_COL (COL_512) +#define SDRAM_ROW (ROW_8K) + +#endif + +#define SD_PARA0 (0x7f<<25 | \ + (TRAS << 21) | \ + (TRFC << 17) | (TRP << 14) | (TCL << 11) | \ + (TRCD << 8) | (SDRAM_WIDTH << 6) | (SDRAM_COL << 3) | \ + SDRAM_ROW) + +#define SD_PARA1 ((HANG_UP_N << 8) | (DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7)) + +#define SD_PARA1_EN ((CFG_VALID << 9) | (HANG_UP_N << 8) | \ + (DEF_SEL_N << 7) | (TWR << 5) | (TREF >> 7)) + + +#endif diff --git a/libcpu/mips/loongson_1c/start_gcc.S b/libcpu/mips/loongson_1c/start_gcc.S index fd98335671..4e71bc0524 100644 --- a/libcpu/mips/loongson_1c/start_gcc.S +++ b/libcpu/mips/loongson_1c/start_gcc.S @@ -15,6 +15,34 @@ #include "../common/mips.inc" #include "../common/stackframe.h" +#include "sdram_cfg.h" +#include "cache.h" +#include "rtconfig.h" + +#define SR_BOOT_EXC_VEC 0x00400000 + + +/* config pll div for cpu and sdram */ +#define PLL_MULT (0x54) // 鏅舵尟涓24Mhz鏃讹紝PLL=504Mhz +#define SDRAM_DIV (0) // SDRAM涓篊PU鐨2鍒嗛 +#define CPU_DIV (2) // CPU涓篜LL鐨2鍒嗛 + + // 閰嶇疆鍐呭瓨澶у皬 +#define MEM_SIZE (0x02000000) // 32MByte + + /* Delay macro */ +#define DELAY(count) \ + li v0, count; \ + 99: \ + bnez v0, 99b;\ + addiu v0, -1 + + +#define msize s2 +#define output_en s3 + + + .section ".start", "ax" .set noreorder @@ -25,6 +53,8 @@ _start: .set noreorder la ra, _start +#if !defined(RT_USING_SELF_BOOT) + /* disable interrupt */ mfc0 t0, CP0_STATUS and t0, 0xfffffffe # By default it will be disabled. @@ -57,6 +87,46 @@ _clr_bss_loop: /* restart, never die */ j _start nop + +#else + + mtc0 zero, CP0_STATUS // 娓呴浂cp0 status瀵勫瓨鍣 + mtc0 zero, CP0_CAUSE // 娓呴浂cp0 cause瀵勫瓨鍣 + + /* + 璁剧疆鍚姩寮傚父鍚戦噺鍏ュ彛鍦板潃涓篟OM鍦板潃(0xbfc00000) + 灏嗗瘎瀛樺櫒cp0 status鐨凚EV缃1锛屼娇CPU閲囩敤ROM(kseg1)绌洪棿鐨勫紓甯稿叆鍙ｇ偣 + */ + li t0, SR_BOOT_EXC_VEC /* Exception to Boostrap Location */ + mtc0 t0, CP0_STATUS + + /* setup stack pointer */ + li sp, SYSTEM_STACK + la gp, _gp + + /* initialize spi */ + li t0, 0xbfe80000 //鍦板潃0xbfe80000涓篠PI0鐨勫瘎瀛樺櫒鍩哄湴鍧 + li t1, 0x17 // div 4, fast_read + burst_en + memory_en double I/O 妯″紡 閮ㄥ垎SPI flash鍙兘涓嶆敮鎸 + sb t1, 0x4(t0) // 璁剧疆瀵勫瓨鍣╯fc_param + li t1, 0x05 + sb t1, 0x6(t0) // 璁剧疆瀵勫瓨鍣╯fc_timing + + /* 璁剧疆sdram cs1澶嶇敤鍏崇郴锛屽紑鍙戞澘浣跨敤ejtag_sel gpio_0寮曡剼(绗簲澶嶇敤)浣滀负绗簩鐗噑dram鐨勭墖閫 + 娉ㄦ剰sw2鎷ㄧ爜寮鍏崇殑璁剧疆锛屼娇鐢╡jtag鐑у綍pmon鏃堕渶瑕佽皟鏁存嫧鐮佸紑鍏筹紝鐑у綍瀹屽啀璋冩暣鍥炴潵 */ + li a0, 0xbfd011c0 + lw a1, 0x40(a0) + ori a1, 0x01 + sw a1, 0x40(a0) + + + bal locate + nop + + /* restart, never die */ + j _start + nop +#endif + .set reorder .globl cp0_get_cause @@ -83,6 +153,328 @@ cp0_get_lo: jr ra nop +#if defined(RT_USING_SELF_BOOT) + +/****************************************LOCATE*********************************/ + +/* + * We get here from executing a bal to get the PC value of the current execute + * location into ra. Check to see if we run from ROM or if this is ramloaded. + * 瀵勫瓨鍣╮a鍐呬繚鎸佺潃鍑芥暟鐨勮繑鍥炲湴鍧锛屾牴鎹畆a鐨勫兼潵鍒ゆ柇褰撳墠鏄粠ROM鍐峰惎鍔紝杩樻槸浠嶳AM鐑浣嶇殑 + * ROM鍐峰惎鍔ㄧ敱閫氱數寮曡捣锛孯AM鐑浣嶄负鍚勭寮傚父寮曡捣锛屾瘮濡傜湅闂ㄧ嫍寮曡捣鐨勫浣嶇瓑锛 + * 涔熷氨鏄疪AM鐑浣嶄箣鍓岰PU宸茬粡寮濮嬭繍琛屼簡 + * 濡傛灉鏄粠ROM鍐峰惎鍔紝鍒欏瘎瀛樺櫒ra鐨勫间负鎸囦护"bal locate"鎵鍦ㄤ綅缃姞8瀛楄妭锛屽ぇ姒傚湪0xBFC00000闄勮繎 + * 濡傛灉鏄粠RAM鐑浣嶏紝鍒欓泦鎴愬櫒ra鐨勫间负0x80xxxxxx + */ +locate: +// la s0, uncached +// subu s0, ra, s0 + /* + * start.s鐨勮繖娈垫眹缂栫▼搴忓湪ROM锛堝叆鍙ｇ偣涓0xBFC00000锛変腑杩愯 + * 鑰岀紪璇戦摼鎺ユ椂鎸囧畾鐨勮捣濮嬪湴鍧鏄0x80100000锛屾墍浠ラ渶瑕佷慨姝ｄ竴涓嬪湴鍧 + * s0涓繚瀛樼潃ra涓巗tart鐨勫樊鍊硷紝鍦ㄥ悗缁殑浠ｇ爜涓彲浠ヨ捣鍒颁慨姝ｅ湴鍧鐨勪綔鐢 + * 鍦ㄧ湅鐪嬫枃浠跺紑濮嬬殑鏃跺欙紝瀵瑰瘎瀛樺櫒s0鐢ㄩ旂殑鎻忚堪鏄 link versus load offset, used to relocate absolute adresses鈥 + * 闄や簡淇鍦板潃澶栵紝杩橀氳繃s0鐨勫兼潵鍒ゆ柇鏄粠ROM鍐峰惎鍔紝杩樻槸浠嶳AM鐑惎鍔 + */ + + la s0, _start // s0 = _start锛 鍏朵腑start鐨勫湴鍧涓虹紪璇戦摼鎺ユ椂锛屾寚瀹氱殑0x80010000 + subu s0, ra, s0 // s0 = ra - s0锛屽叾涓璻a鐨勫煎湪ROM鍏ュ彛鍦板潃0xBFC00000闄勮繎 + and s0, 0xffff0000 // s0 = s0 & 0xffff0000 + + /* + * 鍒濆鍖朿p0鐨剆tatus瀵勫瓨鍣ㄥ拰cause瀵勫瓨鍣 + * 鍦ㄥ紓甯稿紩璧风殑(浠嶳AM)鐑浣嶅悗锛岄渶瑕侀噸鏂板垵濮嬪寲cp0鐨剆tatus鍜宑ause锛 + * 濡傛灉鏄粠ROM鍐峰惎鍔ㄧ殑锛岄偅涔堝墠闈㈠凡缁忓垵濮嬪寲浜嗭紝杩欓噷鏄啀娆￠噸澶嶅垵濮嬪寲锛屾病鏈夊奖鍝嶇殑 + */ + li t0, SR_BOOT_EXC_VEC + mtc0 t0, CP0_CONFIG // 閲嶆柊鍒濆鍖朿p0鐨剆tatus瀵勫瓨鍣 + mtc0 zero, CP0_CAUSE // 閲嶆柊娓呴浂cp0鐨刢ause瀵勫瓨鍣 + .set noreorder + + li t0, 0xbfe78030 // 鍦板潃0xbfe78030涓篜LL/SDRAM棰戠巼閰嶇疆瀵勫瓨鍣ㄧ殑鍦板潃 + /* 璁剧疆PLL鍊嶉 鍙奡DRAM鍒嗛 */ + li t2, (0x80000008 | (PLL_MULT << 8) | (0x3 << 2) | SDRAM_DIV) + /* 璁剧疆CPU鍒嗛 */ + li t3, (0x00008003 | (CPU_DIV << 8)) + /* 娉ㄦ剰锛氶鍏堥渶瑕佹妸鍒嗛浣胯兘浣嶆竻闆 */ + li t1, 0x2 + sw t1, 0x4(t0) // 娓呴浂CPU_DIV_VALID锛屽嵆disable + sw t2, 0x0(t0) // 鍐欏瘎瀛樺櫒START_FREQ + sw t3, 0x4(t0) // 鍐欏瘎瀛樺櫒CLK_DIV_PARAM + DELAY(2000) + + /* 鑺墖涓婄數榛樿浣跨敤gpio(杈撳叆妯″紡锛変絾澶у鏃跺欐槸浣跨敤妯″潡鐨勫姛鑳斤紝濡俵cd i2c spi ac97绛 + 鎵浠ヨ繖閲屾妸gpio閮藉叧闂紝鏂逛究浣跨敤妯″潡鍔熻兘銆傚鏋滀笂鐢靛悗闇瑕乬pio杈撳嚭涓涓‘瀹氱數骞筹紝 + 濡傜户鐢靛櫒銆丩DE绛夛紝鍙互淇敼杩欓噷鐨勪唬鐮併*/ + /* disable all gpio */ + li a0,0xbfd00000 + sw zero,0x10c0(a0) /* disable gpio 0-31 */ + sw zero,0x10c4(a0) /* disable gpio 32-63 */ + sw zero,0x10c8(a0) /* disable gpio 64-95 */ + sw zero,0x10cc(a0) + + li t0, 0xffffffff + sw t0, 0x10d0(a0) + sw t0, 0x10d4(a0) + sw t0, 0x10d8(a0) + sw t0, 0x10dc(a0) + + sw t0, 0x10f0(a0) + sw t0, 0x10f4(a0) + sw t0, 0x10f8(a0) + sw t0, 0x10fc(a0) + + + /* lcd soft_reset and panel config & timing */ +#ifdef DC_FB0 +/* li a0, 0xbc301240 + li a1, 0x00100103 + sw a1, 0x0(a0) + li a1, 0x00000103 + sw a1, 0x0(a0) //soft_reset + li a1, 0x00100103 + sw a1, 0x0(a0) + + li a1, 0x80001111 + sw a1, 0x180(a0) //panel config + li a1, 0x33333333 + sw a1, 0x1a0(a0)*/ +#endif + + li output_en, 0x1 +#ifdef FAST_STARTUP + li a1, 0x03000000 + sw a1, 0x10c4(a0) + sw a1, 0x10d4(a0) + lw a2, 0x10e4(a0) + and a2, a1 + beq a2, a1, get_pin_val_finish + nop + li output_en, 0x1 + +get_pin_val_finish: + +#endif + + /* Initializing. Standby... */ + /* + * 鏍规嵁s0鐨勫煎垽鏂槸鍚︿负ROM鍐峰惎鍔 + * 濡傛灉s0涓嶇瓑浜0锛屽垯鏄疪OM鍐峰惎鍔紱濡傛灉绛変簬0锛屽垯鏄疪AM鐑浣 + * 鍐峰惎鍔紝鍒欓渶瑕佸垵濮嬪寲鍐呭瓨锛宑ache锛屽姞杞戒唬鐮佸埌鍐呭瓨绛 + */ + bnez s0, 1f // 濡傛灉瀵勫瓨鍣╯0涓嶇瓑浜0锛屽垯璇存槑鏄疪OM鍐峰惎鍔紝鍒欒烦杞埌涓嬩竴涓爣鍙1澶勮繘琛屽交搴曞垵濮嬪寲 + nop + li a0, 128 + + jal rtthread_startup // 鐑浣嶏紝鍒欑洿鎺ヨ烦杞埌鍑芥暟main + nop +1: + +/* use only 8wins */ +#define CPU_WIN_BASE 0xbfd00000 +#define CPU_WIN_MASK 0xbfd00040 +#define CPU_WIN_MMAP 0xbfd00080 + +#define set_cpu_window(id, base, mask, mmap) \ + li t0, CPU_WIN_BASE ; \ + sw $0, 0x80+id*8(t0) ; \ + li t1, base ; \ + sw t1, 0x00+id*8(t0) ; \ + sw $0, 0x04+id*8(t0) ; \ + li t1, mask ; \ + sw t1, 0x40+id*8(t0) ; \ + sw $0, 0x44+id*8(t0) ; \ + li t1, mmap ; \ + sw t1, 0x80+id*8(t0) ; \ + sw $0, 0x84+id*8(t0) + +/* fixup cpu window */ +cpu_win_fixup: + // + // hit = (paddr & mask) == (mmap & mask) + // mapped_addr = paddr &~mask | mmap & mask + // + // mmap[7] -> enable + // mmap[5] -> block trans enable + // mmap[4] -> cachable + // mmap[1:0] -> destination + // + // NOTE: the address windows has priority, win0 > win1 > ... > win7 + +/* set_cpu_window(0, 0x1c280000, 0xfff80000, 0x1c280083) // camera 512K + set_cpu_window(1, 0x1c300000, 0xfff00000, 0x1c300081) // dc 1M + set_cpu_window(2, 0x1fe10000, 0xffffe000, 0x1fe10082) // gmac0 8K + set_cpu_window(3, 0x1fe10000, 0xffff0000, 0x1fe100d0) // gmac0 64K + set_cpu_window(4, 0x1f000000, 0xff000000, 0x1f000082) // AXIMUX 16M + set_cpu_window(5, 0x00000000, 0x00000000, 0x000000f0) // ddr 0 + set_cpu_window(6, 0x00000000, 0x00000000, 0x000000f0) // ddr 0 + set_cpu_window(7, 0x00000000, 0x00000000, 0x000000f0) // ddr 0*/ + +/* set_cpu_window(0, 0x1c280000, 0xfff80000, 0x1c2800d3) // camera +// set_cpu_window(1, 0x1fc00000, 0xfff00000, 0x1fc000f2) // + set_cpu_window(2, 0x1c300000, 0xfff00000, 0x1c3000d1) // dc 1M +// set_cpu_window(3, 0x1f000000, 0xff000000, 0x1f0000d2) // + set_cpu_window(4, 0x00000000, 0x00000000, 0x000000f0) + set_cpu_window(5, 0x00000000, 0x00000000, 0x000000f0) + set_cpu_window(6, 0x00000000, 0x00000000, 0x000000f0) // ddr 0 + set_cpu_window(7, 0x00000000, 0x00000000, 0x000000f0) // ddr 0*/ + + // after this fixup, the kernel code should be compiled with + // uncached instruction fetch patch + + /* 閰嶇疆鍐呭瓨 */ + li msize, MEM_SIZE +#if !defined(NAND_BOOT_EN) + + /* + 鎵嬪唽寤鸿锛屽厛鍐欏瘎瀛樺櫒SD_CONFIG[31:0]锛岀劧鍚庡啀鍐欏瘎瀛樺櫒鐨凷D_CONFIG[63:32]锛 + 鍗冲厛鍐欎綆32浣嶏紝鍐嶅啓楂32浣嶃 + 鍐欎笁娆″瘎瀛樺櫒锛屾渶鍚庝竴娆″皢鏈楂樹綅缃竴锛屽嵆浣胯兘 + */ + + // 鍐欑涓娆 + li t1, 0xbfd00410 // 瀵勫瓨鍣⊿D_CONFIG[31:0]鐨勫湴鍧涓0xbfd00410 + li a1, SD_PARA0 // 瀹廠D_PARA0鍦╯dram_cfg.S涓畾涔夌殑 + sw a1, 0x0(t1) // 灏嗗畯SD_PARA0鐨勫煎啓鍏ュ瘎瀛樺櫒SD_CONFIG[31:0] + li a1, SD_PARA1 + sw a1, 0x4(t1) // 鍚岀悊锛屽皢瀹廠D_PARA1鐨勫煎啓鍏ュ瘎瀛樺櫒SD_CONFIG[63:32] + + // 鍐欑浜屾 + li a1, SD_PARA0 + sw a1, 0x0(t1) + li a1, SD_PARA1 + sw a1, 0x4(t1) + + // 鍐欑涓夋 + li a1, SD_PARA0 + sw a1, 0x0(t1) + li a1, SD_PARA1_EN // 浣胯兘 + sw a1, 0x4(t1) +// DELAY(100) +#endif + + /**************************************CACHE*****************************/ + +#define CF_7_SE (1 << 3) /* Secondary cache enable */ +#define CF_7_SC (1 << 31) /* Secondary cache not present */ +#define CF_7_TE (1 << 12) /* Tertiary cache enable */ +#define CF_7_TC (1 << 17) /* Tertiary cache not present */ +#define CF_7_TS (3 << 20) /* Tertiary cache size */ +#define CF_7_TS_AL 20 /* Shift to align */ +#define NOP8 nop;nop;nop;nop;nop;nop;nop;nop + +do_caches: + /* Init caches... */ + li s7, 0 /* no L2 cache */ + li s8, 0 /* no L3 cache */ + + bal cache_init // 璋冪敤姹囩紪鍑芥暟cache_init + nop + + mfc0 a0, CP0_CONFIG // 灏嗗崗澶勭悊鍣0鐨刢onfig瀵勫瓨鍣ㄧ殑鍊煎姞杞藉埌瀵勫瓨鍣╝0 + and a0, a0, ~((1<<12) | 7) // a0 = a0 & ~((1<<12) | 7) + or a0, a0, 2 // a0 |= 2 + mtc0 a0, CP0_CONFIG // 灏嗗瘎瀛樺櫒a0鐨勫煎啓鍏ュ崗澶勭悊鍣0鐨刢onfig瀵勫瓨鍣 + +/***********************MEMORY DEBUGGING AND COPY SELF TO RAM***********************/ +//#include "newtest.32/mydebug.S" +bootnow: + /* copy program to sdram to make copy fast */ + /* 鍏堝皢鎵ц鎷疯礉pmon鍒板唴瀛樹换鍔＄殑浠ｇ爜锛屾嫹璐濆埌鍐呭瓨0xa0000000 */ + + /* 鍏堢‘瀹氶渶瑕佹嫹璐濈殑浠ｇ爜娈典负鏍囧彿121鍒版爣鍙122涔嬮棿鐨勪唬鐮 + * 鐢变簬閾炬帴鏃舵寚瀹氱殑璧峰鍦板潃鏄0x80010000锛 + * 鑰岀洰鍓嶆鍦≧OM锛圫PI NOR FLASH锛岃捣濮嬪湴鍧涓0xBFC00000锛夎繍琛 + * 鎵浠ラ渶瑕佺敤瀵勫瓨鍣╯0鏉ヤ慨姝ｄ竴涓嬪湴鍧 + */ + la t0, 121f // 灏嗕笅涓涓爣鍙121鎵鍦ㄥ湴鍧锛屽姞杞藉埌瀵勫瓨鍣╰0 + addu t0, s0 // 浣跨敤瀵勫瓨鍣╯0淇t0涓殑(鏍囧彿121鐨)鍦板潃 + la t1, 122f // 灏嗕笅涓涓爣鍙122鎵鍦ㄥ湴鍧锛屽姞杞藉埌瀵勫瓨鍣╰1 + addu t1, s0 // 浣跨敤瀵勫瓨鍣╯0淇t1涓殑(鏍囧彿122鐨)鍦板潃 + + li t2, 0xa0000000 // 灏嗙珛鍗虫暟0xa0000000锛堣捣濮嬪湴鍧锛夊姞杞藉埌瀵勫瓨鍣╰2 +1: + lw v0, (t0) // 灏嗗瘎瀛樺櫒t0鎵鎸囩殑鍐呭瓨鍦板潃寮濮4瀛楄妭鐨勬暟鎹姞杞藉埌瀵勫瓨鍣╲0 + sw v0, (t2) // 灏嗗瘎瀛樺櫒v0鐨勫唴瀹逛繚瀛樺埌瀵勫瓨鍣╰2鎵鎸囩殑鍐呭瓨涓 + addu t0, 4 // 瀵勫瓨鍣╰0鍚戝悗绉4瀛楄妭 + addu t2, 4 // 瀵勫瓨鍣╰2鍚戝悗绉4瀛楄妭 + ble t0, t1, 1b // 濡傛灉t0 <= t1锛屽垯璺宠浆鍒颁笂涓涓爣鍙1澶勶紝缁х画鎷疯礉鍚庨潰鐨4瀛楄妭 + nop + + li t0, 0xa0000000 // 灏嗙珛鍗虫暟0xa0000000鍔犺浇鍒板瘎瀛樺櫒t0 + jr t0 // 璺宠浆鍒拌捣濮嬪湴鍧0xa0000000澶勫紑濮嬫墽琛岋紙鎷疯礉浠诲姟锛 + nop + +121: + /* Copy PMON to execute location... */ + /* 灏嗗浐浠舵嫹璐濆埌璧峰鍦板潃涓0xa0010000鐨勫唴瀛樼┖闂 + 鐢变簬kseg0(0x8000 0000 - 0x9FFF FFFF)鍜宬seg1(0xA000 0000 - 0xBFFF FFFF)鏄槧灏勫埌鐗╃悊鍐呭瓨鐨勭浉鍚屽尯鍩 + 鍗虫嫹璐濆埌0xA000 0000寮濮嬬殑kseg1锛屽氨鐩稿綋浜庢嫹璐濆埌0x8000 0000寮濮嬬殑kseg0 + 杩欏氨鏄负浠涔堥摼鎺ユ椂锛屾寚瀹氱殑鍦板潃鏄0x8001 0000锛岃屾嫹璐濈殑鐩爣璧峰鍦板潃鏄0xA001 0000 + */ + la a0, _start // 鍔犺浇绗﹀彿start鎵鍦ㄥ湴鍧0x80010000鍔犺浇鍒板瘎瀛樺櫒a0涓 + addu a1, a0, s0 // 浣跨敤瀵勫瓨鍣╯0淇瀵勫瓨鍣╝0涓殑鍦板潃锛宎1=0xBFC00000 + la a2, __bss_start // 鍔犺浇_edata锛堥摼鎺ヨ剼鏈腑鐨勪竴涓鍙凤級鍒板瘎瀛樺櫒a2 + or a0, 0xa0000000 // a0 = a0 | 0xa0000000 = 0xa0010000 + or a2, 0xa0000000 // a2 = a2 | 0xa0000000锛屼慨姝ｅ湴鍧_edata + subu t1, a2, a0 // t1 = a2 - a0锛屽嵆璁＄畻浠巗tart鍒癬edata涔嬮棿鐨勯暱搴︼紙瀛楄妭鏁帮級 + srl t1, t1, 2 // t1 >>= 2锛屽嵆t1闄や互4銆(鍜屽墠闈㈢被浼硷紝姣忔鎷疯礉4瀛楄妭锛屾墍浠ラ櫎浠4) + // 浼间箮t1璁＄畻缁撴灉娌℃湁琚娇鐢紝椹笂灏辫鍚庨潰鐨勮鐩栦簡 + + move t0, a0 // t0 = a0 = 0xa0010000 (鐩爣璧峰鍦板潃) + move t1, a1 // t1 = a1 = 0xBFC00000 (start鍦≧OM涓殑鍦板潃锛屾簮璧峰鍦板潃) + move t2, a2 // t2 = a2 (_edata鍦≧OM涓殑鍦板潃锛屾簮缁撴潫鍦板潃) + + /* copy text section */ +1: and t3, t0, 0x0000ffff // t3 = t0 & 0x0000ffff锛屽彇浣16浣 + bnez t3, 2f // 濡傛灉t3涓嶇瓑浜0锛屽垯璺宠浆鍒颁笅涓涓爣鍙2澶勭户缁墽琛岋紝t3鐨勮绠楃粨鏋滀技涔庢病琚娇鐢紝灏辫鍚庨潰鐨勮鐩栦簡 + nop +2: lw t3, 0(t1) // 浠庢簮鍦板潃t1澶勫姞杞4瀛楄妭鍒板瘎瀛樺櫒t3涓 + nop + sw t3, 0(t0) // 灏嗗瘎瀛樺櫒t3涓殑4瀛楄妭鏁版嵁淇濆瓨鍒扮洰鏍囧湴鍧t0澶 + addu t0, 4 // 鐩爣鍦板潃t0鍚庣Щ4瀛楄妭 + addu t1, 4 // 婧愬湴鍧t1 鍚庣Щ4瀛楄妭 + bne t2, t0, 1b // 濡傛灉t2涓嶇瓑浜巘0锛屽垯璺冲埌涓婁竴涓爣鍙1澶勭户缁嫹璐濓紝鎬荤殑鏉ヨ灏辨槸鍒ゆ柇鎷疯礉鏄惁缁撴潫 + nop + /* copy text section done. */ + + /* clear bss */ + la t0, __bss_start + la t1, __bss_end +_clr_bss_loop: + sw zero, 0(t0) + bne t0, t1, _clr_bss_loop + addiu t0, t0, 4 + + /* disable interrupt */ + mfc0 t0, CP0_STATUS + and t0, 0xfffffffe # By default it will be disabled. + mtc0 t0, CP0_STATUS # Set CPU to disable interrupt. + nop + + /* disable cache */ + mfc0 t0, CP0_CONFIG + and t0, 0xfffffff8 + or t0, 0x2 # disable,!default value is not it! + mtc0 t0, CP0_CONFIG # Set CPU to disable cache. + nop + + /* jump to RT-Thread RTOS */ + jal rtthread_startup + nop + + /* restart, never die */ + j _start + nop + + +122: + +stuck: + b stuck + nop +#endif + .extern tlb_refill_handler .extern cache_error_handler