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mirror of https://github.com/RT-Thread/rt-thread.git synced 2025-02-28 03:27:58 +08:00

[at32] auto formatted

This commit is contained in:
Meco Man 2021-03-14 15:15:52 +08:00
parent c3ffe18688
commit 1a6e348922
37 changed files with 391 additions and 391 deletions

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -28,8 +28,8 @@
//#define DRV_DEBUG
#define LOG_TAG "drv.emac"
#define ETH_RXBUFNB 4
#define ETH_TXBUFNB 2
#define ETH_RXBUFNB 4
#define ETH_TXBUFNB 2
#define LINK_THREAD_STACK_SIZE 256
#define LINK_THREAD_PREORITY 21
@ -173,7 +173,7 @@ void GPIO_Configuration(void)
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
/*MII Mode GPIO configuration*/
/*MII Mode GPIO configuration*/
#ifdef MII_MODE
/**********************MII Tx Pin Define****************************/
/*
@ -193,7 +193,7 @@ void GPIO_Configuration(void)
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
/**********************MII Rx Pin Define****************************/
/**********************MII Rx Pin Define****************************/
#if MII_RX_REMAP /*IO PIN remaped*/
/*
ETH_MII_RX_DV-->PD8
@ -256,7 +256,7 @@ void GPIO_Configuration(void)
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/**********************RMII Rx Pin Define****************************/
/**********************RMII Rx Pin Define****************************/
#if MII_RX_REMAP /*IO PIN remaped*/
/*
ETH_RMII_RX_DV-->PD8

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -160,7 +160,7 @@ int at32_flash_erase(rt_uint32_t addr, size_t size)
addr += FLASH_PAGE_SIZE;
}
FLASH_Lock();
FLASH_Lock();
__exit:
if(result != RT_EOK)

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -79,10 +79,10 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp)
return -RT_ERROR;
}
#else
/* Set the RTC counter value */
RTC_SetCounter(time_stamp);
/* Wait until last write operation on RTC registers has finished */
RTC_WaitForLastTask();
/* Set the RTC counter value */
RTC_SetCounter(time_stamp);
/* Wait until last write operation on RTC registers has finished */
RTC_WaitForLastTask();
#endif /* SOC_SERIES_AT32F415 */
LOG_D("set rtc time.");
#ifdef SOC_SERIES_AT32F415
@ -148,7 +148,7 @@ static rt_err_t rt_rtc_config(struct rt_device *dev)
#else
if (BKP_ReadBackupReg(BKP_DT1) != BKUP_REG_DATA)
#endif
{
{
LOG_I("RTC hasn't been configured, please use <date> command to config.");
#ifdef SOC_SERIES_AT32F415
/* Configure the ERTC data register and ERTC prescaler */

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -86,8 +86,8 @@ static rt_err_t configure(struct rt_spi_device* device,
SPI_InitType SPI_InitStruct;
RT_ASSERT(device != RT_NULL);
RT_ASSERT(configuration != RT_NULL);
RT_ASSERT(device != RT_NULL);
RT_ASSERT(configuration != RT_NULL);
at32_msp_spi_init(spi_instance->config->spix);
@ -200,7 +200,7 @@ static rt_err_t configure(struct rt_spi_device* device,
/* init SPI */
SPI_Init(spi_instance->config->spix, &SPI_InitStruct);
/* Enable SPI_MASTER */
SPI_Enable(spi_instance->config->spix, ENABLE);
SPI_Enable(spi_instance->config->spix, ENABLE);
SPI_CRCEN(spi_instance->config->spix, DISABLE);
return RT_EOK;
@ -213,8 +213,8 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
struct rt_spi_configuration * config = &device->config;
struct at32_spi_cs * at32_spi_cs = device->parent.user_data;
RT_ASSERT(device != NULL);
RT_ASSERT(message != NULL);
RT_ASSERT(device != NULL);
RT_ASSERT(message != NULL);
/* take CS */
if(message->cs_take)
@ -245,7 +245,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
//Wait until the transmit buffer is empty
while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_TE));
// Send the byte
SPI_I2S_TxData(spi_instance->config->spix, data);
SPI_I2S_TxData(spi_instance->config->spix, data);
//Wait until a data is received
while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_RNE));
@ -277,7 +277,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
//Wait until the transmit buffer is empty
while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_TE));
// Send the byte
SPI_I2S_TxData(spi_instance->config->spix, data);
SPI_I2S_TxData(spi_instance->config->spix, data);
//Wait until a data is received
while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_RNE));
@ -295,7 +295,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
/* release CS */
if(message->cs_release)
{
GPIO_SetBits(at32_spi_cs->GPIOx, at32_spi_cs->GPIO_Pin);
GPIO_SetBits(at32_spi_cs->GPIOx, at32_spi_cs->GPIO_Pin);
DEBUG_PRINTF("spi release cs\n");
}

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -15,7 +15,7 @@
#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && \
!defined(BSP_USING_UART3)
#error "Please define at least one BSP_USING_UARTx"
/* this driver can be disabled at menuconfig ¡ú RT-Thread Components ¡ú Device Drivers */
/* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
#endif
struct at32_usart {

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -68,23 +68,23 @@
Clock (MHz)
PLL from HSE or HSI
SYSCLK HCLK PCLK2 PCLK1
24 24 24 24
36 36 36 36
48 48 48 24
56 56 56 28
72 72 72 36
96 96 48 48
108 108 54 54
120 120 60 60
144 144 72 72
150 150 75 75
168 168 84 84
176 176 88 88
192 192 96 96
200 200 100 100
224 224 112 112
240 240 120 120
SYSCLK HCLK PCLK2 PCLK1
24 24 24 24
36 36 36 36
48 48 48 24
56 56 56 28
72 72 72 36
96 96 48 48
108 108 54 54
120 120 60 60
144 144 72 72
150 150 75 75
168 168 84 84
176 176 88 88
192 192 96 96
200 200 100 100
224 224 112 112
240 240 120 120
*/
#if defined (AT32F403xx) || defined (AT32F413xx) || \
@ -573,7 +573,7 @@ static void SetSysClock(void)
/**
* @brief Setup the external memory controller.
* Called in startup_at32f4xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted
* This function configures the external SRAM mounted
* (AT32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -68,23 +68,23 @@
Clock (MHz)
PLL from HSE or HSI
SYSCLK HCLK PCLK2 PCLK1
24 24 24 24
36 36 36 36
48 48 48 24
56 56 56 28
72 72 72 36
96 96 48 48
108 108 54 54
120 120 60 60
144 144 72 72
150 150 75 75
168 168 84 84
176 176 88 88
192 192 96 96
200 200 100 100
224 224 112 112
240 240 120 120
SYSCLK HCLK PCLK2 PCLK1
24 24 24 24
36 36 36 36
48 48 48 24
56 56 56 28
72 72 72 36
96 96 48 48
108 108 54 54
120 120 60 60
144 144 72 72
150 150 75 75
168 168 84 84
176 176 88 88
192 192 96 96
200 200 100 100
224 224 112 112
240 240 120 120
*/
#if defined (AT32F403xx) || defined (AT32F413xx) || \
@ -573,7 +573,7 @@ static void SetSysClock(void)
/**
* @brief Setup the external memory controller.
* Called in startup_at32f4xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted
* This function configures the external SRAM mounted
* (AT32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None