1.Modify project directory structure
2.Add support for GPIO and UART peripherals 3.Add pin and serial device driver support 4.Put pictures in local folder 5.Modify README file
This commit is contained in:
whik
parent
02c6c92a19
commit
1731a6cd99
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@ -1,44 +0,0 @@
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/*******************************************************************************
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* (c) Copyright 2014 Microsemi SoC Products Group. All rights reserved.
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*
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* Keil-MDK specific system initialization.
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*
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* SVN $Revision: 7375 $
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* SVN $Date: 2015-05-01 14:57:40 +0100 (Fri, 01 May 2015) $
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*/
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#ifdef MSCC_NO_RELATIVE_PATHS
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#include "m2sxxx.h"
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#else
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#include "..\m2sxxx.h"
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#endif
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#define ENVM_BASE_ADDRESS 0x60000000U
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#define MDDR_BASE_ADDRESS 0xA0000000U
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//extern unsigned int Image$$ER_RW$$Base;
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//extern unsigned int Image$$ER_RO$$Base;
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/*==============================================================================
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* The __low_level_init() function is called after SystemInit. Therefore, the
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* external RAM should be configured at this stage if it is used.
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*/
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/* void low_level_init(void)
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{
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volatile unsigned int rw_region_base;
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volatile unsigned int readonly_region_base;
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rw_region_base = (unsigned int)&Image$$ER_RW$$Base;
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if (rw_region_base >= MDDR_BASE_ADDRESS)
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{
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/ --------------------------------------------------------------------------
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* Remap MDDR to address 0x00000000.
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/
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SYSREG->ESRAM_CR = 0u;
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SYSREG->ENVM_REMAP_BASE_CR = 0u;
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SYSREG->DDR_CR = 1u;
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}
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readonly_region_base = (unsigned int)&Image$$ER_RO$$Base;
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SCB->VTOR = readonly_region_base;
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} */
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@ -1,150 +0,0 @@
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/*******************************************************************************
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* (c) Copyright 2013 Microsemi SoC Products Group. All rights reserved.
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*
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* Redirection of the standard library I/O to one of the SmartFusion2
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* MMUART.
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*
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* SVN $Revision: 7375 $
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* SVN $Date: 2015-05-01 14:57:40 +0100 (Fri, 01 May 2015) $
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*/
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/*==============================================================================
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* The content of this source file will only be compiled if either one of the
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* following two defined symbols are defined in the project settings:
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* - MICROSEMI_STDIO_THRU_MMUART0
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* - MICROSEMI_STDIO_THRU_MMUART1
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*
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*/
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#ifdef MICROSEMI_STDIO_THRU_MMUART0
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#ifndef MICROSEMI_STDIO_THRU_UART
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#define MICROSEMI_STDIO_THRU_UART
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#endif
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#endif /* MICROSEMI_STDIO_THRU_MMUART0 */
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#ifdef MICROSEMI_STDIO_THRU_MMUART1
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#ifndef MICROSEMI_STDIO_THRU_UART
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#define MICROSEMI_STDIO_THRU_UART
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#endif
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#endif /* MICROSEMI_STDIO_THRU_MMUART1 */
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/*==============================================================================
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* Actual implementation.
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*/
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#ifdef MICROSEMI_STDIO_THRU_UART
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#include <stdio.h>
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#include <rt_misc.h>
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#include "m2sxxx.h"
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#include "mss_uart.h"
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#include "core_uart_apb.h"
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/*
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* The baud rate will default to 57600 baud if no baud rate is specified though the
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* MICROSEMI_STDIO_BAUD_RATE define.
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*/
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#ifndef MICROSEMI_STDIO_BAUD_RATE
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#define MICROSEMI_STDIO_BAUD_RATE MSS_UART_115200_BAUD
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#endif
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#ifdef MICROSEMI_STDIO_THRU_MMUART0
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static mss_uart_instance_t * const gp_my_uart = &g_mss_uart0;
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#else
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static mss_uart_instance_t * const gp_my_uart = &g_mss_uart1;
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#endif
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/*==============================================================================
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* Flag used to indicate if the UART driver needs to be initialized.
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*/
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static int g_stdio_uart_init_done = 0;
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#define LSR_THRE_MASK 0x20u
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/*
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* Disable semihosting apis
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*/
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#pragma import(__use_no_semihosting_swi)
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/*==============================================================================
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* sendchar()
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*/
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int sendchar(int ch)
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{
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uint32_t tx_ready;
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//第一次调用时，初始化串口
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if(!g_stdio_uart_init_done)
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{
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MSS_UART_init(gp_my_uart,
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MICROSEMI_STDIO_BAUD_RATE,
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MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY);
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g_stdio_uart_init_done = 1;
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}
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do {
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tx_ready = gp_my_uart->hw_reg->LSR & LSR_THRE_MASK;
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} while(!tx_ready);
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gp_my_uart->hw_reg->THR = ch;
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return (ch);
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}
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/*==============================================================================
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*
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*/
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struct __FILE { int handle; /* Add whatever you need here */ };
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FILE __stdout;
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FILE __stdin;
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/*==============================================================================
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* fputc()
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*/
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int fputc(int ch, FILE *f)
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{
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return (sendchar(ch));
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}
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/*==============================================================================
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* fgetc()
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*/
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int fgetc(FILE *f)
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{
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uint8_t rx_size;
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uint8_t rx_byte;
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do {
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rx_size = MSS_UART_get_rx(gp_my_uart, &rx_byte, 1);
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} while(0u == rx_size);
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return rx_byte;
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}
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/*==============================================================================
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* ferror()
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*/
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int ferror(FILE *f)
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{
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/* Your implementation of ferror */
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return EOF;
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}
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/*==============================================================================
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* _ttywrch()
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*/
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void _ttywrch(int ch)
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{
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sendchar(ch);
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}
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/*==============================================================================
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* _sys_exit()
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*/
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void _sys_exit(int return_code)
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{
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for(;;)
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{
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; /* endless loop */
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}
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}
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#endif /* MICROSEMI_STDIO_THRU_UART */
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@ -2,29 +2,41 @@
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### 1. BSP简介
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移植 RT-Thread 操作系统到 一款 **FPGA 芯片——M2S010** 上，该芯片属于 [Microsemi](https://www.microsemi.com/)（现Microchip）SmartFusion2系列，是一款**智能混合型FPGA**，片上除了 FPGA Fabric 逻辑部分，还包括一个 ARM® Cortex™-M3 内核的 MCU，主频最高 166MHz ，256KB eNVM，64KB eSRAM，集成GPIO、UART、I2C、SPI、CAN、USB等基本外设。
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移植 RT-Thread 操作系统到一款 **FPGA 芯片——M2S010** ，该芯片属于 [Microsemi](https://www.microsemi.com/)（现Microchip）SmartFusion2系列，是一款**智能混合型FPGA**，片上除了 FPGA Fabric 逻辑部分，还包括一个 **ARM® Cortex™-M3 内核的 MCU**，主频最高 166MHz ，256KB eNVM，64KB eSRAM，集成GPIO、UART、I2C、SPI、CAN、USB等基本外设。
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> 关于 Microsemi，第三大 FPGA 厂商，原 Actel 半导体，2010 年，Microsemi 收购 Actel，2018 年， Microchip 收购 Microsemi。
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SmartFusion2 内部框图
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### 2. 使用说明
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### 2. 外设支持
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#### 2.1 FPGA 工程设计
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移植了 RT-Thread 内核，支持线程调度、线程间同步和通信等，目前已经完成了PIN、Serial设备驱动，FinSH组件默认使用uart0设备。
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| **片上外设** | **支持情况** | **备注** |
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| :----------------- | :----------: | :------------------------------------- |
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| GPIO | 支持 | GPIO_0/1输出，GPIO_2/3输入 |
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| UART | 支持 | MMUART0 & MMUART1|
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| SPI | 暂不支持 | |
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| I2C | 暂不支持 | |
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| RTC | 暂不支持 | |
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| PWM | 暂不支持 | |
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| USB | 暂不支持 | |
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### 3. 使用说明
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#### 3.1 FPGA 工程设计
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FPGA 部分使用 SmartDesign 图形化设计，不需要写 HDL 代码，时钟来自外部 50M 晶体输入，PLL 倍频 100M 提供给 MCU 使用，顶层配置如下图所示：
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MSS 部分仅使用到了GPIO 和UART0，其他外设未启用，两个 GPIO 配置成输出模式：
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MSS 部分仅使用到了GPIO 和UART，GPIO_0和GPIO_1配置成输出输出模式用于驱动LED，GPIO_2和GPIO_3配置成输入模式，用于读取按键输入。
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配置完成的 FPGA 工程文件下载：[sf2_fpga_prj.rar](https://wcc-blog.oss-cn-beijing.aliyuncs.com/Libero/RT-Thread/sf2_fpga_prj.rar)
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配置完成的 FPGA 工程文件下载：[fpga_project.rar](https://wcc-blog.oss-cn-beijing.aliyuncs.com/Libero/RT-Thread/fpga_project.rar)
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#### 2.2 ARM 程序设计
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#### 3.2 ARM 程序设计
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ARM 程序使用 Keil MDK 5.26 开发，需要安装 M2S 系列芯片支持包：[Microsemi.M2Sxxx.1.0.64.pack](http://www.actel-ip.com/repositories/CMSIS-Pack/Microsemi.M2Sxxx.1.0.64.pack)
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@ -32,25 +44,24 @@ ARM 程序使用 Keil MDK 5.26 开发，需要安装 M2S 系列芯片支持包
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在官方生成的示例工程目录下，添加 RT-Thread 相关组件，并实现一些对接函数，最终的文件结构：
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### 3. 下载和运行
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### 4. 下载和运行
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为了能使用 ARM 调试器连接到 ARM 内核，而不是 FPGA，需要把 JTAG_SEL 引脚置为低电平。使用 ARM 调试器，如 JLink，对应连接 JTAG 口的 TMS、TCK、GND 引脚，如果连接正常，可以检测到 ARM 芯片，如下图所示：
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配置对应的 Flash 编程算法：
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下载完成：
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如果编译 & 烧写无误，下载完成或者按下复位按键之后，会在串口上看到 RT-Thread 的启动 LOG 信息：
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```c
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\ | /
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- RT - Thread Operating System
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@ -59,20 +70,9 @@ ARM 程序使用 Keil MDK 5.26 开发，需要安装 M2S 系列芯片支持包
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msh >
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```
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### 4. 外设支持
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目前仅移植了 RT-Thread 内核，支持线程调度、线程间同步和通信等，支持 Finsh 组件，PIN、Serial 等设备驱动将会在以后添加。
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### 5. 资料下载
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独立的工程文件下载：
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- FPGA 工程下载：[fpga_project.rar](https://wcc-blog.oss-cn-beijing.aliyuncs.com/Libero/RT-Thread/fpga_project.rar)
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- ARM 工程下载：[smartfusion_rtt-master-4.0.3.rar](https://wcc-blog.oss-cn-beijing.aliyuncs.com/Libero/RT-Thread/smartfusion_rtt-master-4.0.3.rar)
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### 6. 注意事项
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### 5. 注意事项
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- FPGA 开发环境基于 Libero V11.8.2.4，向上兼容，不支持低版本 IDE。
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- ARM 开发环境基于 Keil MDK 5.26，如果使用SoftConsole IDE ，需要修改 `libcpu` 内的文件。
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@ -80,13 +80,12 @@ msh >
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- 使用 SoftConsole 开发环境可以直接使用官方的 Flash Pro 调试器进行 ARM 程序的调试。
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- 内核时钟需要和 FPGA 中 MSS 配置的对应，Libero 自动生成的时钟文件，可以直接替换`bsp\smartfusion2\libraries\sys_config`文件夹下的文件 。
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### 7. 参考资料
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### 6. 参考资料
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- [学习路线 - RT-Thread 文档中心](https://www.rt-thread.org/document/site/)
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- [Microsemi Libero系列中文教程](https://blog.csdn.net/whik1194/article/details/102901710)
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### 8. 联系我
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### 7. 联系我
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- 邮箱：wangchao149@foxmail.com
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- 主页：www.wangchaochao.top
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- 微信：wcc149
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- Github：[whik](https://github.com/whik)
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- E-Mail：wangchao149@foxmail.com
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#define LED0_PIN 0
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#define LED1_PIN 1
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#define SW0_PIN 2
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#define SW1_PIN 3
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extern void sw0_isr(void *args);
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extern void sw1_isr(void *args);
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int main(void)
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{
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int count = 1;
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rt_pin_attach_irq(SW0_PIN, PIN_IRQ_MODE_RISING, sw0_isr, RT_NULL);
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rt_pin_attach_irq(SW1_PIN, PIN_IRQ_MODE_RISING, sw1_isr, RT_NULL);
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rt_pin_irq_enable(SW0_PIN, PIN_IRQ_ENABLE);
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rt_pin_irq_enable(SW1_PIN, PIN_IRQ_ENABLE);
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rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
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rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
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while(count++)
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{
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rt_pin_write(LED0_PIN, PIN_HIGH);
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rt_pin_write(LED1_PIN, PIN_HIGH);
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rt_thread_mdelay(100);
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rt_pin_write(LED0_PIN, PIN_LOW);
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rt_pin_write(LED1_PIN, PIN_LOW);
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rt_thread_mdelay(100);
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}
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return RT_EOK;
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}
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@ -20,13 +20,7 @@
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#define _SYSTICK_CALIB (*(rt_uint32_t *)(_SCB_BASE + 0xC))
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#define _SYSTICK_PRI (*(rt_uint8_t *)(0xE000ED23UL))
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// Updates the variable SystemCoreClock and must be called
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// whenever the core clock is changed during program execution.
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extern void SystemCoreClockUpdate(void);
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// Holds the system core clock, which is the system clock
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// frequency supplied to the SysTick timer and the processor
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// core clock.
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extern uint32_t SystemCoreClock;
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static uint32_t _SysTick_Config(rt_uint32_t ticks)
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@ -66,14 +60,16 @@ void rt_hw_board_init()
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/* System Tick Configuration */
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_SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
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/* Call components board initial (use INIT_BOARD_EXPORT()) */
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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//#ifdef RT_USING_CONSOLE
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// rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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//#endif
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
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rt_system_heap_init(rt_heap_begin_get(), rt_heap_end_get());
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#endif
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@ -0,0 +1,29 @@
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#include "config.h"
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void sw0_isr(void *args)
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{
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rt_kprintf("sw_0 is trigger \r\n");
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rt_thread_mdelay(400);
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}
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void sw1_isr(void *args)
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{
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rt_kprintf("sw_1 is trigger \r\n");
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rt_thread_mdelay(400);
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}
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/* hardware initialization */
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void boardInit(void)
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{
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/* disable watchdog timer */
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SYSREG->WDOG_CR = 0;
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}
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INIT_BOARD_EXPORT(boardInit);
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/* custom finish command */
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extern uint32_t SystemCoreClock;
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void sayHello(void)
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{
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rt_kprintf("Hello RT-Thread! By Microsemi SmartFusion2 Family FPGA-M2S010.\r\n");
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rt_kprintf("MSS System Core Clock: %d Hz.\r\n", SystemCoreClock);
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}
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MSH_CMD_EXPORT(sayHello, "say hello to console");
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@ -0,0 +1,15 @@
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#ifndef __CONFIG_H__
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#define __CONFIG_H__
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#include "mss_gpio.h"
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#include "mss_uart.h"
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#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
void sw0_isr(void *args);
|
||||
void sw1_isr(void *args);
|
||||
void boardInit(void);
|
||||
void sayHello(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -12,6 +12,11 @@ del *.map /s
|
|||
del *.lst /s
|
||||
del *.dep /s
|
||||
del *.build_log.htm /s
|
||||
del *.bak
|
||||
del *.bak /s
|
||||
del *.sct /s
|
||||
del *.axf /s
|
||||
|
||||
del JLinkLog.txt /s
|
||||
del SConscript /s
|
||||
|
||||
echo 编译产生的其他文件已经删除
|
||||
|
|
|
|||
|
|
@ -0,0 +1,434 @@
|
|||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <rthw.h>
|
||||
|
||||
#include "mss_gpio.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#ifdef BSP_USING_GPIO
|
||||
|
||||
static struct rt_pin_irq_hdr sf2_pin_irq_hdr_tab[] =
|
||||
{
|
||||
/* pin, hdr, mode, args */
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
{-1, 0, RT_NULL, RT_NULL},
|
||||
};
|
||||
|
||||
/* configure an individual GPIO port */
|
||||
static void sf2_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
|
||||
{
|
||||
uint32_t config;
|
||||
switch (mode)
|
||||
{
|
||||
case PIN_MODE_OUTPUT:
|
||||
config = MSS_GPIO_OUTPUT_MODE;
|
||||
break;
|
||||
case PIN_MODE_INPUT:
|
||||
config = MSS_GPIO_INPUT_MODE;
|
||||
break;
|
||||
default:
|
||||
config = MSS_GPIO_INOUT_MODE;
|
||||
break;
|
||||
}
|
||||
MSS_GPIO_config((mss_gpio_id_t )pin, config);
|
||||
}
|
||||
|
||||
static int sf2_pin_read(rt_device_t dev, rt_base_t pin)
|
||||
{
|
||||
uint32_t value;
|
||||
value = MSS_GPIO_get_inputs() & (1<<pin);
|
||||
return ((value) ? PIN_HIGH : PIN_LOW);
|
||||
}
|
||||
|
||||
static void sf2_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
|
||||
{
|
||||
if (value == PIN_HIGH)
|
||||
MSS_GPIO_set_output((mss_gpio_id_t )pin, 1);
|
||||
else
|
||||
MSS_GPIO_set_output((mss_gpio_id_t )pin, 0);
|
||||
}
|
||||
|
||||
static rt_err_t sf2_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
|
||||
rt_uint32_t mode, void (*hdr)(void *args), void *args)
|
||||
{
|
||||
rt_base_t level;
|
||||
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
if (sf2_pin_irq_hdr_tab[pin].pin == pin &&
|
||||
sf2_pin_irq_hdr_tab[pin].hdr == hdr &&
|
||||
sf2_pin_irq_hdr_tab[pin].mode == mode &&
|
||||
sf2_pin_irq_hdr_tab[pin].args == args)
|
||||
{
|
||||
rt_hw_interrupt_enable(level);
|
||||
return RT_EOK;
|
||||
}
|
||||
if (sf2_pin_irq_hdr_tab[pin].pin != -1)
|
||||
{
|
||||
rt_hw_interrupt_enable(level);
|
||||
return -RT_EBUSY;
|
||||
}
|
||||
sf2_pin_irq_hdr_tab[pin].pin = pin;
|
||||
sf2_pin_irq_hdr_tab[pin].hdr = hdr;
|
||||
sf2_pin_irq_hdr_tab[pin].mode = mode;
|
||||
sf2_pin_irq_hdr_tab[pin].args = args;
|
||||
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t sf2_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
|
||||
{
|
||||
rt_base_t level;
|
||||
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
if (sf2_pin_irq_hdr_tab[pin].pin == -1)
|
||||
{
|
||||
rt_hw_interrupt_enable(level);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
sf2_pin_irq_hdr_tab[pin].pin = -1;
|
||||
sf2_pin_irq_hdr_tab[pin].hdr = RT_NULL;
|
||||
sf2_pin_irq_hdr_tab[pin].mode = 0;
|
||||
sf2_pin_irq_hdr_tab[pin].args = RT_NULL;
|
||||
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t sf2_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
|
||||
{
|
||||
uint32_t mode;
|
||||
rt_base_t level;
|
||||
|
||||
if (enabled == PIN_IRQ_ENABLE)
|
||||
{
|
||||
level = rt_hw_interrupt_disable();
|
||||
if (sf2_pin_irq_hdr_tab[pin].pin == -1)
|
||||
{
|
||||
rt_hw_interrupt_enable(level);
|
||||
return -RT_ENOSYS;
|
||||
}
|
||||
switch(sf2_pin_irq_hdr_tab[pin].mode)
|
||||
{
|
||||
case PIN_IRQ_MODE_RISING :
|
||||
mode = MSS_GPIO_IRQ_EDGE_POSITIVE;
|
||||
break;
|
||||
case PIN_IRQ_MODE_FALLING :
|
||||
mode = MSS_GPIO_IRQ_EDGE_NEGATIVE;
|
||||
break;
|
||||
case PIN_IRQ_MODE_RISING_FALLING:
|
||||
mode = MSS_GPIO_IRQ_EDGE_BOTH;
|
||||
break;
|
||||
case PIN_IRQ_MODE_HIGH_LEVEL :
|
||||
mode = MSS_GPIO_IRQ_LEVEL_HIGH;
|
||||
break;
|
||||
case PIN_IRQ_MODE_LOW_LEVEL:
|
||||
mode = MSS_GPIO_IRQ_LEVEL_LOW;
|
||||
break;
|
||||
}
|
||||
MSS_GPIO_config((mss_gpio_id_t )pin, MSS_GPIO_INPUT_MODE | mode);
|
||||
MSS_GPIO_enable_irq((mss_gpio_id_t )pin);
|
||||
|
||||
rt_hw_interrupt_enable(level);
|
||||
}
|
||||
else if (enabled == PIN_IRQ_DISABLE)
|
||||
{
|
||||
MSS_GPIO_config((mss_gpio_id_t )pin, MSS_GPIO_INPUT_MODE);
|
||||
MSS_GPIO_disable_irq((mss_gpio_id_t )pin);
|
||||
}
|
||||
else
|
||||
return -RT_ENOSYS;
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static const struct rt_pin_ops sf2_pin_ops =
|
||||
{
|
||||
sf2_pin_mode,
|
||||
sf2_pin_write,
|
||||
sf2_pin_read,
|
||||
sf2_pin_attach_irq,
|
||||
sf2_pin_detach_irq,
|
||||
sf2_pin_irq_enable
|
||||
};
|
||||
|
||||
|
||||
int rt_hw_pin_init(void)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
MSS_GPIO_init();
|
||||
result = rt_device_pin_register("pin", &sf2_pin_ops, RT_NULL);
|
||||
RT_ASSERT(result == RT_EOK);
|
||||
return result;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_pin_init);
|
||||
|
||||
rt_inline void pin_irq_hdr(int pin)
|
||||
{
|
||||
MSS_GPIO_clear_irq((mss_gpio_id_t )pin);
|
||||
|
||||
if (sf2_pin_irq_hdr_tab[pin].hdr)
|
||||
sf2_pin_irq_hdr_tab[pin].hdr(sf2_pin_irq_hdr_tab[pin].args);
|
||||
}
|
||||
|
||||
void GPIO0_IRQHandler( void )
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(0);
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO1_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(1);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO2_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(2);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO3_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(3);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO4_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(4);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO5_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(5);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO6_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(6);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
void GPIO7_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(7);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO8_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(8);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO9_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(9);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO10_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(10);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO11_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(11);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO12_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(12);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO13_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(13);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO14_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(14);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO15_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(15);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO16_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(16);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO17_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(17);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO18_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(18);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO19_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(19);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO20_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(20);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO21_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(21);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO22_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(22);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO23_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(23);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO24_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(24);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO25_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(25);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO26_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(26);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO27_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(27);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO28_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(28);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO29_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(29);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO30_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(30);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
void GPIO31_IRQHandler( void )
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
pin_irq_hdr(31);
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
#ifndef __DRV_GPIO_H__
|
||||
#define __DRV_GPIO_H__
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,180 @@
|
|||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#include "drv_uart.h"
|
||||
|
||||
struct sf2_uart
|
||||
{
|
||||
mss_uart_instance_t *uart;
|
||||
IRQn_Type irq;
|
||||
};
|
||||
|
||||
struct sf2_uart uart0=
|
||||
{
|
||||
&g_mss_uart0,
|
||||
UART0_IRQn,
|
||||
};
|
||||
struct rt_serial_device serial0;
|
||||
|
||||
void uart0_rx_handler(mss_uart_instance_t *this_uart)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
struct sf2_uart uart1=
|
||||
{
|
||||
&g_mss_uart1,
|
||||
UART1_IRQn,
|
||||
};
|
||||
|
||||
struct rt_serial_device serial1;
|
||||
void uart1_rx_handler(mss_uart_instance_t *this_uart)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
static rt_err_t sf2_uart_configure(struct rt_serial_device *serial,
|
||||
struct serial_configure *cfg)
|
||||
{
|
||||
uint32_t baudRate;
|
||||
uint8_t datBits, parity, stopBits;
|
||||
uint8_t config;
|
||||
struct sf2_uart *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
RT_ASSERT(cfg != RT_NULL);
|
||||
|
||||
uart = (struct sf2_uart *)serial->parent.user_data;
|
||||
|
||||
switch(cfg->data_bits)
|
||||
{
|
||||
case DATA_BITS_5: datBits = MSS_UART_DATA_5_BITS; break;
|
||||
case DATA_BITS_6: datBits = MSS_UART_DATA_6_BITS; break;
|
||||
case DATA_BITS_7: datBits = MSS_UART_DATA_7_BITS; break;
|
||||
case DATA_BITS_8: datBits = MSS_UART_DATA_8_BITS; break;
|
||||
default: datBits = MSS_UART_DATA_8_BITS; break;
|
||||
}
|
||||
switch(cfg->parity)
|
||||
{
|
||||
case PARITY_NONE: parity = MSS_UART_NO_PARITY; break;
|
||||
case PARITY_EVEN: parity = MSS_UART_EVEN_PARITY; break;
|
||||
case PARITY_ODD : parity = MSS_UART_ODD_PARITY; break;
|
||||
default : parity = MSS_UART_NO_PARITY; break;
|
||||
}
|
||||
switch(cfg->stop_bits)
|
||||
{
|
||||
case STOP_BITS_1: stopBits = MSS_UART_ONE_STOP_BIT; break;
|
||||
case STOP_BITS_2: stopBits = MSS_UART_TWO_STOP_BITS; break;
|
||||
case STOP_BITS_3: stopBits = MSS_UART_ONEHALF_STOP_BIT; break;
|
||||
default : stopBits = MSS_UART_ONE_STOP_BIT;
|
||||
}
|
||||
|
||||
baudRate = cfg->baud_rate;
|
||||
config = datBits | parity | stopBits;
|
||||
|
||||
MSS_UART_init(uart->uart, baudRate, config);
|
||||
if(uart->uart == &g_mss_uart0)
|
||||
MSS_UART_set_rx_handler(uart->uart, uart0_rx_handler, MSS_UART_FIFO_SINGLE_BYTE);
|
||||
else
|
||||
MSS_UART_set_rx_handler(uart->uart, uart1_rx_handler, MSS_UART_FIFO_SINGLE_BYTE);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t sf2_uart_control(struct rt_serial_device *serial,
|
||||
int cmd, void *arg)
|
||||
{
|
||||
struct sf2_uart* uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct sf2_uart*)serial->parent.user_data;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_CLR_INT:
|
||||
NVIC_DisableIRQ(uart->irq);
|
||||
break;
|
||||
case RT_DEVICE_CTRL_SET_INT:
|
||||
NVIC_EnableIRQ(uart->irq);
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int sf2_uart_putc(struct rt_serial_device *serial, char c)
|
||||
{
|
||||
struct sf2_uart* uart;
|
||||
uint32_t tx_ready;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
|
||||
uart = (struct sf2_uart*)serial->parent.user_data;
|
||||
|
||||
do {
|
||||
tx_ready = uart->uart->hw_reg->LSR & 0x20u;
|
||||
} while(!tx_ready);
|
||||
uart->uart->hw_reg->THR = c;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int sf2_uart_getc(struct rt_serial_device *serial)
|
||||
{
|
||||
int ch = -1;
|
||||
uint8_t err_status;
|
||||
struct sf2_uart* uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct sf2_uart*)serial->parent.user_data;
|
||||
|
||||
err_status = MSS_UART_get_rx_status(uart->uart);
|
||||
if(MSS_UART_NO_ERROR == err_status)
|
||||
MSS_UART_get_rx(uart->uart, (uint8_t *)&ch, 1);
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
static const struct rt_uart_ops sf2_uart_ops =
|
||||
{
|
||||
sf2_uart_configure,
|
||||
sf2_uart_control,
|
||||
sf2_uart_putc,
|
||||
sf2_uart_getc,
|
||||
};
|
||||
|
||||
|
||||
int rt_hw_uart_init(void)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
struct sf2_uart* uart;
|
||||
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||||
|
||||
#ifdef BSP_USING_UART0
|
||||
uart = &uart0;
|
||||
serial0.ops = &sf2_uart_ops;
|
||||
/* default config: 115200, 8, no, 1 */
|
||||
serial0.config = config;
|
||||
result = rt_hw_serial_register(&serial0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
|
||||
RT_ASSERT(result == RT_EOK);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
uart = &uart1;
|
||||
serial1.ops = &sf2_uart_ops;
|
||||
/* default config: 115200, 8, no, 1 */
|
||||
serial1.config = config;
|
||||
result = rt_hw_serial_register(&serial1, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
|
||||
RT_ASSERT(result == RT_EOK);
|
||||
#endif
|
||||
return result;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_uart_init);
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
#ifndef __DRV_UART_H__
|
||||
#define __DRV_UART_H__
|
||||
|
||||
#include "mss_uart.h"
|
||||
void uart_rx_handler(mss_uart_instance_t *this_uart);
|
||||
|
||||
void uart0_rx_handler(mss_uart_instance_t * this_uart);
|
||||
void uart1_rx_handler(mss_uart_instance_t * this_uart);
|
||||
int rt_hw_uart_init(void);
|
||||
|
||||
#endif
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1007 KiB |
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|
After Width: | Height: | Size: 581 KiB |
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|
After Width: | Height: | Size: 158 KiB |
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|
After Width: | Height: | Size: 154 KiB |
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|
After Width: | Height: | Size: 152 KiB |
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|
After Width: | Height: | Size: 260 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 492 KiB |
|
|
@ -1,30 +0,0 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SVN $Revision: 5258 $
|
||||
* SVN $Date: 2013-03-21 18:11:02 +0530 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
#ifndef __CPU_TYPES_H
|
||||
#define __CPU_TYPES_H 1
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*/
|
||||
typedef unsigned int size_t;
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* addr_t: address type.
|
||||
* Used to specify the address of peripherals present in the processor's memory
|
||||
* map.
|
||||
*/
|
||||
typedef unsigned int addr_t;
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* psr_t: processor state register.
|
||||
* Used by HAL_disable_interrupts() and HAL_restore_interrupts() to store the
|
||||
* processor's state between disabling and restoring interrupts.
|
||||
*/
|
||||
typedef unsigned int psr_t;
|
||||
|
||||
#endif /* __CPU_TYPES_H */
|
||||
|
|
@ -1,32 +0,0 @@
|
|||
;-------------------------------------------------------------------------------
|
||||
; (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
;
|
||||
; Interrupt disabling/restoration for critical section protection.
|
||||
;
|
||||
; SVN $Revision: 5261 $
|
||||
; SVN $Date: 2013-03-21 19:52:41 +0530 (Thu, 21 Mar 2013) $
|
||||
;
|
||||
AREA |.text|, CODE, READONLY
|
||||
EXPORT HAL_disable_interrupts
|
||||
EXPORT HAL_restore_interrupts
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
;
|
||||
;
|
||||
HAL_disable_interrupts \
|
||||
PROC
|
||||
mrs r0, PRIMASK
|
||||
cpsid I
|
||||
bx lr
|
||||
ENDP
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
;
|
||||
;
|
||||
HAL_restore_interrupts \
|
||||
PROC
|
||||
msr PRIMASK, r0
|
||||
bx lr
|
||||
ENDP
|
||||
|
||||
END
|
||||
|
|
@ -1,96 +0,0 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Hardware registers access macros.
|
||||
*
|
||||
* THE MACROS DEFINED IN THIS FILE ARE DEPRECATED. DO NOT USED FOR NEW
|
||||
* DEVELOPMENT.
|
||||
*
|
||||
* These macros are used to access peripheral's registers. They allow access to
|
||||
* 8, 16 and 32 bit wide registers. All accesses to peripheral registers should
|
||||
* be done through these macros in order to ease porting accross different
|
||||
* processors/bus architectures.
|
||||
*
|
||||
* Some of these macros also allow to access a specific register field.
|
||||
*
|
||||
* SVN $Revision: 5258 $
|
||||
* SVN $Date: 2013-03-21 18:11:02 +0530 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
#ifndef __HW_REGISTER_MACROS_H
|
||||
#define __HW_REGISTER_MACROS_H 1
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 32 bits registers access:
|
||||
*/
|
||||
#define HW_get_uint32_reg(BASE_ADDR, REG_OFFSET) (*((uint32_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)))
|
||||
|
||||
#define HW_set_uint32_reg(BASE_ADDR, REG_OFFSET, VALUE) (*((uint32_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)) = (VALUE))
|
||||
|
||||
#define HW_set_uint32_reg_field(BASE_ADDR, FIELD, VALUE) \
|
||||
(*((uint32_t volatile *)(BASE_ADDR + FIELD##_OFFSET)) = \
|
||||
( \
|
||||
(uint32_t) \
|
||||
( \
|
||||
(*((uint32_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & ~FIELD##_MASK) | \
|
||||
(uint32_t)(((VALUE) << FIELD##_SHIFT) & FIELD##_MASK) \
|
||||
) \
|
||||
)
|
||||
|
||||
#define HW_get_uint32_reg_field( BASE_ADDR, FIELD ) \
|
||||
(( (*((uint32_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & FIELD##_MASK) >> FIELD##_SHIFT)
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 32 bits memory access:
|
||||
*/
|
||||
#define HW_get_uint32(BASE_ADDR) (*((uint32_t volatile *)(BASE_ADDR)))
|
||||
|
||||
#define HW_set_uint32(BASE_ADDR, VALUE) (*((uint32_t volatile *)(BASE_ADDR)) = (VALUE))
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 16 bits registers access:
|
||||
*/
|
||||
#define HW_get_uint16_reg(BASE_ADDR, REG_OFFSET) (*((uint16_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)))
|
||||
|
||||
#define HW_set_uint16_reg(BASE_ADDR, REG_OFFSET, VALUE) (*((uint16_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)) = (VALUE))
|
||||
|
||||
#define HW_set_uint16_reg_field(BASE_ADDR, FIELD, VALUE) \
|
||||
(*((uint16_t volatile *)(BASE_ADDR + FIELD##_OFFSET)) = \
|
||||
( \
|
||||
(uint16_t) \
|
||||
( \
|
||||
(*((uint16_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & ~FIELD##_MASK) | \
|
||||
(uint16_t)(((VALUE) << FIELD##_SHIFT) & FIELD##_MASK) \
|
||||
) \
|
||||
)
|
||||
|
||||
#define HW_get_uint16_reg_field( BASE_ADDR, FIELD ) \
|
||||
(( (*((uint16_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & FIELD##_MASK) >> FIELD##_SHIFT)
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 8 bits registers access:
|
||||
*/
|
||||
#define HW_get_uint8_reg(BASE_ADDR, REG_OFFSET) (*((uint8_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)))
|
||||
|
||||
#define HW_set_uint8_reg(BASE_ADDR, REG_OFFSET, VALUE) (*((uint8_t volatile *)(BASE_ADDR + REG_OFFSET##_REG_OFFSET)) = (VALUE))
|
||||
|
||||
#define HW_set_uint8_reg_field(BASE_ADDR, FIELD, VALUE) \
|
||||
(*((uint8_t volatile *)(BASE_ADDR + FIELD##_OFFSET)) = \
|
||||
( \
|
||||
(uint8_t) \
|
||||
( \
|
||||
(*((uint8_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & ~FIELD##_MASK) | \
|
||||
(uint8_t)(((VALUE) << FIELD##_SHIFT) & FIELD##_MASK) \
|
||||
) \
|
||||
)
|
||||
|
||||
#define HW_get_uint8_reg_field( BASE_ADDR, FIELD ) \
|
||||
(( (*((uint8_t volatile *)(BASE_ADDR + FIELD##_OFFSET))) & FIELD##_MASK) >> FIELD##_SHIFT)
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* 8 bits memory access:
|
||||
*/
|
||||
#define HW_get_uint8(BASE_ADDR) (*((uint8_t volatile *)(BASE_ADDR)))
|
||||
|
||||
#define HW_set_uint8(BASE_ADDR, VALUE) (*((uint8_t volatile *)(BASE_ADDR)) = (VALUE))
|
||||
|
||||
#endif /* __HW_REGISTER_MACROS_H */
|
||||
|
|
@ -1,209 +0,0 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Legacy Actel HAL Cortex NVIC control functions.
|
||||
* The use of these functions should be replaced by calls to the equivalent
|
||||
* CMSIS function in your application code.
|
||||
*
|
||||
* SVN $Revision: 7375 $
|
||||
* SVN $Date: 2015-05-01 19:27:40 +0530 (Fri, 01 May 2015) $
|
||||
*/
|
||||
#include "cortex_nvic.h"
|
||||
#ifdef MSCC_NO_RELATIVE_PATHS
|
||||
#include "mss_assert.h"
|
||||
#else
|
||||
#include "../../CMSIS/mss_assert.h"
|
||||
#endif
|
||||
|
||||
|
||||
/***************************************************************************//**
|
||||
*
|
||||
*/
|
||||
void NVIC_init( void )
|
||||
{
|
||||
/*
|
||||
* Please use the NVIC control functions provided by the SmartFusion2 CMSIS
|
||||
* Hardware Abstraction Layer. The use of the Actel HAL NVIC control
|
||||
* functions is obsolete on SmartFusion2 devices.
|
||||
*
|
||||
* Simply remove the call to NVIC_init() from your application code.
|
||||
*/
|
||||
ASSERT(0);
|
||||
}
|
||||
|
||||
/***************************************************************************//**
|
||||
*
|
||||
*/
|
||||
void NVIC_set_handler
|
||||
(
|
||||
uint32_t interrupt_number,
|
||||
hal_nvic_irq_handler_t handler
|
||||
)
|
||||
{
|
||||
/*
|
||||
* Please use the NVIC control functions provided by the SmartFusion2 CMSIS
|
||||
* Hardware Abstraction Layer. The use of the Actel HAL NVIC control
|
||||
* functions is obsolete on SmartFusion2 devices.
|
||||
*
|
||||
* Please remove the call to NVIC_set_handler() from your application code
|
||||
* and provide a function using one of the following function prototypes to
|
||||
* handle interrupts from peripherals implemeted in the SmartFusion2 FPGA
|
||||
* fabric:
|
||||
* - void FabricIrq0_IRQHandler(void)
|
||||
* - void FabricIrq1_IRQHandler(void)
|
||||
* - void FabricIrq2_IRQHandler(void)
|
||||
* - void FabricIrq3_IRQHandler(void)
|
||||
* - void FabricIrq4_IRQHandler(void)
|
||||
* - void FabricIrq5_IRQHandler(void)
|
||||
* - void FabricIrq6_IRQHandler(void)
|
||||
* - void FabricIrq7_IRQHandler(void)
|
||||
* - void FabricIrq8_IRQHandler(void)
|
||||
* - void FabricIrq9_IRQHandler(void)
|
||||
* - void FabricIrq10_IRQHandler(void)
|
||||
* - void FabricIrq11_IRQHandler(void)
|
||||
* - void FabricIrq12_IRQHandler(void)
|
||||
* - void FabricIrq13_IRQHandler(void)
|
||||
* - void FabricIrq14_IRQHandler(void)
|
||||
* - void FabricIrq15_IRQHandler(void)
|
||||
* The function to implement depends on which MSS_INT_F2M[n] signal is used
|
||||
* in your Libero design to connect the interrupt signal of the peripheral
|
||||
* generating the interrupt.
|
||||
*/
|
||||
ASSERT(0);
|
||||
}
|
||||
|
||||
/***************************************************************************//**
|
||||
*
|
||||
*/
|
||||
void NVIC_set_priority
|
||||
(
|
||||
uint32_t interrupt_number,
|
||||
uint8_t priority_level
|
||||
)
|
||||
{
|
||||
/*
|
||||
* Please use the NVIC control functions provided by the SmartFusion2 CMSIS
|
||||
* Hardware Abstraction Layer. The use of the Actel HAL NVIC control
|
||||
* functions is obsolete on SmartFusion2 devices.
|
||||
*
|
||||
* Please replace calls to NVIC_set_priority() with a call to the CMSIS
|
||||
* void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) function where
|
||||
* IRQn is one of the following values:
|
||||
* - FabricIrq0_IRQn
|
||||
* - FabricIrq1_IRQn
|
||||
* - FabricIrq2_IRQn
|
||||
* - FabricIrq3_IRQn
|
||||
* - FabricIrq4_IRQn
|
||||
* - FabricIrq5_IRQn
|
||||
* - FabricIrq6_IRQn
|
||||
* - FabricIrq7_IRQn
|
||||
* - FabricIrq8_IRQn
|
||||
* - FabricIrq9_IRQn
|
||||
* - FabricIrq10_IRQn
|
||||
* - FabricIrq11_IRQn
|
||||
* - FabricIrq12_IRQn
|
||||
* - FabricIrq13_IRQn
|
||||
* - FabricIrq14_IRQn
|
||||
* - FabricIrq15_IRQn
|
||||
*/
|
||||
ASSERT(0);
|
||||
}
|
||||
|
||||
/***************************************************************************//**
|
||||
*
|
||||
*/
|
||||
void NVIC_enable_interrupt( uint32_t interrupt_number )
|
||||
{
|
||||
/*
|
||||
* Please use the NVIC control functions provided by the SmartFusion2 CMSIS
|
||||
* Hardware Abstraction Layer. The use of the Actel HAL NVIC control
|
||||
* functions is obsolete on SmartFusion2 devices.
|
||||
*
|
||||
* Please replace calls to NVIC_enable_interrupt() with a call to the CMSIS
|
||||
* void NVIC_EnableIRQ(IRQn_Type IRQn) function where IRQn is one of the
|
||||
* following values:
|
||||
* - FabricIrq0_IRQn
|
||||
* - FabricIrq1_IRQn
|
||||
* - FabricIrq2_IRQn
|
||||
* - FabricIrq3_IRQn
|
||||
* - FabricIrq4_IRQn
|
||||
* - FabricIrq5_IRQn
|
||||
* - FabricIrq6_IRQn
|
||||
* - FabricIrq7_IRQn
|
||||
* - FabricIrq8_IRQn
|
||||
* - FabricIrq9_IRQn
|
||||
* - FabricIrq10_IRQn
|
||||
* - FabricIrq11_IRQn
|
||||
* - FabricIrq12_IRQn
|
||||
* - FabricIrq13_IRQn
|
||||
* - FabricIrq14_IRQn
|
||||
* - FabricIrq15_IRQn
|
||||
*/
|
||||
ASSERT(0);
|
||||
}
|
||||
|
||||
/***************************************************************************//**
|
||||
*
|
||||
*/
|
||||
void NVIC_disable_interrupt( uint32_t interrupt_number )
|
||||
{
|
||||
/*
|
||||
* Please use the NVIC control functions provided by the SmartFusion2 CMSIS
|
||||
* Hardware Abstraction Layer. The use of the Actel HAL NVIC control
|
||||
* functions is obsolete on SmartFusion2 devices.
|
||||
*
|
||||
* Please replace calls to NVIC_disable_interrupt() with a call to the CMSIS
|
||||
* void NVIC_DisableIRQ(IRQn_Type IRQn) function where IRQn is one of the
|
||||
* following values:
|
||||
* - FabricIrq0_IRQn
|
||||
* - FabricIrq1_IRQn
|
||||
* - FabricIrq2_IRQn
|
||||
* - FabricIrq3_IRQn
|
||||
* - FabricIrq4_IRQn
|
||||
* - FabricIrq5_IRQn
|
||||
* - FabricIrq6_IRQn
|
||||
* - FabricIrq7_IRQn
|
||||
* - FabricIrq8_IRQn
|
||||
* - FabricIrq9_IRQn
|
||||
* - FabricIrq10_IRQn
|
||||
* - FabricIrq11_IRQn
|
||||
* - FabricIrq12_IRQn
|
||||
* - FabricIrq13_IRQn
|
||||
* - FabricIrq14_IRQn
|
||||
* - FabricIrq15_IRQn
|
||||
*/
|
||||
ASSERT(0);
|
||||
}
|
||||
|
||||
/***************************************************************************//**
|
||||
*
|
||||
*/
|
||||
void NVIC_clear_interrupt( uint32_t interrupt_number )
|
||||
{
|
||||
/*
|
||||
* Please use the NVIC control functions provided by the SmartFusion2 CMSIS
|
||||
* Hardware Abstraction Layer. The use of the Actel HAL NVIC control
|
||||
* functions is obsolete on SmartFusion2 devices.
|
||||
*
|
||||
* Please replace calls to NVIC_clear_interrupt() with a call to the CMSIS
|
||||
* void NVIC_ClearPendingIRQ(IRQn_Type IRQn) function where IRQn is one of the
|
||||
* following values:
|
||||
* - FabricIrq0_IRQn
|
||||
* - FabricIrq1_IRQn
|
||||
* - FabricIrq2_IRQn
|
||||
* - FabricIrq3_IRQn
|
||||
* - FabricIrq4_IRQn
|
||||
* - FabricIrq5_IRQn
|
||||
* - FabricIrq6_IRQn
|
||||
* - FabricIrq7_IRQn
|
||||
* - FabricIrq8_IRQn
|
||||
* - FabricIrq9_IRQn
|
||||
* - FabricIrq10_IRQn
|
||||
* - FabricIrq11_IRQn
|
||||
* - FabricIrq12_IRQn
|
||||
* - FabricIrq13_IRQn
|
||||
* - FabricIrq14_IRQn
|
||||
* - FabricIrq15_IRQn
|
||||
*/
|
||||
ASSERT(0);
|
||||
}
|
||||
|
|
@ -1,56 +0,0 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Legacy Actel HAL Cortex NVIC control functions.
|
||||
* The use of these functions should be replaced by calls to the equivalent
|
||||
* CMSIS function in your application code.
|
||||
*
|
||||
* SVN $Revision: 5257 $
|
||||
* SVN $Date: 2013-03-21 17:54:10 +0530 (Thu, 21 Mar 2013) $
|
||||
*/
|
||||
#ifndef CORTEX_NVIC_H_
|
||||
#define CORTEX_NVIC_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef void (*hal_nvic_irq_handler_t)(void);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_init( void );
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_set_handler
|
||||
(
|
||||
uint32_t interrupt_number,
|
||||
hal_nvic_irq_handler_t handler
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_set_priority
|
||||
(
|
||||
uint32_t interrupt_number,
|
||||
uint8_t priority_level
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_enable_interrupt( uint32_t interrupt_number );
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_disable_interrupt( uint32_t interrupt_number );
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void NVIC_clear_interrupt( uint32_t interrupt_number );
|
||||
|
||||
#endif /*CORTEX_NVIC_H_*/
|
||||
|
|
@ -1,752 +0,0 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2012-2016 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 COMBLK access functions.
|
||||
*
|
||||
* SVN $Revision: 8345 $
|
||||
* SVN $Date: 2016-03-23 11:53:04 +0530 (Wed, 23 Mar 2016) $
|
||||
*/
|
||||
|
||||
#include "mss_comblk.h"
|
||||
#include "../../CMSIS/mss_assert.h"
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
/*------------------------------------------------------------------------------
|
||||
* Control register bit masks.
|
||||
*/
|
||||
#define CR_FLUSHOUT_MASK 0x01u
|
||||
#define CR_FLUSHIN_MASK 0x02u
|
||||
#define CR_SIZETX_MASK 0x04u
|
||||
#define CR_ENABLE_MASK 0x10u
|
||||
#define CR_LOOPBACK_MASK 0x20u
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Status and interrupt enable registers bit masks.
|
||||
*/
|
||||
#define TXTOKAY_MASK 0x01u
|
||||
#define RCVOKAY_MASK 0x02u
|
||||
#define TXOVERFLOW_MASK 0x04u
|
||||
#define RXUNDERFLOW_MASK 0x08u
|
||||
/*------------------------------------------------------------------------------
|
||||
* DATA8 register bit masks.
|
||||
*/
|
||||
#define DATA8_COMMAND_MASK 0x8000u
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* COMBLK driver states.
|
||||
*/
|
||||
#define COMBLK_IDLE 0u
|
||||
#define COMBLK_TX_CMD 1u
|
||||
#define COMBLK_TX_DATA 2u
|
||||
#define COMBLK_WAIT_RESPONSE 3u
|
||||
#define COMBLK_RX_RESPONSE 4u
|
||||
#define COMBLK_TX_PAGED_DATA 5u
|
||||
|
||||
#define POR_DIGEST_ERROR_OPCODE 0xF1u
|
||||
|
||||
/*==============================================================================
|
||||
* COMBLK interrupt service routine.
|
||||
*/
|
||||
void ComBlk_IRQHandler(void);
|
||||
|
||||
/*==============================================================================
|
||||
* Local functions.
|
||||
*/
|
||||
static void abort_current_cmd(void);
|
||||
static void send_cmd_opcode(uint8_t opcode);
|
||||
static uint32_t fill_tx_fifo(const uint8_t * p_cmd, uint32_t cmd_size);
|
||||
static void handle_tx_okay_irq(void);
|
||||
static void handle_rx_okay_irq(void);
|
||||
static void complete_request(uint16_t response_length);
|
||||
static void process_sys_ctrl_command(uint8_t cmd_opcode);
|
||||
|
||||
/*==============================================================================
|
||||
* Global variables:
|
||||
*/
|
||||
static volatile uint8_t g_comblk_cmd_opcode = 0u;
|
||||
static const uint8_t * g_comblk_p_cmd = 0u;
|
||||
static volatile uint16_t g_comblk_cmd_size = 0u;
|
||||
static const uint8_t * g_comblk_p_data = 0u;
|
||||
static volatile uint32_t g_comblk_data_size = 0u;
|
||||
static uint8_t * g_comblk_p_response = 0u;
|
||||
static uint16_t g_comblk_response_size = 0u;
|
||||
static volatile uint16_t g_comblk_response_idx = 0u;
|
||||
static comblk_completion_handler_t g_comblk_completion_handler = 0;
|
||||
static uint32_t (*g_comblk_page_handler)(uint8_t const ** pp_next_page) = 0;
|
||||
static volatile uint8_t g_request_in_progress = 0u;
|
||||
static uint8_t g_comblk_state = COMBLK_IDLE;
|
||||
static volatile comblk_async_event_handler_t g_async_event_handler = 0;
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_init
|
||||
(
|
||||
comblk_async_event_handler_t async_event_handler,
|
||||
uint8_t* p_response
|
||||
)
|
||||
{
|
||||
/*
|
||||
* Disable and clear previous interrupts.
|
||||
*/
|
||||
NVIC_DisableIRQ(ComBlk_IRQn);
|
||||
COMBLK->INT_ENABLE = 0u;
|
||||
NVIC_ClearPendingIRQ(ComBlk_IRQn);
|
||||
|
||||
g_async_event_handler = async_event_handler;
|
||||
|
||||
/*
|
||||
* Initialize COMBLK driver state variables:
|
||||
*/
|
||||
g_request_in_progress = 0u;
|
||||
g_comblk_cmd_opcode = 0u;
|
||||
g_comblk_p_cmd = 0u;
|
||||
g_comblk_cmd_size = 0u;
|
||||
g_comblk_p_data = 0u;
|
||||
g_comblk_data_size = 0u;
|
||||
g_comblk_p_response = p_response;
|
||||
g_comblk_response_size = 0u;
|
||||
g_comblk_response_idx = 0u;
|
||||
g_comblk_completion_handler = 0;
|
||||
|
||||
g_comblk_state = COMBLK_IDLE;
|
||||
|
||||
/*
|
||||
* Disable loopback before enabling the MSS COMM_BLK to ensure that any
|
||||
* codes waiting in the TX FIFO of the System Controller’s COMM_BLK are
|
||||
* not lost.
|
||||
*/
|
||||
COMBLK->CONTROL &= ~CR_LOOPBACK_MASK;
|
||||
COMBLK->CONTROL |= CR_ENABLE_MASK;
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
* Enable receive interrupt to receive asynchronous events from the system
|
||||
* controller.
|
||||
*/
|
||||
COMBLK->INT_ENABLE &= ~TXTOKAY_MASK;
|
||||
COMBLK->INT_ENABLE |= RCVOKAY_MASK;
|
||||
NVIC_EnableIRQ(ComBlk_IRQn);
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_send_cmd_with_ptr
|
||||
(
|
||||
uint8_t cmd_opcode,
|
||||
uint32_t cmd_params_ptr,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_completion_handler_t completion_handler
|
||||
)
|
||||
{
|
||||
uint32_t tx_okay;
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
* Disable and clear previous interrupts.
|
||||
*/
|
||||
NVIC_DisableIRQ(ComBlk_IRQn);
|
||||
COMBLK->INT_ENABLE = 0u;
|
||||
NVIC_ClearPendingIRQ(ComBlk_IRQn);
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
* Abort current command if any.
|
||||
*/
|
||||
abort_current_cmd();
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
* Initialize COMBLK driver state variables.
|
||||
*/
|
||||
g_request_in_progress = 1u;
|
||||
g_comblk_cmd_opcode = cmd_opcode;
|
||||
g_comblk_p_cmd = 0u;
|
||||
g_comblk_cmd_size = 0u;
|
||||
g_comblk_p_data = 0u;
|
||||
g_comblk_data_size = 0u;
|
||||
g_comblk_p_response = p_response;
|
||||
g_comblk_response_size = response_size;
|
||||
g_comblk_response_idx = 0u;
|
||||
g_comblk_page_handler = 0u;
|
||||
g_comblk_completion_handler = completion_handler;
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
* Send command opcode as a single byte write to the Tx FIFO.
|
||||
*/
|
||||
send_cmd_opcode(g_comblk_cmd_opcode);
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
* Send the command parameters pointer to the Tx FIFO as a single 4 bytes
|
||||
* write to the Tx FIFO.
|
||||
*/
|
||||
COMBLK->CONTROL |= CR_SIZETX_MASK;
|
||||
|
||||
/* Wait for space to become available in Tx FIFO. */
|
||||
do {
|
||||
tx_okay = COMBLK->STATUS & TXTOKAY_MASK;
|
||||
} while(0u == tx_okay);
|
||||
|
||||
/* Send command opcode. */
|
||||
COMBLK->DATA32 = cmd_params_ptr;
|
||||
|
||||
COMBLK->CONTROL &= ~CR_SIZETX_MASK;
|
||||
|
||||
g_comblk_state = COMBLK_WAIT_RESPONSE;
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
* Enable interrupt.
|
||||
*/
|
||||
COMBLK->INT_ENABLE |= RCVOKAY_MASK;
|
||||
NVIC_EnableIRQ(ComBlk_IRQn);
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_send_cmd
|
||||
(
|
||||
const uint8_t * p_cmd,
|
||||
uint16_t cmd_size,
|
||||
const uint8_t * p_data,
|
||||
uint32_t data_size,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_completion_handler_t completion_handler
|
||||
)
|
||||
{
|
||||
uint32_t size_sent;
|
||||
|
||||
ASSERT(cmd_size > 0);
|
||||
|
||||
/*
|
||||
* Disable and clear previous interrupts.
|
||||
*/
|
||||
NVIC_DisableIRQ(ComBlk_IRQn);
|
||||
COMBLK->INT_ENABLE = 0u;
|
||||
NVIC_ClearPendingIRQ(ComBlk_IRQn);
|
||||
|
||||
/*
|
||||
* Abort current command if any.
|
||||
*/
|
||||
abort_current_cmd();
|
||||
|
||||
/*
|
||||
* Initialize COMBLK driver state variables:
|
||||
*/
|
||||
g_request_in_progress = 1u;
|
||||
g_comblk_cmd_opcode = p_cmd[0];
|
||||
g_comblk_p_cmd = p_cmd;
|
||||
g_comblk_cmd_size = cmd_size;
|
||||
g_comblk_p_data = p_data;
|
||||
g_comblk_data_size = data_size;
|
||||
g_comblk_p_response = p_response;
|
||||
g_comblk_response_size = response_size;
|
||||
g_comblk_response_idx = 0u;
|
||||
g_comblk_page_handler = 0u;
|
||||
g_comblk_completion_handler = completion_handler;
|
||||
|
||||
COMBLK->INT_ENABLE |= RCVOKAY_MASK;
|
||||
|
||||
/*
|
||||
* Fill FIFO with command.
|
||||
*/
|
||||
send_cmd_opcode(g_comblk_cmd_opcode);
|
||||
size_sent = fill_tx_fifo(&p_cmd[1], cmd_size - 1u);
|
||||
++size_sent; /* Adjust for opcode byte sent. */
|
||||
if(size_sent < cmd_size)
|
||||
{
|
||||
g_comblk_cmd_size = g_comblk_cmd_size - (uint16_t)size_sent;
|
||||
g_comblk_p_cmd = &g_comblk_p_cmd[size_sent];
|
||||
|
||||
g_comblk_state = COMBLK_TX_CMD;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_comblk_cmd_size = 0u;
|
||||
if(g_comblk_data_size > 0u)
|
||||
{
|
||||
g_comblk_state = COMBLK_TX_DATA;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_comblk_state = COMBLK_WAIT_RESPONSE;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable interrupt.
|
||||
*/
|
||||
NVIC_EnableIRQ(ComBlk_IRQn);
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_send_paged_cmd
|
||||
(
|
||||
const uint8_t * p_cmd,
|
||||
uint16_t cmd_size,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_page_handler_t page_read_handler,
|
||||
comblk_completion_handler_t completion_handler
|
||||
)
|
||||
{
|
||||
uint32_t size_sent;
|
||||
uint8_t irq_enable = 0u;
|
||||
|
||||
ASSERT(cmd_size > 0u);
|
||||
|
||||
/*
|
||||
* Disable and clear previous interrupts.
|
||||
*/
|
||||
NVIC_DisableIRQ(ComBlk_IRQn);
|
||||
COMBLK->INT_ENABLE = 0u;
|
||||
NVIC_ClearPendingIRQ(ComBlk_IRQn);
|
||||
|
||||
/*
|
||||
* Abort current command if any.
|
||||
*/
|
||||
abort_current_cmd();
|
||||
|
||||
/*
|
||||
* Initialize COMBLK driver state variables:
|
||||
*/
|
||||
g_request_in_progress = 1u;
|
||||
g_comblk_cmd_opcode = p_cmd[0];
|
||||
g_comblk_p_cmd = p_cmd;
|
||||
g_comblk_cmd_size = cmd_size;
|
||||
g_comblk_p_data = 0;
|
||||
g_comblk_data_size = 0u;
|
||||
g_comblk_p_response = p_response;
|
||||
g_comblk_response_size = response_size;
|
||||
g_comblk_response_idx = 0u;
|
||||
g_comblk_page_handler = page_read_handler;
|
||||
g_comblk_completion_handler = completion_handler;
|
||||
|
||||
/*
|
||||
* Fill FIFO with command.
|
||||
*/
|
||||
send_cmd_opcode(g_comblk_cmd_opcode);
|
||||
size_sent = fill_tx_fifo(&p_cmd[1], cmd_size - 1u);
|
||||
++size_sent; /* Adjust for opcode byte sent. */
|
||||
if(size_sent < cmd_size)
|
||||
{
|
||||
g_comblk_cmd_size = g_comblk_cmd_size - (uint16_t)size_sent;
|
||||
g_comblk_p_cmd = &g_comblk_p_cmd[size_sent];
|
||||
|
||||
g_comblk_state = COMBLK_TX_CMD;
|
||||
irq_enable = TXTOKAY_MASK | RCVOKAY_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_comblk_cmd_size = 0u;
|
||||
g_comblk_state = COMBLK_TX_PAGED_DATA;
|
||||
irq_enable = TXTOKAY_MASK | RCVOKAY_MASK;
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable interrupt.
|
||||
*/
|
||||
COMBLK->INT_ENABLE |= irq_enable;
|
||||
NVIC_EnableIRQ(ComBlk_IRQn);
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* COMBLK interrupt handler.
|
||||
*/
|
||||
void ComBlk_IRQHandler(void)
|
||||
{
|
||||
uint8_t status;
|
||||
uint8_t tx_okay;
|
||||
uint8_t rcv_okay;
|
||||
|
||||
status = (uint8_t)COMBLK->STATUS;
|
||||
|
||||
/* Mask off interrupt that are not enabled.*/
|
||||
status &= COMBLK->INT_ENABLE;
|
||||
|
||||
rcv_okay = status & RCVOKAY_MASK;
|
||||
|
||||
if(rcv_okay)
|
||||
{
|
||||
handle_rx_okay_irq();
|
||||
}
|
||||
|
||||
tx_okay = status & TXTOKAY_MASK;
|
||||
if(tx_okay)
|
||||
{
|
||||
handle_tx_okay_irq();
|
||||
}
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
static void handle_tx_okay_irq(void)
|
||||
{
|
||||
switch(g_comblk_state)
|
||||
{
|
||||
/*----------------------------------------------------------------------
|
||||
* The TX_OKAY interrupt should only be enabled for states COMBLK_TX_CMD
|
||||
* and COMBLK_TX_DATA.
|
||||
*/
|
||||
case COMBLK_TX_CMD:
|
||||
if(g_comblk_cmd_size > 0u)
|
||||
{
|
||||
uint32_t size_sent;
|
||||
size_sent = fill_tx_fifo(g_comblk_p_cmd, g_comblk_cmd_size);
|
||||
if(size_sent < g_comblk_cmd_size)
|
||||
{
|
||||
g_comblk_cmd_size = g_comblk_cmd_size - (uint16_t)size_sent;
|
||||
g_comblk_p_cmd = &g_comblk_p_cmd[size_sent];
|
||||
}
|
||||
else
|
||||
{
|
||||
g_comblk_cmd_size = 0u;
|
||||
if(g_comblk_data_size > 0u)
|
||||
{
|
||||
g_comblk_state = COMBLK_TX_DATA;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_comblk_state = COMBLK_WAIT_RESPONSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/*
|
||||
* This is an invalid situation indicating a bug in the driver
|
||||
* or corrupted memory.
|
||||
*/
|
||||
ASSERT(0);
|
||||
abort_current_cmd();
|
||||
}
|
||||
break;
|
||||
|
||||
case COMBLK_TX_DATA:
|
||||
if(g_comblk_data_size > 0u)
|
||||
{
|
||||
uint32_t size_sent;
|
||||
size_sent = fill_tx_fifo(g_comblk_p_data, g_comblk_data_size);
|
||||
if(size_sent < g_comblk_data_size)
|
||||
{
|
||||
g_comblk_data_size = g_comblk_data_size - size_sent;
|
||||
g_comblk_p_data = &g_comblk_p_data[size_sent];
|
||||
}
|
||||
else
|
||||
{
|
||||
COMBLK->INT_ENABLE &= ~TXTOKAY_MASK;
|
||||
g_comblk_state = COMBLK_WAIT_RESPONSE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/*
|
||||
* This is an invalid situation indicating a bug in the driver
|
||||
* or corrupted memory.
|
||||
*/
|
||||
ASSERT(0);
|
||||
abort_current_cmd();
|
||||
}
|
||||
break;
|
||||
|
||||
case COMBLK_TX_PAGED_DATA:
|
||||
/*
|
||||
* Read a page of data if required.
|
||||
*/
|
||||
if(0u == g_comblk_data_size)
|
||||
{
|
||||
if(g_comblk_page_handler != 0)
|
||||
{
|
||||
g_comblk_data_size = g_comblk_page_handler(&g_comblk_p_data);
|
||||
if(0u == g_comblk_data_size)
|
||||
{
|
||||
COMBLK->INT_ENABLE &= ~TXTOKAY_MASK;
|
||||
g_comblk_state = COMBLK_WAIT_RESPONSE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
ASSERT(0);
|
||||
abort_current_cmd();
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Transmit the page data or move to COMBLK_WAIT_RESPONSE state if
|
||||
* no further page data could be obtained by the call to the page
|
||||
* handler above.
|
||||
*/
|
||||
if(0u == g_comblk_data_size)
|
||||
{
|
||||
COMBLK->INT_ENABLE &= ~TXTOKAY_MASK;
|
||||
g_comblk_state = COMBLK_WAIT_RESPONSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
uint32_t size_sent;
|
||||
size_sent = fill_tx_fifo(g_comblk_p_data, g_comblk_data_size);
|
||||
g_comblk_data_size = g_comblk_data_size - size_sent;
|
||||
g_comblk_p_data = &g_comblk_p_data[size_sent];
|
||||
}
|
||||
break;
|
||||
|
||||
/*----------------------------------------------------------------------
|
||||
* The TX_OKAY interrupt should NOT be enabled for states COMBLK_IDLE,
|
||||
* COMBLK_WAIT_RESPONSE and COMBLK_RX_RESPONSE.
|
||||
*/
|
||||
case COMBLK_IDLE:
|
||||
/* Fall through */
|
||||
case COMBLK_WAIT_RESPONSE:
|
||||
/* Fall through */
|
||||
case COMBLK_RX_RESPONSE:
|
||||
/* Fall through */
|
||||
default:
|
||||
COMBLK->INT_ENABLE &= ~TXTOKAY_MASK;
|
||||
complete_request(0u);
|
||||
g_comblk_state = COMBLK_IDLE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
static void handle_rx_okay_irq(void)
|
||||
{
|
||||
uint16_t data16;
|
||||
uint16_t is_command;
|
||||
uint8_t data8;
|
||||
|
||||
data16 = (uint16_t)COMBLK->DATA8;
|
||||
is_command = data16 & DATA8_COMMAND_MASK;
|
||||
data8 = (uint8_t)data16;
|
||||
|
||||
switch(g_comblk_state)
|
||||
{
|
||||
/*----------------------------------------------------------------------
|
||||
* MSS_COMBLK_init() enables the RCV_OKAY interrupt for the COMBLK_IDLE
|
||||
* state to receive the asynchronous power-on-reset from the system
|
||||
* controller.
|
||||
*/
|
||||
case COMBLK_IDLE:
|
||||
if(is_command)
|
||||
{
|
||||
if(data8 != POR_DIGEST_ERROR_OPCODE)
|
||||
{
|
||||
uint8_t rxed_opcode;
|
||||
rxed_opcode = data8;
|
||||
process_sys_ctrl_command(rxed_opcode);
|
||||
}
|
||||
else
|
||||
{
|
||||
g_comblk_response_idx = 0;
|
||||
g_comblk_p_response[g_comblk_response_idx] = data8;
|
||||
g_comblk_response_idx++;
|
||||
g_comblk_p_response[g_comblk_response_idx] = 0x00u;
|
||||
g_comblk_state = COMBLK_RX_RESPONSE;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/*----------------------------------------------------------------------
|
||||
* The RCV_OKAY interrupt should only be enabled for states
|
||||
* COMBLK_WAIT_RESPONSE and COMBLK_RX_RESPONSE.
|
||||
*/
|
||||
case COMBLK_WAIT_RESPONSE:
|
||||
if(is_command)
|
||||
{
|
||||
uint8_t rxed_opcode;
|
||||
rxed_opcode = data8;
|
||||
if(rxed_opcode == g_comblk_cmd_opcode)
|
||||
{
|
||||
g_comblk_response_idx = 0u;
|
||||
g_comblk_p_response[g_comblk_response_idx] = rxed_opcode;
|
||||
++g_comblk_response_idx;
|
||||
g_comblk_state = COMBLK_RX_RESPONSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
process_sys_ctrl_command(rxed_opcode);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case COMBLK_RX_RESPONSE:
|
||||
if(is_command)
|
||||
{
|
||||
uint8_t rxed_opcode;
|
||||
rxed_opcode = data8;
|
||||
process_sys_ctrl_command(rxed_opcode);
|
||||
}
|
||||
else
|
||||
{
|
||||
if( g_comblk_p_response[g_comblk_response_idx-1] == POR_DIGEST_ERROR_OPCODE)
|
||||
{
|
||||
g_comblk_p_response[g_comblk_response_idx] = data8;
|
||||
process_sys_ctrl_command(g_comblk_p_response[g_comblk_response_idx-1]);
|
||||
g_comblk_state = COMBLK_IDLE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if(g_comblk_response_idx < g_comblk_response_size)
|
||||
{
|
||||
uint8_t rxed_data;
|
||||
|
||||
rxed_data = data8;
|
||||
g_comblk_p_response[g_comblk_response_idx] = rxed_data;
|
||||
++g_comblk_response_idx;
|
||||
}
|
||||
|
||||
if(g_comblk_response_idx == g_comblk_response_size)
|
||||
{
|
||||
complete_request(g_comblk_response_idx);
|
||||
g_comblk_state = COMBLK_IDLE;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
/*----------------------------------------------------------------------
|
||||
* The RCV_OKAY interrupt should NOT be enabled for states
|
||||
* COMBLK_IDLE, COMBLK_TX_CMD and COMBLK_TX_DATA.
|
||||
*/
|
||||
case COMBLK_TX_PAGED_DATA:
|
||||
/* This is needed because when there is an error, we need to terminate loading the data */
|
||||
if(!is_command)
|
||||
{
|
||||
g_comblk_p_response[1] = data8;
|
||||
complete_request(2u);
|
||||
g_comblk_state = COMBLK_IDLE;
|
||||
}
|
||||
else
|
||||
{
|
||||
uint8_t rxed_opcode;
|
||||
rxed_opcode = data8;
|
||||
process_sys_ctrl_command(rxed_opcode);
|
||||
}
|
||||
break;
|
||||
|
||||
case COMBLK_TX_CMD:
|
||||
/* Fall through */
|
||||
case COMBLK_TX_DATA:
|
||||
/* Fall through */
|
||||
if(is_command)
|
||||
{
|
||||
uint8_t rxed_opcode;
|
||||
rxed_opcode = data8;
|
||||
process_sys_ctrl_command(rxed_opcode);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
complete_request(0u);
|
||||
g_comblk_state = COMBLK_IDLE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
static void complete_request
|
||||
(
|
||||
uint16_t response_length
|
||||
)
|
||||
{
|
||||
if(g_comblk_completion_handler != 0)
|
||||
{
|
||||
g_comblk_completion_handler(g_comblk_p_response, response_length);
|
||||
g_comblk_completion_handler = 0;
|
||||
g_request_in_progress = 0u;
|
||||
}
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
static void abort_current_cmd(void)
|
||||
{
|
||||
if(g_request_in_progress)
|
||||
{
|
||||
uint32_t flush_in_progress;
|
||||
|
||||
/*
|
||||
* Call completion handler just in case we are in a multi threaded system
|
||||
* to avoid a task lockup.
|
||||
*/
|
||||
complete_request(g_comblk_response_idx);
|
||||
|
||||
/*
|
||||
* Flush the FIFOs
|
||||
*/
|
||||
COMBLK->CONTROL |= CR_FLUSHOUT_MASK;
|
||||
do {
|
||||
flush_in_progress = COMBLK->CONTROL & CR_FLUSHOUT_MASK;
|
||||
} while(flush_in_progress);
|
||||
}
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
static void send_cmd_opcode
|
||||
(
|
||||
uint8_t opcode
|
||||
)
|
||||
{
|
||||
uint32_t tx_okay;
|
||||
|
||||
/* Set transmit FIFO to transfer bytes. */
|
||||
COMBLK->CONTROL &= ~CR_SIZETX_MASK;
|
||||
|
||||
/* Wait for space to become available in Tx FIFO. */
|
||||
do {
|
||||
tx_okay = COMBLK->STATUS & TXTOKAY_MASK;
|
||||
} while(0u == tx_okay);
|
||||
|
||||
/* Send command opcode. */
|
||||
COMBLK->FRAME_START8 = opcode;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
static uint32_t fill_tx_fifo
|
||||
(
|
||||
const uint8_t * p_cmd,
|
||||
uint32_t cmd_size
|
||||
)
|
||||
{
|
||||
volatile uint32_t tx_okay;
|
||||
uint32_t size_sent;
|
||||
|
||||
/* Set transmit FIFO to transfer bytes. */
|
||||
COMBLK->CONTROL &= ~CR_SIZETX_MASK;
|
||||
|
||||
size_sent = 0u;
|
||||
tx_okay = COMBLK->STATUS & TXTOKAY_MASK;
|
||||
while((tx_okay != 0u) && (size_sent < cmd_size))
|
||||
{
|
||||
COMBLK->DATA8 = p_cmd[size_sent];
|
||||
++size_sent;
|
||||
tx_okay = COMBLK->STATUS & TXTOKAY_MASK;
|
||||
}
|
||||
|
||||
return size_sent;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
static void process_sys_ctrl_command(uint8_t cmd_opcode)
|
||||
{
|
||||
if(g_async_event_handler != 0)
|
||||
{
|
||||
g_async_event_handler(cmd_opcode);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,90 +0,0 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2012-2016 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 COMBLK access functions.
|
||||
*
|
||||
* SVN $Revision: 8345 $
|
||||
* SVN $Date: 2016-03-23 11:53:04 +0530 (Wed, 23 Mar 2016) $
|
||||
*/
|
||||
#ifndef __MSS_COMBLK_H_
|
||||
#define __MSS_COMBLK_H_ 1
|
||||
|
||||
#include "../../CMSIS/m2sxxx.h"
|
||||
#include "mss_comblk_page_handler.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
typedef void(*comblk_completion_handler_t)(uint8_t * p_response, uint16_t response_size);
|
||||
|
||||
typedef void (*comblk_async_event_handler_t)(uint8_t event_opcode);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_init
|
||||
(
|
||||
comblk_async_event_handler_t async_event_handler,
|
||||
uint8_t* p_response
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_send_cmd_with_ptr
|
||||
(
|
||||
uint8_t cmd_opcode,
|
||||
uint32_t cmd_params_ptr,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_completion_handler_t completion_handler
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_send_cmd
|
||||
(
|
||||
const uint8_t * p_cmd,
|
||||
uint16_t cmd_size,
|
||||
const uint8_t * p_data,
|
||||
uint32_t data_size,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_completion_handler_t completion_handler
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_read
|
||||
(
|
||||
const uint8_t * p_data,
|
||||
uint16_t cmd_size,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_completion_handler_t completion_handler
|
||||
);
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
*
|
||||
*/
|
||||
void MSS_COMBLK_send_paged_cmd
|
||||
(
|
||||
const uint8_t * p_cmd,
|
||||
uint16_t cmd_size,
|
||||
uint8_t * p_response,
|
||||
uint16_t response_size,
|
||||
comblk_page_handler_t page_read_handler,
|
||||
comblk_completion_handler_t completion_handler
|
||||
);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MSS_COMBLK_H_ */
|
||||
|
|
@ -1,66 +0,0 @@
|
|||
/*******************************************************************************
|
||||
* (c) Copyright 2012-2016 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* SmartFusion2 MSS COM block driver, page handler callback function prototype.
|
||||
*
|
||||
* SVN $Revision: 8345 $
|
||||
* SVN $Date: 2016-03-23 11:53:04 +0530 (Wed, 23 Mar 2016) $
|
||||
*/
|
||||
|
||||
#ifndef __MSS_COMBLK_PAGE_HANDLER_H_
|
||||
#define __MSS_COMBLK_PAGE_HANDLER_H_ 1
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-------------------------------------------------------------------------*//**
|
||||
The comblk_page_handler_t typedef specifies the function prototype of a COMBLK
|
||||
page handler callback function. This callback is used by the system services
|
||||
and COMBLK drivers as part of in-system programming (ISP) to retrieve the next
|
||||
page of programming information to send to the SmartFusion2 System Controller
|
||||
via the COMBLK.
|
||||
The COMBLK page handler must be implemented by the application layer to return
|
||||
the address of the next page of programming data to be sent to the
|
||||
SmartFusion2 system controller. It must return the number of bytes contained
|
||||
in the next page. Returning a value of zero indicates that all programming
|
||||
data has been passed to the system services/COMBLK drivers.
|
||||
|
||||
@code
|
||||
#define PAGE_LENGTH 512
|
||||
|
||||
uint8_t programming_data[PROG_DATA_LENGTH];
|
||||
uint32_t prog_data_index = 0;
|
||||
|
||||
uint32_t page_read_handler
|
||||
(
|
||||
uint8_t const ** pp_next_page
|
||||
)
|
||||
{
|
||||
uint32_t returned_page_length;
|
||||
uint32_t remaining_length;
|
||||
|
||||
*pp_next_page = &programming_data[prog_data_index];
|
||||
remaining_length = PROG_DATA_LENGTH - prog_data_index
|
||||
if(remaining_length > PAGE_LENGTH)
|
||||
{
|
||||
returned_page_length = PAGE_LENGTH;
|
||||
}
|
||||
else
|
||||
{
|
||||
returned_page_length = remaining_length;
|
||||
prog_data_index = PROG_DATA_LENGTH;
|
||||
}
|
||||
|
||||
return returned_page_length;
|
||||
}
|
||||
|
||||
@endcode
|
||||
*/
|
||||
typedef uint32_t (*comblk_page_handler_t)(uint8_t const ** pp_next_page);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MSS_COMBLK_PAGE_HANDLER_H_ */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,16 +0,0 @@
|
|||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x00000000 0x00040000 { ; load region size_region
|
||||
ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00010000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
File diff suppressed because one or more lines are too long
File diff suppressed because it is too large
Load Diff
|
|
@ -48,14 +48,14 @@
|
|||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>..\OBJ\</OutputDirectory>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>project</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>..\OBJ\</ListingPath>
|
||||
<ListingPath>.\obj\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
|
|
@ -83,7 +83,7 @@
|
|||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin -o "$L@L.bin" "#L"</UserProg1Name>
|
||||
<UserProg2Name>..\BAT\del_hex_line1.bat</UserProg2Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
|
|
@ -327,8 +327,8 @@
|
|||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>0</v6Lang>
|
||||
<v6LangP>0</v6LangP>
|
||||
<v6Lang>3</v6Lang>
|
||||
<v6LangP>3</v6LangP>
|
||||
<vShortEn>0</vShortEn>
|
||||
<vShortWch>0</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
|
|
@ -338,7 +338,7 @@
|
|||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\user;..\CMSIS;..\CMSIS\startup_arm;..\hal;..\hal\CortexM3;..\hal\CortexM3\Keil;..\libraries\mss_gpio;..\libraries\sys_config;..\libraries\mss_uart;..\..\..\include;..\..\..\include\libc;..\..\..\components\finsh</IncludePath>
|
||||
<IncludePath>..\smartfusion2;.\board;.\drivers;.\CMSIS;.\CMSIS\startup_arm;.\libraries\mss_gpio;.\libraries\mss_uart;.\libraries\sys_config;..\..\include;..\..\include\libc;..\..\components\finsh;..\..\components\drivers\include;..\..\components\drivers\include\drivers;..\..\components\drivers\include\ipc</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
|
|
@ -369,7 +369,7 @@
|
|||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<ScatterFile>..\OBJ\project.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
|
|
@ -380,27 +380,22 @@
|
|||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>user</GroupName>
|
||||
<GroupName>Applications</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>config.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\config.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>config.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>.\config.h</FilePath>
|
||||
<FilePath>.\applicatons\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\board.c</FilePath>
|
||||
<FilePath>.\board\board.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>config.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\board\config.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>rtconfig.h</FileName>
|
||||
|
|
@ -415,242 +410,297 @@
|
|||
<File>
|
||||
<FileName>mss_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\libraries\mss_gpio\mss_gpio.c</FilePath>
|
||||
<FilePath>.\libraries\mss_gpio\mss_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mss_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\libraries\mss_uart\mss_uart.c</FilePath>
|
||||
<FilePath>.\libraries\mss_uart\mss_uart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>sys_config.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\libraries\sys_config\sys_config.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>hal</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cortex_nvic.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\HAL\CortexM3\cortex_nvic.c</FilePath>
|
||||
<FilePath>.\libraries\sys_config\sys_config.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>hw_reg_access.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\HAL\CortexM3\Keil\hw_reg_access.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>hal.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\HAL\CortexM3\Keil\hal.s</FilePath>
|
||||
<FileName>sys_config_mss_clocks.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>.\libraries\sys_config\sys_config_mss_clocks.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>CMSIS</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>core_cm3.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\CMSIS\core_cm3.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>system_m2sxxx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CMSIS\system_m2sxxx.c</FilePath>
|
||||
<FilePath>.\CMSIS\system_m2sxxx.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup_m2sxxx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\CMSIS\startup_arm\startup_m2sxxx.s</FilePath>
|
||||
<FilePath>.\CMSIS\startup_arm\startup_m2sxxx.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>core_cm3.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CMSIS\core_cm3.c</FilePath>
|
||||
<FileName>hw_reg_access.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\CMSIS\hal\hw_reg_access.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>RT-Thread/Kernel</GroupName>
|
||||
<GroupName>Kernel</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>clock.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\clock.c</FilePath>
|
||||
<FilePath>..\..\src\clock.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>components.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\components.c</FilePath>
|
||||
<FilePath>..\..\src\components.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>cpu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\cpu.c</FilePath>
|
||||
<FilePath>..\..\src\cpu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>device.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\device.c</FilePath>
|
||||
<FilePath>..\..\src\device.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>idle.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\idle.c</FilePath>
|
||||
<FilePath>..\..\src\idle.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>ipc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\ipc.c</FilePath>
|
||||
<FilePath>..\..\src\ipc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>irq.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\irq.c</FilePath>
|
||||
<FilePath>..\..\src\irq.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>kservice.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\kservice.c</FilePath>
|
||||
<FilePath>..\..\src\kservice.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\mem.c</FilePath>
|
||||
<FilePath>..\..\src\mem.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>memheap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\memheap.c</FilePath>
|
||||
<FilePath>..\..\src\memheap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mempool.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\mempool.c</FilePath>
|
||||
<FilePath>..\..\src\mempool.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>object.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\object.c</FilePath>
|
||||
<FilePath>..\..\src\object.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>scheduler.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\scheduler.c</FilePath>
|
||||
<FilePath>..\..\src\scheduler.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>signal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\signal.c</FilePath>
|
||||
<FilePath>..\..\src\signal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>slab.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\slab.c</FilePath>
|
||||
<FilePath>..\..\src\slab.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>thread.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\thread.c</FilePath>
|
||||
<FilePath>..\..\src\thread.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>timer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\src\timer.c</FilePath>
|
||||
<FilePath>..\..\src\timer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>RT-Thread/Libcpu</GroupName>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cpuport.c</FileName>
|
||||
<FileName>drv_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
|
||||
<FilePath>.\drivers\drv_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>context_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
|
||||
<FileName>drv_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\drivers\drv_uart.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>RT-Thread/Finsh</GroupName>
|
||||
<GroupName>DeviceDrivers</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>pin.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\misc\pin.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>completion.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\completion.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>dataqueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>pipe.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\pipe.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>ringblk_buf.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>ringbuffer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>waitqueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>workqueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>serial.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\serial\serial.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>finish</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmd.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\cmd.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_compiler.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_compiler.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_error.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_error.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_error.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_heap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_heap.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_init.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_init.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_init.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_node.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_node.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_node.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_ops.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_ops.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_parser.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_parser.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_token.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_token.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_token.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_var.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_var.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_var.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_vm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\finsh_vm.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\msh.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh_file.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\msh_file.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\msh_file.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>shell.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\shell.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>symbol.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\components\finsh\symbol.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\symbol.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cpuport.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>context_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/* RT-Thread config file */
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
|
||||
#define RT_THREAD_PRIORITY_MAX 8
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_NAME_MAX 8
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_SERIAL
|
||||
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART0
|
||||
#define BSP_USING_UART1
|
||||
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 512
|
||||
#define RT_DEBUG_INIT 0
|
||||
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
#define RT_USING_HEAP
|
||||
#define RT_USING_SMALL_MEM
|
||||
|
||||
#define RT_USING_FINSH
|
||||
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
#define __FINSH_THREAD_PRIORITY 5
|
||||
#define FINSH_THREAD_PRIORITY (RT_THREAD_PRIORITY_MAX / 8 * __FINSH_THREAD_PRIORITY + 1)
|
||||
#define FINSH_THREAD_STACK_SIZE 1024
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1 +0,0 @@
|
|||
|
||||
|
|
@ -1,59 +0,0 @@
|
|||
#include "config.h"
|
||||
|
||||
mss_uart_instance_t * const gp_my_uart0 = &g_mss_uart0;
|
||||
|
||||
/* gpio and uart0 initialization */
|
||||
void boardInit(void)
|
||||
{
|
||||
/* mss gpio init */
|
||||
MSS_GPIO_init();
|
||||
MSS_GPIO_config(MSS_GPIO_0, MSS_GPIO_OUTPUT_MODE);
|
||||
MSS_GPIO_config(MSS_GPIO_1, MSS_GPIO_OUTPUT_MODE);
|
||||
|
||||
/* mss uart0 init: 115200, 8, no, 1 */
|
||||
MSS_UART_init(gp_my_uart0, MSS_UART_115200_BAUD,
|
||||
MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT);
|
||||
}
|
||||
INIT_BOARD_EXPORT(boardInit);
|
||||
|
||||
/* mss uart0 transmit one byte data */
|
||||
void MSS_UART_polled_tx_byte(mss_uart_instance_t *this_uart, const uint8_t byte)
|
||||
{
|
||||
uint32_t tx_ready;
|
||||
do {
|
||||
tx_ready = gp_my_uart0->hw_reg->LSR & 0x20u;
|
||||
} while(!tx_ready);
|
||||
gp_my_uart0->hw_reg->THR = byte;
|
||||
}
|
||||
|
||||
/* docking finish component */
|
||||
void rt_hw_console_output(const char *str)
|
||||
{
|
||||
while(*str != '\0')
|
||||
{
|
||||
if(*str == '\n')
|
||||
MSS_UART_polled_tx_byte(gp_my_uart0, '\r');
|
||||
MSS_UART_polled_tx_byte(gp_my_uart0, *str++);
|
||||
while(!MSS_UART_tx_complete(&g_mss_uart0));
|
||||
}
|
||||
}
|
||||
|
||||
/* docking finish component */
|
||||
char rt_hw_console_getchar(void)
|
||||
{
|
||||
char dat;
|
||||
uint8_t rx_size;
|
||||
do {
|
||||
rx_size = MSS_UART_get_rx(gp_my_uart0, (uint8_t *)&dat, 1);
|
||||
} while(0u == rx_size);
|
||||
return dat;
|
||||
}
|
||||
|
||||
/* custom finish command */
|
||||
extern uint32_t SystemCoreClock;
|
||||
void sayHello(void)
|
||||
{
|
||||
rt_kprintf("Hello RT-Thread! By SmartFusion2 M2S010\r\n");
|
||||
rt_kprintf("MSS System Core Clock: %d\r\n", SystemCoreClock);
|
||||
}
|
||||
MSH_CMD_EXPORT(sayHello, "say hello to console");
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
#ifndef __INIT_H__
|
||||
#define __INIT_H__
|
||||
|
||||
#include "mss_gpio.h"
|
||||
#include "mss_uart.h"
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
void boardInit(void);
|
||||
void MSS_UART_polled_tx_byte(mss_uart_instance_t *this_uart, const uint8_t byte);
|
||||
void rt_hw_console_output(const char *str);
|
||||
char rt_hw_console_getchar(void);
|
||||
void sayHello(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -1,25 +0,0 @@
|
|||
#include "config.h"
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#define LED0_PIN MSS_GPIO_0
|
||||
#define LED1_PIN MSS_GPIO_1
|
||||
|
||||
int main(void)
|
||||
{
|
||||
int count = 0;
|
||||
|
||||
while(count++)
|
||||
{
|
||||
MSS_GPIO_set_output(LED0_PIN, 1);
|
||||
MSS_GPIO_set_output(LED1_PIN, 1);
|
||||
rt_thread_mdelay(500);
|
||||
|
||||
MSS_GPIO_set_output(LED0_PIN, 0);
|
||||
MSS_GPIO_set_output(LED1_PIN, 0);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
File diff suppressed because one or more lines are too long
|
|
@ -1,160 +0,0 @@
|
|||
/* RT-Thread config file */
|
||||
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
|
||||
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||
//#include "RTE_Components.h"
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#if defined(RTE_USING_FINSH)
|
||||
#define RT_USING_FINSH
|
||||
#endif //RTE_USING_FINSH
|
||||
|
||||
#endif //(__CC_ARM) || (__CLANG_ARM)
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
// <h>Basic Configuration
|
||||
// <o>Maximal level of thread priority <8-256>
|
||||
// <i>Default: 32
|
||||
#define RT_THREAD_PRIORITY_MAX 8
|
||||
// <o>OS tick per second
|
||||
// <i>Default: 1000 (1ms)
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
// <o>Alignment size for CPU architecture data access
|
||||
// <i>Default: 4
|
||||
#define RT_ALIGN_SIZE 4
|
||||
// <o>the max length of object name<2-16>
|
||||
// <i>Default: 8
|
||||
#define RT_NAME_MAX 8
|
||||
// <c1>Using RT-Thread components initialization
|
||||
// <i>Using RT-Thread components initialization
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
// </c>
|
||||
|
||||
#define RT_USING_USER_MAIN
|
||||
//#define RT_USING_DEVICE
|
||||
//#define RT_USING_PIN
|
||||
//#define RT_USING_SERIAL
|
||||
//#define RT_CONSOLE_DEVICE_NAME "uart0"
|
||||
//#define RT_CONSOLEBUF_SIZE 128
|
||||
|
||||
// <o>the stack size of main thread<1-4086>
|
||||
// <i>Default: 512
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 512
|
||||
|
||||
// </h>
|
||||
|
||||
// <h>Debug Configuration
|
||||
// <c1>enable kernel debug configuration
|
||||
// <i>Default: enable kernel debug configuration
|
||||
//#define RT_DEBUG
|
||||
// </c>
|
||||
// <o>enable components initialization debug configuration<0-1>
|
||||
// <i>Default: 0
|
||||
#define RT_DEBUG_INIT 0
|
||||
// <c1>thread stack over flow detect
|
||||
// <i> Diable Thread stack over flow detect
|
||||
//#define RT_USING_OVERFLOW_CHECK
|
||||
// </c>
|
||||
// </h>
|
||||
|
||||
// <h>Hook Configuration
|
||||
// <c1>using hook
|
||||
// <i>using hook
|
||||
//#define RT_USING_HOOK
|
||||
// </c>
|
||||
// <c1>using idle hook
|
||||
// <i>using idle hook
|
||||
//#define RT_USING_IDLE_HOOK
|
||||
// </c>
|
||||
// </h>
|
||||
|
||||
// <e>Software timers Configuration
|
||||
// <i> Enables user timers
|
||||
#define RT_USING_TIMER_SOFT 0
|
||||
#if RT_USING_TIMER_SOFT == 0
|
||||
#undef RT_USING_TIMER_SOFT
|
||||
#endif
|
||||
// <o>The priority level of timer thread <0-31>
|
||||
// <i>Default: 4
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
// <o>The stack size of timer thread <0-8192>
|
||||
// <i>Default: 512
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
// </e>
|
||||
|
||||
// <h>IPC(Inter-process communication) Configuration
|
||||
// <c1>Using Semaphore
|
||||
// <i>Using Semaphore
|
||||
#define RT_USING_SEMAPHORE
|
||||
// </c>
|
||||
// <c1>Using Mutex
|
||||
// <i>Using Mutex
|
||||
#define RT_USING_MUTEX
|
||||
// </c>
|
||||
// <c1>Using Event
|
||||
// <i>Using Event
|
||||
#define RT_USING_EVENT
|
||||
// </c>
|
||||
// <c1>Using MailBox
|
||||
// <i>Using MailBox
|
||||
#define RT_USING_MAILBOX
|
||||
// </c>
|
||||
// <c1>Using Message Queue
|
||||
// <i>Using Message Queue
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
// </c>
|
||||
// </h>
|
||||
|
||||
// <h>Memory Management Configuration
|
||||
// <c1>Dynamic Heap Management
|
||||
// <i>Dynamic Heap Management
|
||||
#define RT_USING_HEAP
|
||||
// </c>
|
||||
// <c1>using small memory
|
||||
// <i>using small memory
|
||||
#define RT_USING_SMALL_MEM
|
||||
// </c>
|
||||
// <c1>using tiny size of memory
|
||||
// <i>using tiny size of memory
|
||||
//#define RT_USING_TINY_SIZE
|
||||
// </c>
|
||||
// </h>
|
||||
|
||||
// <h>Console Configuration
|
||||
// <c1>Using console
|
||||
// <i>Using console
|
||||
#define RT_USING_CONSOLE
|
||||
// </c>
|
||||
// <o>the buffer size of console <1-1024>
|
||||
// <i>the buffer size of console
|
||||
// <i>Default: 128 (128Byte)
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
// </h>
|
||||
|
||||
#if defined(RT_USING_FINSH)
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
// <h>Finsh Configuration
|
||||
// <o>the priority of finsh thread <1-7>
|
||||
// <i>the priority of finsh thread
|
||||
// <i>Default: 6
|
||||
#define __FINSH_THREAD_PRIORITY 5
|
||||
#define FINSH_THREAD_PRIORITY (RT_THREAD_PRIORITY_MAX / 8 * __FINSH_THREAD_PRIORITY + 1)
|
||||
// <o>the stack of finsh thread <1-4096>
|
||||
// <i>the stack of finsh thread
|
||||
// <i>Default: 4096 (4096Byte)
|
||||
#define FINSH_THREAD_STACK_SIZE 1024
|
||||
// <o>the history lines of finsh thread <1-32>
|
||||
// <i>the history lines of finsh thread
|
||||
// <i>Default: 5
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
|
||||
#define FINSH_USING_SYMTAB
|
||||
// </h>
|
||||
#endif
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue