From 16f6157b1e850ac9cba384e8b23fae07014c65db Mon Sep 17 00:00:00 2001 From: xiaoguang_ma Date: Fri, 25 Nov 2022 18:04:35 +0900 Subject: [PATCH] [bsp] faster startup for cortex-a If the application defines dozens of global variables, the speed of clearing the bss segment will be slower. Because icache can be enabled before the mmu enabled. Therefore, in order to speed up the process of clearing the BSS segment, enable icache needs to be put ahead. --- libcpu/arm/cortex-a/start_gcc.S | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/libcpu/arm/cortex-a/start_gcc.S b/libcpu/arm/cortex-a/start_gcc.S index f73b678f7e..5916ddf957 100644 --- a/libcpu/arm/cortex-a/start_gcc.S +++ b/libcpu/arm/cortex-a/start_gcc.S @@ -122,6 +122,13 @@ secondary_loop: b secondary_loop normal_setup: + + /* enable I cache + branch prediction */ + mrc p15, 0, r0, c1, c0, 0 + orr r0, r0, #(1<<12) + orr r0, r0, #(1<<11) + mcr p15, 0, r0, c1, c0, 0 + /* setup stack */ bl stack_setup @@ -142,10 +149,6 @@ bss_loop: mcr p15, 0, r1, c1, c0, 1 //enable smp #endif - /* enable branch prediction */ - mrc p15, 0, r0, c1, c0, 0 - orr r0, r0, #(1<<11) - mcr p15, 0, r0, c1, c0, 0 /* initialize the mmu table and enable mmu */ ldr r0, =platform_mem_desc