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Merge pull request #3891 from thread-liu/stm32mp157a-dk1 

[update] stm32mp1-dk1 bsp drivers
This commit is contained in:
Bernard Xiong 2020-09-08 12:08:15 +08:00 committed by GitHub
parent 8247336afd abab8b0365
commit 16c7ba0b77
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
44 changed files with 7479 additions and 6591 deletions
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19
bsp/stm32/libraries/HAL_Drivers/drv_gpio.c
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@ -8,6 +8,7 @@
* 2018-11-06 balanceTWK first version
* 2019-04-23 WillianChan Fix GPIO serial number disorder
* 2020-06-16 thread-liu add STM32MP1
* 2020-09-01 thread-liu add GPIOZ
*/
#include <board.h>
@ -204,6 +205,24 @@ static const struct pin_index pins[] =
__STM32_PIN(173, K, 13),
__STM32_PIN(174, K, 14),
__STM32_PIN(175, K, 15),
#if defined(GPIOZ)
__STM32_PIN(176, Z, 0),
__STM32_PIN(177, Z, 1),
__STM32_PIN(178, Z, 2),
__STM32_PIN(179, Z, 3),
__STM32_PIN(180, Z, 4),
__STM32_PIN(181, Z, 5),
__STM32_PIN(182, Z, 6),
__STM32_PIN(183, Z, 7),
__STM32_PIN(184, Z, 8),
__STM32_PIN(185, Z, 9),
__STM32_PIN(186, Z, 10),
__STM32_PIN(187, Z, 11),
__STM32_PIN(188, Z, 12),
__STM32_PIN(189, Z, 13),
__STM32_PIN(190, Z, 14),
__STM32_PIN(191, Z, 15),
#endif /* defined(GPIOZ) */
#endif /* defined(GPIOK) */
#endif /* defined(GPIOJ) */
#endif /* defined(GPIOI) */

3
bsp/stm32/libraries/HAL_Drivers/drv_gpio.h
View File

@ -7,6 +7,7 @@
* Date Author Notes
* 2018-11-06 balanceTWK first version
* 2020-06-16 thread-liu add stm32mp1
* 2020-09-01 thread-liu add GPIOZ
*/
#ifndef __DRV_GPIO_H__
@ -18,7 +19,7 @@
#define __STM32_PORT(port) GPIO##port##_BASE
#if defined(SOC_SERIES_STM32MP1)
#define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x1000UL) )) + PIN)
#define GET_PIN(PORTx,PIN) (GPIO##PORTx == GPIOZ) ? (176 + PIN) : ((rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x1000UL) )) + PIN))
#else
#define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN)
#endif

3
bsp/stm32/libraries/STM32MPxx_HAL/SConscript
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@ -80,9 +80,6 @@ if GetDepend(['RT_USING_AUDIO']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sai.c']
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_sai_ex.c']
if GetDepend(['RT_USING_MTD_NAND']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_nand.c']
if GetDepend(['BSP_USING_FMC']):
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_fmc.c']
src += ['STM32MP1xx_HAL_Driver/Src/stm32mp1xx_ll_fsmc.c']

1
bsp/stm32/libraries/STM32MPxx_HAL/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal.h
View File

@ -28,6 +28,7 @@
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal_conf.h"
#include <stddef.h>
/** @addtogroup STM32MP1xx_HAL_Driver
* @{

10
bsp/stm32/stm32mp157a-st-discovery/.config
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@ -151,9 +151,9 @@ CONFIG_RT_USING_PIN=y
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set
# CONFIG_RT_LIBC_USING_TIME is not set
#
# Network
@ -422,6 +422,10 @@ CONFIG_SOC_STM32MP157A=y
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_STLINK_TO_USART=y
# CONFIG_BSP_USING_EXTI is not set
# CONFIG_BSP_USING_PMIC is not set
# CONFIG_BSP_USING_PWR is not set
# CONFIG_BSP_USING_RCC is not set
#
# On-chip Peripheral Drivers
@ -439,7 +443,7 @@ CONFIG_BSP_USING_UART4=y
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_DAC is not set
# CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_CRC is not set
# CONFIG_BSP_USING_RNG is not set

210
bsp/stm32/stm32mp157a-st-discovery/.cproject Normal file
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32
bsp/stm32/stm32mp157a-st-discovery/.project
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@ -1,11 +1,29 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>STM32MP157</name>
<comment></comment>
<projects>
<name>STM32MP157AACx</name>
<comment />
<projects>
</projects>
<buildSpec>
</buildSpec>
<natures>
</natures>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.rt-thread.studio.rttnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<linkedResources>
</linkedResources>
</projectDescription>

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bsp/stm32/stm32mp157a-st-discovery/.settings/.rtmenus Normal file
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56
bsp/stm32/stm32mp157a-st-discovery/.settings/ev2.DAPLink.Debug.rttlaunch Normal file
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@ -0,0 +1,56 @@
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83
bsp/stm32/stm32mp157a-st-discovery/.settings/ev2.JLink.Debug.rttlaunch Normal file
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53
bsp/stm32/stm32mp157a-st-discovery/.settings/ev2.STLink.Debug.rttlaunch Normal file
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@ -0,0 +1,53 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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14
bsp/stm32/stm32mp157a-st-discovery/.settings/language.settings.xml Normal file
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@ -0,0 +1,14 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project>
<configuration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094" name="Debug">
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-795390470799380927" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
</extension>
</configuration>
</project>

3
bsp/stm32/stm32mp157a-st-discovery/.settings/org.eclipse.core.runtime.prefs Normal file
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@ -0,0 +1,3 @@
content-types/enabled=true
content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
eclipse.preferences.version=1

9
bsp/stm32/stm32mp157a-st-discovery/.settings/projcfg.ini Normal file
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@ -0,0 +1,9 @@
#RT-Thread Studio Project Configuration
#Tue Sep 01 16:41:17 CST 2020
output_project_path=D\:/3_work/GitRepositories/rt-thread/bsp/stm32
mcu_name=STM32MP157A
hardware_adapter=J-Link
mcu_base_nano_proj=true
selected_rtt_version=latest
project_base_bsp=true
cfg_version=v2.0

82
bsp/stm32/stm32mp157a-st-discovery/.settings/stm32mp1.JLink.Debug.rttlaunch Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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51
bsp/stm32/stm32mp157a-st-discovery/.settings/stm32mp1.STLink.Debug.rttlaunch Normal file
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@ -0,0 +1,51 @@
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<listEntry value="4"/>
</listAttribute>
<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="GBK"/>
</launchConfiguration>

9
bsp/stm32/stm32mp157a-st-discovery/EventRecorderStub.scvd Normal file
View File

@ -0,0 +1,9 @@
<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

103
bsp/stm32/stm32mp157a-st-discovery/README.md
View File

@ -2,7 +2,7 @@
[中文页](README_zh.md) |
# Introduction
## Introduction
This document records the execution instruction of the BSP (board support package) provided by the RT-Thread development team for the STM32MP157A-DK1 development board.
@ -20,16 +20,16 @@ By reading the Quickly Get Started section developers can quickly get their hand
The STM32MP157A-DK1 is a development board based on a dual Cortex-A7 and Cortex-M4 core. The Cortex-A7 core operates at 800 MHZ and the Cortex-M4 operates at 209MHZ. There is no Flash inside the STM32MP157A.
​ ![board](figures/board.png)
![board](figures/board.png)
The mainly-used **on-board resources** are shown as follows:
* MCU : STM32MP157AACx
* Common peripherals:
- 4 LEDs: LD4(PA14), LD6(PA13), LD7(PH7), LD8(PD11)
- 4 Buttons: WAKE_UP, RESET (NRST), USER1(PA14), USER2 (PA13)
* Common-used interface: USB, SD card, Ethernet, MIPI, USB HOST, Audio, HDMI, Arduino.
* Debug interface: Standard JTAG/SWD.
- MCU : STM32MP157AACx
- Common peripherals:
- 4 LEDs: LD4(PA14), LD6(PA13), LD7(PH7), LD8(PD11)
- 4 Buttons: WAKE_UP, RESET (NRST), USER1(PA14), USER2 (PA13)
- Common-used interface: USB, SD card, Ethernet, MIPI, USB HOST, Audio, HDMI, Arduino.
- Debug interface: Standard JTAG/SWD.
For more details about this board, please refer to the ST official documentation: [STM32MP157A-DK1 Development board introduction](https://www.st.com/content/st_com/zh/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-discovery-kits/stm32mp157a-dk1.html)
@ -40,11 +40,13 @@ Each peripheral supporting condition for this BSP is as follows:
| On-board Peripheral | **Support** | **Remark** |
| :----------------------------- | :---------: | :-----------------: |
| USB TO UART | YES | |
| PWR | YES | |
| RCC | YES | |
| SD Card (SDMMC) | NO | |
| ETH | NO | |
| AUDIO | NO | |
| **On-chip Peripheral Drivers** | **Support** | **Remark** |
| GPIO | YES | |
| GPIO | YES | GPIOA-GPIOK, GPIOZ |
| UART | YES | UART4 (ST-Link) |
| EXTI | YES | |
| SPI | YES | |
@ -57,7 +59,7 @@ Each peripheral supporting condition for this BSP is as follows:
## Execution Instruction
### Quickly Get Started
### Quickly Get Started
This BSP provides IAR projects for developers. Here's an example of the IAR development environment, to introduce how to run the system.
@ -73,95 +75,34 @@ Double-click the project.eww file, to open the IAR project, compile and download
#### Running Results
After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, the blue LD8 will flash periodically, and the terminal will periodically output"Hello RT-Thread!"
After the program is successfully downloaded, the system runs automatically. Observe the running results of the LED on the development board, the blue LD8 will flash periodically.
Connect the serial port of the board to PC, communicate with it via a serial terminal tool (115200-8-1-N). Restart the board and the startup information of RT-Thread will be observed:
```bash
```c
\ | /
- RT - Thread Operating System
/ | \ 3.1.1 build Nov 19 2018
2006 - 2018 Copyright by rt-thread team
msh > Hello RT-Thread!
msh >
```
#### Drivers
##### 1. WWDG
* Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
* Enter the `menuconfig` command, enter the Hardware Drivers Config and open WWDG, save and exit;
* Enter the `scons --target=iar` command to regenerate project;
* The WWDG device will trigger an interrupt before feeding the dog, and LD5 will blink during the interruption;
* Enter the `wwdg_sample` in the terminal to obtain the Finsh command of the WWDG device;
* `wwdg_sample run` command can turn on the WWDG device；
* `wwdg_sample set` command can set the WWDG device separation frequency；
* By adjusting the separation frequency of the WWDG, LD5 will have different flickering frequencies.
##### 2. DAC
* Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
* Enter the `menuconfig` command, enter the Hardware Drivers config and open DAC, save and exit;
* Enter the `scons --target=iar` command to regenerate project.
###### Finsh
Before you use a device, you need to find out if the device exists, and you can use the name of the DAC device that is enrolled with the command `dac probe` . As shown as follows.
```
msh />dac probe dac1
probe dac1 success
```
Enable the channel of the device can use the command `dac enable` followed by the channel number.
```shell
msh />dac probe dac1
probe dac1 success
```
Set up the data of the channel for a DAC device can use the command `dac write` followed by the channel number.
```
msh />dac write 1 1000
dac1 channel 1 write value is 1000
```
Disable the channel of the device can use the command `dac disable` followed by the channel number.
```c
msh />dac disable 1
dac1 channel 1 disable success
```
3. LPTIM
* Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
* Enter the `menuconfig` command, enter the Hardware Drivers config and open LPTIM, save and exit;
* Enter the `scons --target=iar` command to regenerate project;
* The LPTIM device timing overflow will trigger an interrupt, which will print the string "hello rt-thread!";
* Enter the `lptim_sample` on the terminal to obtain the Finsh command of the LPTIM device;
* `lptim_sample run` command can turn on the LPTIM device;
* `lptim_sample set` command can set the LPTIM separation frequency.
### Advanced Features
This BSP only enables GPIO and serial port 4 by default. If need more advanced features, you need to configure the BSP with RT-Thread Env tools, as follows:
* Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
* Enter the `menuconfig` command to configure the project, then save and exit;
* Enter the `pkgs --update` command to update the packages;
* Enter the `scons --target=iar `command to regenerate the project.
- Open the [Env](https://www.rt-thread.io/download.html?download=Env) tool under this BSP;
- Enter the `menuconfig` command to configure the project, then save and exit;
- Enter the `pkgs --update` command to update the packages;
- Enter the `scons --target=iar` command to regenerate the project.
## Notes
* Before downloading the program, set the board to the mode of "Engineering Mode". The BOOT switch sets to BOOT0=0 and BOOT2=1, as shown below:
- Before downloading the program, set the board to the mode of "Engineering Mode". The BOOT switch sets to BOOT0=0 and BOOT2=1, as shown below:
​ <img src="figures\boot_switch.png" alt="boot_switch" style="zoom:50%;" />
* If need to reburn the program, please reset the development board.
![boot](figures/boot_switch.png)
- If need to reburn the program, please reset the development board.
## Contact Information

1
bsp/stm32/stm32mp157a-st-discovery/applications/main.c
View File

@ -27,7 +27,6 @@ int main(void)
rt_thread_mdelay(500);
rt_pin_write(LED8_PIN, PIN_LOW);
rt_thread_mdelay(500);
rt_kprintf("Hello RT-Thread!\n");
}
return RT_EOK;

19
bsp/stm32/stm32mp157a-st-discovery/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
View File

@ -22,8 +22,6 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
#include "stpmic.h"
#include "rtconfig.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@ -75,18 +73,9 @@ void HAL_MspInit(void)
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
if(IS_ENGINEERING_BOOT_MODE())
{
#if defined(BSP_USING_ADC) || defined(BSP_USING_DAC)
/* Configure PMIC */
BSP_PMIC_Init();
BSP_PMIC_InitRegulators();
__HAL_RCC_VREF_CLK_ENABLE();
HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE);
HAL_SYSCFG_EnableVREFBUF();
#endif
}
HAL_NVIC_SetPriority(RCC_WAKEUP_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(RCC_WAKEUP_IRQn);
__HAL_RCC_ENABLE_IT(RCC_IT_WKUP);
/* USER CODE END MspInit 1 */
}
@ -295,7 +284,7 @@ void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* hlptim)
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
PeriphClkInit.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_PCLK1;
PeriphClkInit.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSE;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();

76
bsp/stm32/stm32mp157a-st-discovery/board/Kconfig
View File

@ -15,6 +15,23 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_UART4
default y
config BSP_USING_EXTI
bool "Enable exti sample"
default n
config BSP_USING_PMIC
bool "Enable PMIC"
select BSP_USING_I2C
select BSP_USING_I2C3
default y
config BSP_USING_PWR
bool "Enable PM (power control)"
default n
config BSP_USING_RCC
bool "Enable rcc use sample"
default n
endmenu
menu "On-chip Peripheral Drivers"
@ -113,6 +130,7 @@ menu "On-chip Peripheral Drivers"
if BSP_USING_ADC
config BSP_USING_ADC2
bool "Enable ADC2"
select BSP_USING_PMIC
default n
endif
@ -126,23 +144,55 @@ menu "On-chip Peripheral Drivers"
default n
endif
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
menuconfig BSP_USING_I2C
bool "Enable I2C BUS (software simulation)"
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
default n
if BSP_USING_I2C1
comment "Notice: PD7 --> 55; PG15 --> 111"
config BSP_I2C1_SCL_PIN
int "I2C1 scl pin number"
range 1 176
default 55
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 1 176
default 111
if BSP_USING_I2C
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
default n
if BSP_USING_I2C1
comment "Notice: PD7 --> 55; PG15 --> 111"
config BSP_I2C1_SCL_PIN
int "I2C1 scl pin number"
range 1 176
default 55
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 1 176
default 111
endif
menuconfig BSP_USING_I2C2
bool "Enable I2C2 BUS (software simulation)"
default n
if BSP_USING_I2C2
comment "Notice: PH4 --> 116; PH5 --> 117"
config BSP_I2C2_SCL_PIN
int "i2c2 scl pin number"
range 1 176
default 116
config BSP_I2C2_SDA_PIN
int "I2C2 sda pin number"
range 1 176
default 117
endif
menuconfig BSP_USING_I2C3
bool "Enable I2C3 BUS (software simulation)"
default n
if BSP_USING_I2C3
comment "Notice: PZ4 --> 180; PZ5 --> 181"
config BSP_I2C3_SCL_PIN
int "i2c3 scl pin number"
range 1 191
default 180
config BSP_I2C3_SDA_PIN
int "I2C3 sda pin number"
range 1 191
default 181
endif
endif
menuconfig BSP_USING_SPI

19
bsp/stm32/stm32mp157a-st-discovery/board/SConscript
View File

@ -13,13 +13,14 @@ CubeMX_Config/Common/System/system_stm32mp1xx.c
CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
''')
if GetDepend(['BSP_USING_ADC']):
src += Glob('ports/drv_hard_i2c.c')
src += Glob('ports/stpmic.c')
if GetDepend(['BSP_USING_RCC']):
src += Glob('ports/drv_rcc.c')
if GetDepend(['BSP_USING_DAC']):
src += Glob('ports/drv_hard_i2c.c')
src += Glob('ports/stpmic.c')
if GetDepend(['BSP_USING_EXTI']):
src += Glob('ports/drv_exti.c')
if GetDepend(['BSP_USING_PWR']):
src += Glob('ports/drv_pwr.c')
if GetDepend(['BSP_USING_WWDG']):
src += Glob('ports/drv_wwdg.c')
@ -27,6 +28,12 @@ if GetDepend(['BSP_USING_WWDG']):
if GetDepend(['BSP_USING_LPTIM']):
src += Glob('ports/drv_lptim.c')
if GetDepend(['BSP_USING_TIM14']):
src += Glob('ports/timer_sample.c')
if GetDepend(['BSP_USING_PMIC']):
src += Glob('ports/drv_pmic.c')
path = [cwd]
path += [cwd + '/CubeMX_Config/CM4/Inc']
path += [cwd + '/ports']

36
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_exti.c Normal file
View File

@ -0,0 +1,36 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-27 thread-liu first version
*/
#include "board.h"
#ifdef BSP_USING_EXTI
//#define DRV_DEBUG
#define LOG_TAG "drv.exti"
#include <drv_log.h>
/* defined the KEY2 pin: */
#define KEY2_PIN GET_PIN(A, 13)
void key2_on(void *args)
{
rt_kprintf("press key2!\n");
}
static int exti_sample(void)
{
rt_pin_mode(KEY2_PIN, PIN_MODE_INPUT_PULLUP);
rt_pin_attach_irq(KEY2_PIN, PIN_IRQ_MODE_FALLING, key2_on, RT_NULL);
rt_pin_irq_enable(KEY2_PIN, PIN_IRQ_ENABLE);
return RT_EOK;
}
INIT_DEVICE_EXPORT(exti_sample);
#endif

124
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_hard_i2c.c
View File

@ -1,124 +0,0 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#include <board.h>
#include "drv_hard_i2c.h"
//#define DRV_DEBUG
#define LOG_TAG "drv.hardi2c"
#include <drv_log.h>
I2C_HandleTypeDef hI2c4;
int32_t BSP_I2C4_Init(void)
{
int32_t status = RT_EOK;
if (HAL_I2C_GetState(&hI2c4) == HAL_I2C_STATE_RESET)
{
if (MX_I2C4_Init(&hI2c4) != HAL_OK)
{
status = -RT_EBUSY;
}
/* Init the I2C Msp */
if (HAL_I2C_Init(&hI2c4) != HAL_OK)
{
LOG_D("I2C4 Init Error!\n");
status = -RT_EBUSY;
}
}
return status;
}
int32_t BSP_I2C4_DeInit(void)
{
int32_t status = RT_EOK;
HAL_I2C_MspDeInit(&hI2c4);
/* Init the I2C */
if (HAL_I2C_DeInit(&hI2c4) != HAL_OK)
{
status = -RT_EEMPTY;
}
return status;
}
HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c)
{
hI2c4.Instance = I2C4;
hI2c->Init.Timing = I2C4_TIMING;
hI2c->Init.OwnAddress1 = STPMU1_I2C_ADDRESS;
hI2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hI2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hI2c->Init.OwnAddress2 = 0;
hI2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hI2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hI2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
return HAL_I2C_Init(hI2c);
}
int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
}
int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
}
int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
}
int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
}
int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials)
{
int32_t status = RT_EOK;
if(HAL_I2C_IsDeviceReady(&hI2c4, DevAddr, Trials, 1000) != HAL_OK)
{
status = -RT_EBUSY;
}
return status;
}
static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
int32_t status = -RT_EIO;
if(HAL_I2C_Mem_Write(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
{
status = RT_EOK;
}
return status;
}
static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
int32_t status = -RT_EIO;
if (HAL_I2C_Mem_Read(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
{
status = RT_EOK;
}
return status;
}

48
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_hard_i2c.h
View File

@ -1,48 +0,0 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#ifndef __DRV_HARD_I2C_H__
#define __DRV_HARD_I2C_H__
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal.h"
#ifdef __cplusplus
extern "C" {
#endif
#define STPMU1_I2C_ADDRESS ((0x33 & 0x7F) << 1)
#ifndef I2C_SPEED
#define I2C_SPEED ((uint32_t)100000)
#endif /* I2C_SPEED */
#ifndef I2C4_TIMING
#define I2C4_TIMING ((uint32_t)0x10805E89)
#endif
static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_Init(void);
int32_t BSP_I2C4_DeInit(void);
int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials);
HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c);
#ifdef __cplusplus
}
#endif
#endif

80
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_lptim.c
View File

@ -19,6 +19,7 @@
#define LOG_TAG "drv.lptimer"
#include <drv_log.h>
#define LED7_PIN GET_PIN(H, 7)
LPTIM_HandleTypeDef hlptim1;
void LPTIM1_IRQHandler(void)
@ -36,7 +37,7 @@ void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
{
if(hlptim->Instance == LPTIM1)
{
rt_kprintf("hello rt-thread!\n");
HAL_GPIO_TogglePin(GPIOH, GPIO_PIN_7);
}
}
@ -52,14 +53,37 @@ static int lptim_control(uint8_t pre_value)
return RT_EOK;
}
/**
* This function initialize the lptim
*/
static int lptim_init(void)
static int lptim_start(void)
{
/* ### Start counting in interrupt mode ############################# */
if (HAL_LPTIM_Counter_Start_IT(&hlptim1, 32767) != HAL_OK)
{
LOG_D("lptim1 start Counting Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
static int lptim_stop()
{
if (HAL_LPTIM_Counter_Stop_IT(&hlptim1) != HAL_OK)
{
LOG_D("lptim1 stop Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
int lptim_init(void)
{
rt_pin_mode(LED7_PIN, PIN_MODE_OUTPUT);
hlptim1.Instance = LPTIM1;
hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV8;
hlptim1.Init.UltraLowPowerClock.Polarity = LPTIM_CLOCKPOLARITY_RISING;
hlptim1.Init.UltraLowPowerClock.SampleTime = LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION;
hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
@ -73,55 +97,51 @@ static int lptim_init(void)
LOG_D("LPTIM Init Error!\n");
return -RT_ERROR;
}
/* ### Start counting in interrupt mode ############################# */
if (HAL_LPTIM_Counter_Start_IT(&hlptim1, 5000) != HAL_OK)
{
LOG_D("LPTIM Start Counting Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
static int lptim_deinit()
{
if (HAL_LPTIM_DeInit(&hlptim1) != HAL_OK)
{
LOG_D("LPTIM Deinit Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
INIT_DEVICE_EXPORT(lptim_init);
static int lptim_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!strcmp(argv[1], "run"))
if (!strcmp(argv[1], "start"))
{
lptim_init();
lptim_start();
return RT_EOK;
}
else if (!strcmp(argv[1], "stop"))
{
lptim_deinit();
lptim_stop();
return RT_EOK;
}
else if (!strcmp(argv[1], "set"))
{
if (argc > 2)
{
lptim_control(atoi(argv[2]));
return RT_EOK;
}
else
{
goto _exit;
}
}
else
{
goto _exit;
}
}
else
_exit:
{
rt_kprintf("Usage:\n");
rt_kprintf("lptim_sample run - open lptim, shell will printf 'hello rt-thread'\n");
rt_kprintf("lptim_sample set - set the lptim prescaler, lptim_sample set [0 - 7]\n");
rt_kprintf("lptim_sample start - start lptim, the LED7 will start blink\n");
rt_kprintf("lptim_sample stop - stop lptim, the LED7 will stop blink\n");
rt_kprintf("lptim_sample set - set the lptim prescaler to change LED7 blink frquency, lptim_sample set [0 - 7]\n");
}
return RT_EOK;
return -RT_ERROR;
}
MSH_CMD_EXPORT(lptim_sample, low power timer sample);

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/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#include <board.h>
#if defined(BSP_USING_PMIC)
#include <drv_pmic.h>
#include <string.h>
//#define DRV_DEBUG
#define LOG_TAG "drv.pmic"
#include <drv_log.h>
static struct rt_i2c_bus_device *pmic_dev = RT_NULL;
/* i2c read reg */
static rt_err_t read_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t len, rt_uint8_t *buf)
{
struct rt_i2c_msg msg[2] = {0, 0};
RT_ASSERT(bus != RT_NULL);
msg[0].addr = STPMU1_I2C_ADDRESS; /* Slave address */
msg[0].flags = RT_I2C_WR; /* Write flag */
msg[0].buf = &reg; /* Slave register address */
msg[0].len = 1; /* Number of bytes sent */
msg[1].addr = STPMU1_I2C_ADDRESS;
msg[1].flags = RT_I2C_RD;
msg[1].len = len;
msg[1].buf = buf;
if (rt_i2c_transfer(bus, msg, 2) == 2)
{
return RT_EOK;
}
return RT_ERROR;
}
/* i2c write reg */
static rt_err_t write_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t data)
{
rt_uint8_t buf[2];
struct rt_i2c_msg msgs;
RT_ASSERT(bus != RT_NULL);
buf[0] = reg; //cmd
buf[1] = data;
msgs.addr = STPMU1_I2C_ADDRESS;
msgs.flags = RT_I2C_WR;
msgs.buf = buf;
msgs.len = 2;
if (rt_i2c_transfer(bus, &msgs, 1) == 1)
{
return RT_EOK;
}
return RT_ERROR;
}
/* register direct access */
static rt_err_t stpmu1_read_reg(uint8_t register_id)
{
rt_err_t status = RT_EOK;
uint8_t result = 0;
status = read_reg(pmic_dev, register_id, 1, &result);
/* Check the communication status */
if(status != RT_EOK)
{
Error_Handler();
}
return result;
}
static void stpmu1_write_reg(uint8_t register_id, uint8_t value)
{
uint32_t status = RT_EOK;
uint8_t readval = 0;
status = write_reg(pmic_dev, register_id, (rt_uint8_t)value);
/* Check the communication status */
if(status != RT_EOK)
{
Error_Handler();
}
/* verify register content */
if ((register_id != WATCHDOG_CONTROL_REG) && (register_id <= 0x40))
{
readval = stpmu1_read_reg(register_id);
if (readval != value)
{
Error_Handler();
}
}
}
/** PMIC init */
static uint32_t BSP_PMIC_MspInit(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
__HAL_RCC_GPIOA_CLK_ENABLE();
GPIO_InitStruct.Pin = GPIO_PIN_0;
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = 0 ;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
HAL_NVIC_SetPriority(EXTI0_IRQn, 0x03, 0x00);
HAL_NVIC_EnableIRQ(EXTI0_IRQn);
return RT_EOK;
}
static uint32_t BSP_PMIC_MspDeInit(void)
{
__HAL_RCC_GPIOA_CLK_DISABLE();
HAL_NVIC_DisableIRQ(EXTI0_IRQn);
HAL_GPIO_DeInit(GPIOA,GPIO_PIN_0);
return RT_EOK;
}
uint16_t buck1_voltage_table[] = {
600,
625,
650,
675,
700,
725,
750,
775,
800,
825,
850,
875,
900,
925,
950,
975,
1000,
1025,
1050,
1075,
1100,
1125,
1150,
1175,
1200,
1225,
1250,
1275,
1300,
1325,
1350,
1350,// 31 1,35
};
uint16_t buck2_voltage_table[] = {
1000, // 1
1000, //
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1050, // 1,05
1050, // 1,05
1100, // 1,1
1100, // 1,1
1150, // 1,15
1150, // 1,15
1200, // 1,2
1200, // 1,2
1250, // 1,25
1250, // 1,25
1300, // 1,3
1300, // 1,3
1350, // 1,35
1350, // 1,35
1400, // 1,4
1400, // 1,4
1450, // 1,45
1450, // 1,45
1500, // 1,5
};
uint16_t buck3_voltage_table[] = {
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1000, // 1
1100, // 1,1
1100, // 1,1
1100, // 1,1
1100, // 1,1
1200, // 1,2
1200, // 1,2
1200, // 1,2
1200, // 1,2
1300, // 1,3
1300, // 1,3
1300, // 1,3
1300, // 1,3
1400, // 1,4
1400, // 1,4
1400, // 1,4
1400, // 1,4
1500, // 1,5
1600, // 1,6
1700, // 1,7
1800, // 1,8
1900, // 1,9
2000, // 2
2100, // 2,1
2200, // 2,2
2300, // 2,3
2400, // 2,4
2500, // 2,5
2600, // 2,6
2700, // 2,7
2800, // 2,8
2900, // 2,9
3000, // 3
3100, // 3,1
3200, // 3,2
3300, // 3,3
3400, // 3,4
};
uint16_t buck4_voltage_table[] = {
600,
625,
650,
675,
700,
725,
750,
775,
800,
825,
850,
875,
900,
925,
950,
975,
1000,
1025,
1050,
1075,
1100,
1125,
1150,
1175,
1200,
1225,
1250,
1275,
1300,
1300,
1350,
1350,// 31 1,35
1400,// 32 1,40
1400,// 33 1,40
1450,// 34 1,45
1450,// 35 1,45
1500,// 36 1,5
1600,// 37 1,6
1700,// 38 1,7
1800,// 39 1,8
1900,// 40 1,9
2000,// 41 2,0
2100,// 42 2,1
2200,// 43 2,2
2300,// 44 2,3
2400,// 45 2,4
2500,// 46 2,5
2600,// 47 2,6
2700,// 48 2,7
2800,// 49 2,8
2900,// 50 2,9
3000,// 51 3,0
3100,// 52 3,1
3200,// 53 3,2
3300,// 54 3,3
3400,// 55 3,4
3500,// 56 3,5
3600,// 57 3,6
3700,// 58 3,7
3800,// 59 3,8
3900,// 60 3,9
};
uint16_t ldo1_voltage_table[] = {
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1800, // 1,8
1900, // 1,9
2000, // 2
2100, // 2,1
2200, // 2,2
2300, // 2,3
2400, // 2,4
2500, // 2,5
2600, // 2,6
2700, // 2,7
2800, // 2,8
2900, // 2,9
3000, // 3
3100, // 3,1
3200, // 3,2
3300, // 3,3
};
uint16_t ldo2_voltage_table[] = {
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1800, // 1,8
1900, // 1,9
2000, // 2
2100, // 2,1
2200, // 2,2
2300, // 2,3
2400, // 2,4
2500, // 2,5
2600, // 2,6
2700, // 2,7
2800, // 2,8
2900, // 2,9
3000, // 3
3100, // 3,1
3200, // 3,2
3300, // 3,3
};
uint16_t ldo3_voltage_table[] = {
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1800, // 1,8
1900, // 1,9
2000, // 2
2100, // 2,1
2200, // 2,2
2300, // 2,3
2400, // 2,4
2500, // 2,5
2600, // 2,6
2700, // 2,7
2800, // 2,8
2900, // 2,9
3000, // 3
3100, // 3,1
3200, // 3,2
3300, // 3,3
3300, // 3,3
3300, // 3,3
3300, // 3,3
3300, // 3,3
3300, // 3,3
3300, // 3,3
0xFFFF, // VREFDDR
};
uint16_t ldo5_voltage_table[] = {
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1700, // 1,7
1800, // 1,8
1900, // 1,9
2000, // 2
2100, // 2,1
2200, // 2,2
2300, // 2,3
2400, // 2,4
2500, // 2,5
2600, // 2,6
2700, // 2,7
2800, // 2,8
2900, // 2,9
3000, // 3
3100, // 3,1
3200, // 3,2
3300, // 3,3
3400, // 3,4
3500, // 3,5
3600, // 3,6
3700, // 3,7
3800, // 3,8
3900, // 3,9
};
uint16_t ldo6_voltage_table[] = {
900, // 0,9
1000, // 1,0
1100, // 1,1
1200, // 1,2
1300, // 1,3
1400, // 1,4
1500, // 1,5
1600, // 1,6
1700, // 1,7
1800, // 1,8
1900, // 1,9
2000, // 2
2100, // 2,1
2200, // 2,2
2300, // 2,3
2400, // 2,4
2500, // 2,5
2600, // 2,6
2700, // 2,7
2800, // 2,8
2900, // 2,9
3000, // 3
3100, // 3,1
3200, // 3,2
3300, // 3,3
};
uint16_t ldo4_voltage_table[] = {
3300, // 3,3
};
uint16_t vref_ddr_voltage_table[] = {
3300, // 3,3
};
/*
Table of Regulators in PMIC SoC
*/
static regul_struct regulators_table[] = {
{
.id = STPMU1_BUCK1,
.voltage_table = buck1_voltage_table,
.voltage_table_size = ARRAY_SIZE(buck1_voltage_table),
.control_reg = BUCK1_CONTROL_REG,
.low_power_reg = BUCK1_PWRCTRL_REG,
.rank = OTP_RANK_BUCK1,
},
{
.id = STPMU1_BUCK2,
.voltage_table = buck2_voltage_table,
.voltage_table_size = ARRAY_SIZE(buck2_voltage_table),
.control_reg = BUCK2_CONTROL_REG,
.low_power_reg = BUCK2_PWRCTRL_REG,
.rank = OTP_RANK_BUCK2,
},
{
.id = STPMU1_BUCK3,
.voltage_table = buck3_voltage_table,
.voltage_table_size = ARRAY_SIZE(buck3_voltage_table),
.control_reg = BUCK3_CONTROL_REG,
.low_power_reg = BUCK3_PWRCTRL_REG,
.rank = OTP_RANK_BUCK3,
},
{
.id = STPMU1_BUCK4,
.voltage_table = buck4_voltage_table,
.voltage_table_size = ARRAY_SIZE(buck4_voltage_table),
.control_reg = BUCK4_CONTROL_REG,
.low_power_reg = BUCK4_PWRCTRL_REG,
.rank = OTP_RANK_BUCK4,
},
{
.id = STPMU1_LDO1,
.voltage_table = ldo1_voltage_table,
.voltage_table_size = ARRAY_SIZE(ldo1_voltage_table),
.control_reg = LDO1_CONTROL_REG,
.low_power_reg = LDO1_PWRCTRL_REG,
.rank = OTP_RANK_LDO1,
},
{
.id = STPMU1_LDO2,
.voltage_table = ldo2_voltage_table,
.voltage_table_size = ARRAY_SIZE(ldo2_voltage_table),
.control_reg = LDO2_CONTROL_REG,
.low_power_reg = LDO2_PWRCTRL_REG,
.rank = OTP_RANK_LDO2,
},
{
.id = STPMU1_LDO3,
.voltage_table = ldo3_voltage_table,
.voltage_table_size = ARRAY_SIZE(ldo3_voltage_table),
.control_reg = LDO3_CONTROL_REG,
.low_power_reg = LDO3_PWRCTRL_REG,
.rank = OTP_RANK_LDO3,
},
{
.id = STPMU1_LDO4,
.voltage_table = ldo4_voltage_table,
.voltage_table_size = ARRAY_SIZE(ldo4_voltage_table),
.control_reg = LDO4_CONTROL_REG,
.low_power_reg = LDO4_PWRCTRL_REG,
.rank = OTP_RANK_LDO4,
},
{
.id = STPMU1_LDO5,
.voltage_table = ldo5_voltage_table ,
.voltage_table_size = ARRAY_SIZE(ldo5_voltage_table),
.control_reg = LDO5_CONTROL_REG,
.low_power_reg = LDO5_PWRCTRL_REG,
.rank = OTP_RANK_LDO5,
},
{
.id = STPMU1_LDO6,
.voltage_table = ldo6_voltage_table ,
.voltage_table_size = ARRAY_SIZE(ldo6_voltage_table),
.control_reg = LDO6_CONTROL_REG,
.low_power_reg = LDO6_PWRCTRL_REG,
.rank = OTP_RANK_LDO6,
},
{
.id = STPMU1_VREFDDR,
.voltage_table = vref_ddr_voltage_table ,
.voltage_table_size = ARRAY_SIZE(vref_ddr_voltage_table),
.control_reg = VREF_DDR_CONTROL_REG,
.low_power_reg = VREF_DDR_PWRCTRL_REG,
.rank = OTP_RANK_VREFDDR,
},
};
#define MAX_REGUL ARRAY_SIZE(regulators_table)
static regul_struct *STPMU1_Get_Regulator_Data(PMIC_RegulId_TypeDef id)
{
uint8_t i;
for (i = 0 ; i < MAX_REGUL ; i++ )
{
if (id == regulators_table[i].id)
{
return &regulators_table[i];
}
}
/* id not found */
Error_Handler();
return NULL;
}
static uint8_t STPMU1_Voltage_Find_Index(PMIC_RegulId_TypeDef id, uint16_t milivolts)
{
regul_struct *regul = STPMU1_Get_Regulator_Data(id);
uint8_t i;
for ( i = 0 ; i < regul->voltage_table_size ; i++)
{
if ( regul->voltage_table[i] == milivolts )
{
LOG_D("idx:%d for %dmV\n\r", (int)i, (int)milivolts);
return i;
}
}
/* voltage not found */
Error_Handler();
return 0;
}
void STPMU1_Enable_Interrupt(PMIC_IRQn IRQn)
{
uint8_t irq_reg , irq_reg_value ;
if (IRQn >= IRQ_NR)
{
return ;
}
/* IRQ register is IRQ Number divided by 8 */
irq_reg = IRQn >> 3 ;
/* value to be set in IRQ register corresponds to BIT(7-N) where N is the Interrupt id modulo 8 */
irq_reg_value = 1 << ( 7 - ( IRQn%8 ) );
/* Clear previous event stored in latch */
stpmu1_write_reg(ITCLEARLATCH1_REG+irq_reg, irq_reg_value );
/* Clear relevant mask to enable interrupt */
stpmu1_write_reg(ITCLEARMASK1_REG+irq_reg, irq_reg_value );
}
void STPMU1_Disable_Interrupt(PMIC_IRQn IRQn)
{
uint8_t irq_reg , irq_reg_value ;
if (IRQn >= IRQ_NR)
{
return ;
}
/* IRQ register is IRQ Number divided by 8 */
irq_reg = IRQn >> 3 ;
/* value to be set in IRQ register corresponds to BIT(7-N) where N is the Interrupt id modulo 8 */
irq_reg_value = 1 << ( 7 - ( IRQn%8 ) );
/* Clear previous event stored in latch */
stpmu1_write_reg(ITCLEARLATCH1_REG+irq_reg, irq_reg_value );
/* Set relevant mask to disable interrupt */
stpmu1_write_reg(ITSETMASK1_REG+irq_reg, irq_reg_value );
}
void BSP_PMIC_INTn_Callback(PMIC_IRQn IRQn)
{
switch (IRQn)
{
case IT_PONKEY_F:
LOG_I("IT_PONKEY_F");
break;
case IT_PONKEY_R:
LOG_I("IT_PONKEY_R");
break;
case IT_WAKEUP_F:
LOG_I("IT_WAKEUP_F");
break;
case IT_WAKEUP_R:
LOG_I("IT_WAKEUP_R");
break;
case IT_VBUS_OTG_F:
LOG_I("IT_VBUS_OTG_F");
break;
case IT_SWOUT_F:
LOG_I("IT_SWOUT_F");
break;
case IT_TWARN_R:
LOG_I("IT_TWARN_R");
break;
case IT_TWARN_F:
LOG_I("IT_TWARN_F");
break;
default:
LOG_I("%d",IRQn);
break;
}
LOG_I(" Interrupt received\n\r");
}
void STPMU1_INTn_Callback(PMIC_IRQn IRQn)
{
BSP_PMIC_INTn_Callback(IRQn);
}
void STPMU1_IrqHandler(void)
{
uint8_t irq_reg,mask,latch_events,i;
for (irq_reg = 0 ; irq_reg < STM32_PMIC_NUM_IRQ_REGS ; irq_reg++)
{
/* Get latch events & active mask from register */
mask = stpmu1_read_reg(ITMASK1_REG+irq_reg);
latch_events = stpmu1_read_reg(ITLATCH1_REG+irq_reg) & ~mask ;
/* Go through all bits for each register */
for (i = 0 ; i < 8 ; i++ )
{
if ( latch_events & ( 1 << i ) )
{
/* Callback with parameter computes as "PMIC Interrupt" enum */
STPMU1_INTn_Callback( (PMIC_IRQn )(irq_reg*8 + (7-i)));
}
}
/* Clear events in appropriate register for the event with mask set */
stpmu1_write_reg(ITCLEARLATCH1_REG+irq_reg, latch_events );
}
}
static void STPMU1_Register_Update(uint8_t register_id, uint8_t value, uint8_t mask)
{
uint8_t initial_value ;
initial_value = stpmu1_read_reg(register_id);
/* Clear bits to update */
initial_value &= ~mask;
/* Update appropriate bits*/
initial_value |= ( value & mask );
/* Send new value on I2C Bus */
stpmu1_write_reg(register_id, initial_value);
}
static void STPMU1_Regulator_Enable(PMIC_RegulId_TypeDef id)
{
regul_struct *regul = STPMU1_Get_Regulator_Data(id);
STPMU1_Register_Update(regul->control_reg,BIT(0),BIT(0));
}
static void STPMU1_Regulator_Voltage_Set(PMIC_RegulId_TypeDef id,uint16_t milivolts)
{
uint8_t voltage_index = STPMU1_Voltage_Find_Index(id,milivolts);
regul_struct *regul = STPMU1_Get_Regulator_Data(id);
STPMU1_Register_Update(regul->control_reg, voltage_index<<2 , 0xFC );
}
void BSP_PMIC_INTn_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
STPMU1_IrqHandler();
}
static rt_err_t rt_hw_pmic_init_register(void)
{
stpmu1_write_reg(MAIN_CONTROL_REG, 0x04);
stpmu1_write_reg(VIN_CONTROL_REG, 0xc0);
stpmu1_write_reg(USB_CONTROL_REG, 0x30);
stpmu1_write_reg(MASK_RESET_BUCK_REG, 0x04);
stpmu1_write_reg(MASK_RESET_LDO_REG, 0x00);
stpmu1_write_reg(MASK_RANK_BUCK_REG, 0x00);
stpmu1_write_reg(MASK_RANK_LDO_REG, 0x00);
stpmu1_write_reg(BUCK_PULL_DOWN_REG, 0x00);
stpmu1_write_reg(LDO14_PULL_DOWN_REG, 0x00);
stpmu1_write_reg(LDO56_PULL_DOWN_REG, 0x00);
stpmu1_write_reg(BUCK_ICC_TURNOFF_REG, 0x30);
stpmu1_write_reg(LDO_ICC_TURNOFF_REG, 0x3b);
/* vddcore */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK1, 1200);
STPMU1_Regulator_Enable(STPMU1_BUCK1);
/* vddddr */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK2, 1350);
STPMU1_Regulator_Enable(STPMU1_BUCK2);
/* vdd */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK3, 3300);
STPMU1_Regulator_Enable(STPMU1_BUCK3);
/* 3v3 */
STPMU1_Regulator_Voltage_Set(STPMU1_BUCK4, 3300);
STPMU1_Regulator_Enable(STPMU1_BUCK4);
/* vdda */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO1, 2900);
STPMU1_Regulator_Enable(STPMU1_LDO1);
/* 2v8 */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO2, 2800);
STPMU1_Regulator_Enable(STPMU1_LDO2);
/* vtt_ddr lod3 mode buck2/2 */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO3, 0xFFFF);
STPMU1_Regulator_Enable(STPMU1_LDO3);
/* vdd_usb */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO4, 3300);
STPMU1_Regulator_Enable(STPMU1_LDO4);
/* vdd_sd */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO5, 2900);
STPMU1_Regulator_Enable(STPMU1_LDO5);
/* 1v8 */
STPMU1_Regulator_Voltage_Set(STPMU1_LDO6, 1800);
STPMU1_Regulator_Enable(STPMU1_LDO6);
STPMU1_Regulator_Enable(STPMU1_VREFDDR);
return RT_EOK;
}
static rt_err_t rt_hw_pmic_init(const char *bus_name)
{
PMIC_IRQn irq;
pmic_dev = rt_i2c_bus_device_find(bus_name);
if (pmic_dev == RT_NULL)
{
LOG_E("%s bus not found\n", bus_name);
return -RT_ERROR;
}
if (stpmu1_read_reg(VERSION_STATUS_REG) != PMIC_VERSION_ID)
{
return -RT_EIO;
}
STPMU1_Enable_Interrupt(IT_PONKEY_R);
STPMU1_Enable_Interrupt(IT_PONKEY_F);
/* enable all irqs */
for (irq = IT_SWOUT_R; irq < IRQ_NR; irq++)
{
STPMU1_Enable_Interrupt(irq);
}
return RT_EOK;
}
static rt_err_t rt_hw_pmic_deinit(void)
{
BSP_PMIC_MspDeInit();
return RT_EOK;
}
static int pmic_init(void)
{
rt_err_t result = RT_EOK;
if (IS_ENGINEERING_BOOT_MODE())
{
BSP_PMIC_MspInit();
result = rt_hw_pmic_init("i2c3");
if(result != RT_EOK)
{
LOG_D("stpmic init failed: %02x", result);
rt_hw_pmic_deinit();
return RT_ERROR;
}
rt_hw_pmic_init_register();
}
if(IS_ENGINEERING_BOOT_MODE())
{
__HAL_RCC_VREF_CLK_ENABLE();
HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE);
HAL_SYSCFG_EnableVREFBUF();
}
LOG_I("stpmic init success!");
return RT_EOK;
}
INIT_PREV_EXPORT(pmic_init);
#endif

370
bsp/stm32/stm32mp157a-st-discovery/board/ports/stpmic.h → bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_pmic.h
View File

@ -1,6 +1,6 @@
/**
******************************************************************************
* @file stm32mp15xx__stpmic1.h
* @file stm32mp15xx_eval_stpmic1.h
* @author MCD Application Team
* @brief stpmu driver functions used for ST internal validation
******************************************************************************
@ -25,80 +25,306 @@
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal.h"
/* Exported types ------------------------------------------------------------*/
typedef enum
{
STPMU1_BUCK1=1,
STPMU1_BUCK2,
STPMU1_BUCK3,
STPMU1_BUCK4,
STPMU1_LDO1,
STPMU1_LDO2,
STPMU1_LDO3,
STPMU1_LDO4,
STPMU1_LDO5,
STPMU1_LDO6,
STPMU1_VREFDDR,
STPMU1_BUCK1=1,
STPMU1_BUCK2,
STPMU1_BUCK3,
STPMU1_BUCK4,
STPMU1_LDO1,
STPMU1_LDO2,
STPMU1_LDO3,
STPMU1_LDO4,
STPMU1_LDO5,
STPMU1_LDO6,
STPMU1_VREFDDR,
}PMIC_RegulId_TypeDef;
/* IRQ definitions */
typedef enum {
/* Interrupt Register 1 (0x50 for latch) */
IT_SWOUT_R,
IT_SWOUT_F,
IT_VBUS_OTG_R,
IT_VBUS_OTG_F,
IT_WAKEUP_R,
IT_WAKEUP_F,
IT_PONKEY_R,
IT_PONKEY_F,
IT_SWOUT_R,
IT_SWOUT_F,
IT_VBUS_OTG_R,
IT_VBUS_OTG_F,
IT_WAKEUP_R,
IT_WAKEUP_F,
IT_PONKEY_R,
IT_PONKEY_F,
/* Interrupt Register 2 (0x51 for latch) */
IT_OVP_BOOST,
IT_OCP_BOOST,
IT_OCP_SWOUT,
IT_OCP_OTG,
IT_CURLIM_BUCK4,
IT_CURLIM_BUCK3,
IT_CURLIM_BUCK2,
IT_CURLIM_BUCK1,
IT_OVP_BOOST,
IT_OCP_BOOST,
IT_OCP_SWOUT,
IT_OCP_OTG,
IT_CURLIM_BUCK4,
IT_CURLIM_BUCK3,
IT_CURLIM_BUCK2,
IT_CURLIM_BUCK1,
/* Interrupt Register 3 (0x52 for latch) */
IT_SHORT_SWOUT,
IT_SHORT_SWOTG,
IT_CURLIM_LDO6,
IT_CURLIM_LDO5,
IT_CURLIM_LDO4,
IT_CURLIM_LDO3,
IT_CURLIM_LDO2,
IT_CURLIM_LDO1,
IT_SHORT_SWOUT,
IT_SHORT_SWOTG,
IT_CURLIM_LDO6,
IT_CURLIM_LDO5,
IT_CURLIM_LDO4,
IT_CURLIM_LDO3,
IT_CURLIM_LDO2,
IT_CURLIM_LDO1,
/* Interrupt Register 3 (0x52 for latch) */
IT_SWIN_R,
IT_SWIN_F,
IT_RESERVED_1,
IT_RESERVED_2,
IT_VINLOW_R,
IT_VINLOW_F,
IT_TWARN_R,
IT_TWARN_F,
IRQ_NR,
IT_SWIN_R,
IT_SWIN_F,
IT_RESERVED_1,
IT_RESERVED_2,
IT_VINLOW_R,
IT_VINLOW_F,
IT_TWARN_R,
IT_TWARN_F,
IRQ_NR,
} PMIC_IRQn;
/**
* @}
*/
/* Private typedef -----------------------------------------------------------*/
typedef struct {
PMIC_RegulId_TypeDef id;
uint16_t *voltage_table;
uint8_t voltage_table_size;
uint8_t control_reg;
uint8_t low_power_reg;
uint8_t rank ;
uint8_t nvm_info ;
} regul_struct;
/** @defgroup STM32MP15XX_EVAL_STPMU_Exported_Constants Exported Constants
* @{
*/
/* Exported constants --------------------------------------------------------*/
/* Those define should reflect NVM_USER section
* For ES Eval Configuration this is specified as
* 0xF7,
0x92,
0xC0,
0x02,
0xFA,
0x30,
0x00,
0x33,
* */
#define NVM_SECTOR3_REGISTER_0 0xF7
#define NVM_SECTOR3_REGISTER_1 0x92
#define NVM_SECTOR3_REGISTER_2 0xC0
#define NVM_SECTOR3_REGISTER_3 0x02
#define NVM_SECTOR3_REGISTER_4 0xFA
#define NVM_SECTOR3_REGISTER_5 0x30
#define NVM_SECTOR3_REGISTER_6 0x00
#define NVM_SECTOR3_REGISTER_7 0x33
/* nvm_vinok_hyst: VINOK hysteresis voltage
00: 200mV
01: 300mV
10: 400mV
11: 500mV
*
* nvm_vinok: VINOK threshold voltage
00: 3.1v
01: 3.3v
10: 3.5v
11: 4.5v
Otp_ldo4_forced :
0: LDO4 ranks following OTP_RANK_LDO4<1:0>
if VBUS_OTG or SWOUT is turn ON condition
1: LDO4 follows normal ranking procedure
nvm_longkeypress:
0: Turn OFF on long key press inactive
1: Turn OFF on long key press active
nvm_autoturnon:
0: PMIC does not start automatically on VIN rising
1: PMIC starts automatically on VIN rising
nvm_cc_keepoff :
0: short circuit does not turn OFF PMIC
1: short circuit turn OFF PMIC and keep it OFF till CC_flag is reset
*
*/
#define OTP_VINOK_HYST ((NVM_SECTOR3_REGISTER_0 & 0xC0) >> 6) // nvm_vinok_hyst
#define OTP_VINOK ((NVM_SECTOR3_REGISTER_0 & 0x30) >> 4) // nvm_vinok
#define OTP_LDO4_FORCED ((NVM_SECTOR3_REGISTER_0 & 0x08) >> 3) // Otp_ldo4_forced
#define OTP_LONGKEYPRESSED ((NVM_SECTOR3_REGISTER_0 & 0x04) >> 2) // nvm_longkeypress
#define OTP_AUTOTURNON ((NVM_SECTOR3_REGISTER_0 & 0x02) >> 1) // nvm_autoturnon
#define OTP_CC_KEEPOFF ((NVM_SECTOR3_REGISTER_0 & 0x01)) // nvm_cc_keepoff
/*
* nvm_rank_buck4:
00: rank0
01: rank1
10: rank2
11: rank3
nvm_rank_buck3:
00: rank0
01: rank1
10: rank2
11: rank3
nvm_rank_buck2:
00: rank0
01: rank1
10: rank2
11: rank3
nvm_rank_buck1:
00: rank0
01: rank1
10: rank2
11: rank3
*
*/
#define OTP_RANK_BUCK4 ((NVM_SECTOR3_REGISTER_1 & 0xC0) >> 6) // nvm_rank_buck4
#define OTP_RANK_BUCK3 ((NVM_SECTOR3_REGISTER_1 & 0x30) >> 4) // nvm_rank_buck3
#define OTP_RANK_BUCK2 ((NVM_SECTOR3_REGISTER_1 & 0x0C) >> 2) // nvm_rank_buck2
#define OTP_RANK_BUCK1 ((NVM_SECTOR3_REGISTER_1 & 0x03)) // nvm_rank_buck1
/*
* nvm_rank_ldo4:
00: rank0
01: rank1
10: rank2
11: rank3
nvm_rank_ldo3:
00: rank0
01: rank1
10: rank2
11: rank3
nvm_rank_ldo2:
00: rank0
01: rank1
10: rank2
11: rank3
nvm_rank_ldo1:
00: rank0
01: rank1
10: rank2
11: rank3
*
*/
#define OTP_RANK_LDO4 ((NVM_SECTOR3_REGISTER_2 & 0xC0) >> 6) // nvm_rank_ldo4
#define OTP_RANK_LDO3 ((NVM_SECTOR3_REGISTER_2 & 0x30) >> 4) // nvm_rank_ldo3
#define OTP_RANK_LDO2 ((NVM_SECTOR3_REGISTER_2 & 0x0C) >> 2) // nvm_rank_ldo2
#define OTP_RANK_LDO1 ((NVM_SECTOR3_REGISTER_2 & 0x03)) // nvm_rank_ldo1
/*
* nvm_clamp_output_buck: Clamp output value to 1.3V max
0: output_buck4<5:0> not clamped
1: output_buck4<5:0> to b011100(1.3V)
nvm_bypass_mode_ldo3: LDO3 forced bypass mode
0: LDO3 not in bypass mode
1: LDO3 in bypass mode
nvm_rank_vrefddr:
00: rank0
01: rank1
10: rank2
11: rank3
nvm_rank_ldo6:
00: rank0
01: rank1
10: rank2
11: rank3
nvm_rank_ldo5:
00: rank0
01: rank1
10: rank2
11: rank3
*
*/
#define OTP_CLAMP_OUTPUT_BUCK4 ((NVM_SECTOR3_REGISTER_3 & 0x80) >> 7) // nvm_clamp_output_buck4
#define OTP_BYPASS_MODE_LDO3 ((NVM_SECTOR3_REGISTER_3 & 0x40) >> 6) // nvm_bypass_mode_ldo3
#define OTP_RANK_VREFDDR ((NVM_SECTOR3_REGISTER_3 & 0x30) >> 4) // nvm_rank_vrefddr
#define OTP_RANK_LDO6 ((NVM_SECTOR3_REGISTER_3 & 0x0C) >> 2) // nvm_rank_ldo6
#define OTP_RANK_LDO5 ((NVM_SECTOR3_REGISTER_3 & 0x03)) // nvm_rank_ldo5
/*
* nvm_output_buck4: Buck4 default output selection
00: 1.15V
01: 1.2V
10: 1.8V
11: 3.3V
nvm_output_buck3: Buck3 default output selection
00: 1.2V
01: 1.8V
10: 3.0V
11: 3.3V
nvm_output_buck2: Buck2 default output selection
00: 1.1V
01: 1.2V
10: 1.35V
11: 1.5V
nvm_output_buck1: Buck1 default output selection
00: 1.1V
01: 1.15V
10: 1.2V
11: 1.25V
*
*/
#define OTP_OUTPUT_BUCK4 ((NVM_SECTOR3_REGISTER_4 & 0xC0) >> 6) // nvm_output_buck4
#define OTP_OUTPUT_BUCK3 ((NVM_SECTOR3_REGISTER_4 & 0x30) >> 4) // nvm_output_buck3
#define OTP_OUTPUT_BUCK2 ((NVM_SECTOR3_REGISTER_4 & 0x0C) >> 2) // nvm_output_buck2
#define OTP_OUTPUT_BUCK1 ((NVM_SECTOR3_REGISTER_4 & 0x03)) // nvm_output_buck1
/*
* [7] OTP_SWOFF_BY_BOOST_OVP:
0 -> SWOUT will not turnoff bu boost OVP
1 -> SWOUT will be turnoff by BOOST OVP
[6] reserved
[5:4] nvm_output_ldo3: LDO3 default output selection
00: 1.8V
01: 2.5V
10: 3.3V
11: output_buck2<4:0>/2 (VTT termination for DDR3 x32, Analog divider implemented in Analog)
[3:2] nvm_output_ldo2: LDO2 default output selection
00: 1.8V
01: 2.5V
10: 2.9V
11: 3.3V
[1:0] nvm_output_ldo1: LDO1 default output selection
00: 1.8V
01: 2.5V
10: 2.9V
11: 3.3V
*
*/
#define OTP_SWOFF_BY_BOOST_OVP ((NVM_SECTOR3_REGISTER_5 & 0x80) >> 7) // OTP_SWOFF_BY_BOOST_OVP
#define OTP_OUTPUT_LDO3 ((NVM_SECTOR3_REGISTER_5 & 0x30) >> 4) // nvm_output_ldo3
#define OTP_OUTPUT_LDO2 ((NVM_SECTOR3_REGISTER_5 & 0x0C) >> 2) // nvm_output_ldo2
#define OTP_OUTPUT_LDO1 ((NVM_SECTOR3_REGISTER_5 & 0x03)) // nvm_output_ldo1
/*
* [7:4] reserved
*
[3:2] nvm_output_ldo6: LDO6 default output selection
00: 1.0V
01: 1.2V
10: 1.8V
11: 3.3V
[1:0] nvm_output_ldo5: LDO5 default output selection
00: 1.8V
01: 2.5V
10: 2.9V
11 : 3.3V
*
*/
#define OTP_OUTPUT_LDO6 ((NVM_SECTOR3_REGISTER_6 & 0x0C) >> 2) // nvm_output_ldo6
#define OTP_OUTPUT_LDO5 ((NVM_SECTOR3_REGISTER_6 & 0x03)) // nvm_output_ldo5
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#define BIT(_x) (1<<(_x))
#define STM32_PMIC_NUM_IRQ_REGS 4
@ -280,33 +506,7 @@ IRQ_NR,
#define PMIC_VERSION_ID 0x10
#define NVM_SECTOR3_REGISTER_7 0x33
//#define STPMU1_I2C_ADDRESS ((NVM_SECTOR3_REGISTER_7 & 0x7F) << 1 )
/**
* @}
*/
/** @defgroup STM32MP15XX_EVAL_STPMU_Exported_Functions Exported Functions
* @{
*/
/* Exported functions --------------------------------------------------------*/
uint8_t STPMU1_Register_Read(uint8_t register_id);
void STPMU1_Register_Write(uint8_t register_id, uint8_t value);
void STPMU1_Register_Update(uint8_t register_id, uint8_t value, uint8_t mask);
void STPMU1_Enable_Interrupt(PMIC_IRQn IRQn);
void STPMU1_Disable_Interrupt(PMIC_IRQn IRQn);
void STPMU1_Regulator_Enable(PMIC_RegulId_TypeDef id);
void STPMU1_Regulator_Disable(PMIC_RegulId_TypeDef id);
uint8_t STPMU1_Is_Regulator_Enabled(PMIC_RegulId_TypeDef id);
void STPMU1_Regulator_Voltage_Set(PMIC_RegulId_TypeDef id,uint16_t milivolts);
uint32_t BSP_PMIC_Init(void);
uint32_t BSP_PMIC_DeInit(void);
uint32_t BSP_PMIC_Is_Device_Ready(void);
uint32_t BSP_PMIC_InitRegulators (void);
__weak void BSP_PMIC_INTn_Callback(PMIC_IRQn IRQn);
#define STPMU1_I2C_ADDRESS (NVM_SECTOR3_REGISTER_7 & 0x7F)
#ifdef __cplusplus
}

181
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_pwr.c Normal file
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@ -0,0 +1,181 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-27 thread-liu first version
*/
#include "board.h"
//#define DRV_DEBUG
#define LOG_TAG "drv.pwr"
#include <drv_log.h>
static RCC_ClkInitTypeDef RCC_ClkInit = {0};
#define __WAIT_EVENT_TIMEOUT(__CONDITION__, __TIMEOUT_VAL__) \
do { \
__IO uint32_t count = __TIMEOUT_VAL__ * (SystemCoreClock / 20U / 1000U); \
do \
{ \
if (count-- == 0U) \
{ \
return HAL_TIMEOUT; \
} \
} \
while (__CONDITION__ == 0U); \
} while(0)
/* Back up clock tree */
static void backup_cm4_clocks(void)
{
rt_uint32_t *pFLatency = NULL;
/* Back up MCU clock configuration */
HAL_RCC_GetClockConfig(&RCC_ClkInit, pFLatency);
}
/* Restore the CM4 clock source muxer and the CM4 prescaler. */
static rt_err_t restore_cm4_clock(void)
{
/* Update SystemCoreClock variable */
SystemCoreClock = HAL_RCC_GetSystemCoreClockFreq();
/* Enable PLL3 if needed */
if (RCC_ClkInit.MCUInit.MCU_Clock == RCC_MCUSSOURCE_PLL3)
{
/* Enable PLL3 */
__HAL_RCC_PLL3_ENABLE();
/* Wait till PLL3 is ready */
__WAIT_EVENT_TIMEOUT(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY), CLOCKSWITCH_TIMEOUT_VALUE);
/* Enable PLL3 outputs */
__HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP | RCC_PLL3_DIVQ | RCC_PLL3_DIVR);
}
/* Configure MCU clock only */
__HAL_RCC_MCU_SOURCE(RCC_ClkInit.MCUInit.MCU_Clock);
/* Wait till MCU is ready */
__WAIT_EVENT_TIMEOUT(__HAL_RCC_GET_FLAG(RCC_FLAG_MCUSSRCRDY),
CLOCKSWITCH_TIMEOUT_VALUE);
/* Update SystemCoreClock variable */
SystemCoreClock = HAL_RCC_GetSystemCoreClockFreq();
/* Reconfigure Systick */
if (HAL_InitTick(uwTickPrio) != HAL_OK)
{
return RT_ERROR;
}
/* Set MCU division factor */
__HAL_RCC_MCU_DIV(RCC_ClkInit.MCUInit.MCU_Div);
/* Wait till MCUDIV is ready */
__WAIT_EVENT_TIMEOUT(__HAL_RCC_GET_FLAG(RCC_FLAG_MCUDIVRDY),
CLOCKSWITCH_TIMEOUT_VALUE);
/* Update SystemCoreClock variable */
SystemCoreClock = HAL_RCC_GetSystemCoreClockFreq();
/* Reconfigure Systick */
if (HAL_InitTick(uwTickPrio) != HAL_OK)
{
return RT_ERROR;
}
return RT_EOK;
}
void RCC_WAKEUP_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_RCC_WAKEUP_IRQHandler();
/* leave interrupt */
rt_interrupt_leave();
}
void HAL_RCC_WAKEUP_Callback()
{
if (__HAL_PWR_GET_FLAG(PWR_FLAG_STOP) == 1U)
{
__HAL_PWR_CLEAR_FLAG(PWR_FLAG_STOP);
}
restore_cm4_clock();
/* All level of ITs can interrupt */
__set_BASEPRI(0U);
rt_kprintf("system exit stop mode success!\n");
}
static void enter_stop_mode(void)
{
/*
* Only the IT with the highest priority (0 value) can interrupt.
* RCC_WAKEUP_IRQn IT is intended to have the highest priority and to be the
* only one IT having this value
* RCC_WAKEUP_IRQn is generated only when RCC is completely resumed from
* CSTOP (protection mechanism)
*/
__set_BASEPRI((1) << (8 - __NVIC_PRIO_BITS));
backup_cm4_clocks();
__HAL_PWR_CLEAR_FLAG(PWR_FLAG_STOP);
HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
}
static void pm_wackup_key_init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
__HAL_RCC_GPIOA_CLK_ENABLE();
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
HAL_NVIC_SetPriority(EXTI13_IRQn, 0x01, 0);
HAL_NVIC_EnableIRQ(EXTI13_IRQn);
}
int drv_pm_hw_init(void)
{
pm_wackup_key_init();
return RT_EOK;
}
INIT_BOARD_EXPORT(drv_pm_hw_init);
static int pwr_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!rt_strcmp(argv[1], "stop"))
{
rt_kprintf("system will enter stop mode! you can press USER2 button to exit this mode\n");
enter_stop_mode();
return RT_EOK;
}
else
{
goto _exit;
}
}
_exit:
{
rt_kprintf("Usage:\n");
rt_kprintf("pwr_sample stop - system enter stop mode\n");
}
return -RT_ERROR;
}
MSH_CMD_EXPORT(pwr_sample, enter low power mode sample);

56
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_rcc.c Normal file
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@ -0,0 +1,56 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-27 thread-liu first version
*/
#include "board.h"
//#define DRV_DEBUG
#define LOG_TAG "drv.rcc"
#include <drv_log.h>
#include <string.h>
#include <stdlib.h>
static void enable_clock(void)
{
__HAL_RCC_GPIOD_CLK_ENABLE();
}
static void disable_clock(void)
{
__HAL_RCC_GPIOD_CLK_DISABLE();
}
static int rcc_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!strcmp(argv[1], "enable"))
{
enable_clock();
return RT_EOK;
}
else if (!strcmp(argv[1], "disable"))
{
disable_clock();
return RT_EOK;
}
else
{
goto _exit;
}
}
_exit:
{
rt_kprintf("Usage:\n");
rt_kprintf("rcc_sample enable - enable GPIOD clock, the LD8 will blink '\n");
rt_kprintf("rcc_sample disable - disable GPIOD clock, the LD8 will stop blink'\n");
}
return -RT_ERROR;
}
MSH_CMD_EXPORT(rcc_sample, rcc use sample);

26
bsp/stm32/stm32mp157a-st-discovery/board/ports/drv_wwdg.c
View File

@ -21,7 +21,8 @@
#define LED5_PIN GET_PIN(A, 14)
WWDG_HandleTypeDef hwwdg1;
static rt_uint8_t feed_flag = 0;
static WWDG_HandleTypeDef hwwdg1;
void WWDG1_IRQHandler(void)
{
@ -36,14 +37,13 @@ void WWDG1_IRQHandler(void)
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg)
{
static unsigned char led_value = 0x00;
led_value = !led_value;
if(hwwdg->Instance==WWDG1)
{
HAL_WWDG_Refresh(&hwwdg1);
rt_pin_write(LED5_PIN, led_value);
if (feed_flag)
{
HAL_WWDG_Refresh(&hwwdg1);
HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_14);
}
}
}
@ -61,6 +61,8 @@ static void wwdg_init()
{
Error_Handler();
}
feed_flag = 1;
}
static void wwdg_control(uint8_t pre_value)
@ -73,6 +75,11 @@ static void wwdg_control(uint8_t pre_value)
hwwdg1.Instance->CFR |= pre_value << 11; /* set WDGTB[2:0] */
}
static void wwdg_stop(void)
{
feed_flag = 0;
}
static int wwdg_sample(int argc, char *argv[])
{
if (argc > 1)
@ -88,11 +95,16 @@ static int wwdg_sample(int argc, char *argv[])
wwdg_control(atoi(argv[2]));
}
}
else if (!strcmp(argv[1], "stop"))
{
wwdg_stop();
}
}
else
{
rt_kprintf("Usage:\n");
rt_kprintf("wwdg_sample run - open wwdg, when feed wwdg in wwdg irq, the LD5 will blink\n");
rt_kprintf("wwdg_sample stop - stop to feed wwdg, system will reset\n");
rt_kprintf("wwdg_sample set - set the wwdg prescaler, wwdg_sample set [0 - 7]\n");
}

1225
bsp/stm32/stm32mp157a-st-discovery/board/ports/stpmic.c
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129
bsp/stm32/stm32mp157a-st-discovery/board/ports/timer_sample.c Normal file
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@ -0,0 +1,129 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-27 thread-liu first version
*/
#include <board.h>
#include <rtthread.h>
#include <rtdevice.h>
#define HWTIMER_DEV_NAME "timer14"
static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size)
{
rt_kprintf("this is hwtimer timeout callback fucntion!\n");
rt_kprintf("tick is :%d !\n", rt_tick_get());
return 0;
}
static int hwtimer_stop(void)
{
rt_err_t ret = RT_EOK;
rt_device_t hw_dev = RT_NULL;
hw_dev = rt_device_find(HWTIMER_DEV_NAME);
if (hw_dev == RT_NULL)
{
rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME);
return RT_ERROR;
}
ret = rt_device_close(hw_dev);
if (ret != RT_EOK)
{
rt_kprintf("close %s device failed!\n", HWTIMER_DEV_NAME);
return ret;
}
return ret;
}
static int hwtimer_start(void)
{
rt_err_t ret = RT_EOK;
rt_hwtimerval_t timeout_s;
rt_device_t hw_dev = RT_NULL;
rt_hwtimer_mode_t mode;
hw_dev = rt_device_find(HWTIMER_DEV_NAME);
if (hw_dev == RT_NULL)
{
rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME);
return RT_ERROR;
}
/* Open the device in read/write mode */
ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR);
if (ret != RT_EOK)
{
rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME);
return ret;
}
/* Set the timeout callback function */
rt_device_set_rx_indicate(hw_dev, timeout_cb);
/* Set the mode to periodic timer */
mode = HWTIMER_MODE_PERIOD;
ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode);
if (ret != RT_EOK)
{
rt_kprintf("set mode failed! ret is :%d\n", ret);
return ret;
}
timeout_s.sec = 5;
timeout_s.usec = 0;
if (rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)) != sizeof(timeout_s))
{
rt_kprintf("set timeout value failed\n");
return RT_ERROR;
}
rt_thread_mdelay(3500);
rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s));
rt_kprintf("Read: Sec = %d, Usec = %d\n", timeout_s.sec, timeout_s.usec);
return ret;
}
static int tim_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!rt_strcmp(argv[1], "start"))
{
rt_kprintf("tim14 will start\n");
hwtimer_start();
return RT_EOK;
}
else if (!rt_strcmp(argv[1], "stop"))
{
hwtimer_stop();
rt_kprintf("stop tim14 success!\n");
return RT_EOK;
}
else
{
goto _exit;
}
}
_exit:
{
rt_kprintf("Usage:\n");
rt_kprintf("tim_sample start - start TIM14 \n");
rt_kprintf("tim_sample stop - stop TIM14 \n");
}
return RT_ERROR;
}
MSH_CMD_EXPORT(tim_sample, tim sample);

65
bsp/stm32/stm32mp157a-st-discovery/project.ewp
View File

@ -224,7 +224,6 @@
<option>
<name>CCDefines</name>
<state />
<state>RT_USING_DLIBC</state>
<state>CORE_CM4</state>
<state>NO_ATOMIC_64_SUPPORT</state>
<state>METAL_INTERNAL</state>
@ -368,7 +367,6 @@
<state>$PROJ_DIR$\applications</state>
<state>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Core\Include</state>
<state>$PROJ_DIR$\..\libraries\HAL_Drivers\config</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib</state>
<state>$PROJ_DIR$\board</state>
<state>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Include</state>
<state>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Inc</state>
@ -675,7 +673,7 @@
</option>
<option>
<name>OOCOutputFile</name>
<state>../../../rtthread.bin</state>
<state>template.bin</state>
</option>
<option>
<name>OOCCommandLineProducer</name>
@ -683,7 +681,7 @@
</option>
<option>
<name>OOCObjCopyEnable</name>
<state>1</state>
<state>0</state>
</option>
</data>
</settings>
@ -1302,7 +1300,6 @@
<option>
<name>CCDefines</name>
<state />
<state>RT_USING_DLIBC</state>
<state>CORE_CM4</state>
<state>NO_ATOMIC_64_SUPPORT</state>
<state>METAL_INTERNAL</state>
@ -1446,7 +1443,6 @@
<state>$PROJ_DIR$\applications</state>
<state>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Core\Include</state>
<state>$PROJ_DIR$\..\libraries\HAL_Drivers\config</state>
<state>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib</state>
<state>$PROJ_DIR$\board</state>
<state>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Include</state>
<state>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\STM32MP1xx_HAL_Driver\Inc</state>
@ -2182,6 +2178,18 @@
</group>
<group>
<name>DeviceDrivers</name>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\i2c\i2c_core.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\i2c\i2c_dev.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\i2c\i2c-bit-ops.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\drivers\misc\pin.c</name>
</file>
@ -2210,42 +2218,6 @@
<name>$PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c</name>
</file>
</group>
<group>
<name>dlib</name>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\libc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\rmtx.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\stdio.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c</name>
</file>
</group>
<group>
<name>Drivers</name>
<file>
@ -2257,6 +2229,9 @@
<file>
<name>$PROJ_DIR$\board\CubeMX_Config\CM4\Src\stm32mp1xx_hal_msp.c</name>
</file>
<file>
<name>$PROJ_DIR$\board\ports\timer_sample.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\libraries\STM32MPxx_HAL\CMSIS\Device\ST\STM32MP1xx\Source\Templates\iar\startup_stm32mp15xx.s</name>
</file>
@ -2266,6 +2241,9 @@
<file>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_hwtimer.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c</name>
</file>
@ -2359,9 +2337,6 @@
</group>
<group>
<name>libc</name>
<file>
<name>$PROJ_DIR$\..\..\..\components\libc\compilers\common\time.c</name>
</file>
</group>
<group>
<name>STM32_HAL</name>

2774
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167
bsp/stm32/stm32mp157a-st-discovery/project.uvopt Normal file
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@ -0,0 +1,167 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>25000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\keil\List\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<tPdscDbg>0</tPdscDbg>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>11</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U -O207 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U30000299 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
</ProjectOpt>

1136
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808
bsp/stm32/stm32mp157a-st-discovery/project.uvprojx Normal file
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@ -0,0 +1,808 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32MP157AACx:Cortex-M4</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32MP1xx_DFP.1.3.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x10020000,0x00020000) IRAM2(0x10040000,0x00020000) IROM(0x10000000,0x00020000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000)</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10020000 -FC1000)</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:STM32MP157AACx$Drivers\CMSIS\Device\ST\STM32MP1xx\Include\stm32mp157axx_cm4.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32MP157AACx$SVD\STM32MP157x.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
<OutputName>rt-thread</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\build\keil\List\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>4</RwSelD>
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7
bsp/stm32/stm32mp157a-st-discovery/rtconfig.h
View File

@ -91,7 +91,6 @@
/* POSIX layer and C standard library */
#define RT_USING_LIBC
/* Network */
@ -152,6 +151,12 @@
/* samples: kernel and components samples */
/* Privated Packages of RealThread */
/* Network Utilities */
#define SOC_FAMILY_STM32
#define SOC_SERIES_STM32MP1

4
bsp/stm32/stm32mp157a-st-discovery/template.ewp
View File

@ -649,7 +649,7 @@
</option>
<option>
<name>OOCOutputFile</name>
<state>../../../rtthread.bin</state>
<state>template.bin</state>
</option>
<option>
<name>OOCCommandLineProducer</name>
@ -657,7 +657,7 @@
</option>
<option>
<name>OOCObjCopyEnable</name>
<state>1</state>
<state>0</state>
</option>
</data>
</settings>

167
bsp/stm32/stm32mp157a-st-discovery/template.uvopt Normal file
View File

@ -0,0 +1,167 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
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<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<tPdscDbg>0</tPdscDbg>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>11</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U -O207 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U30000299 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
</ProjectOpt>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\keil\List\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>6</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 ) -FC1000 -FD10020000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U066DFF343339415043182234 -O206 -SF10000 -C0 -A2 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(6BA02477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10020000 -FC1000 -FN0</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>0</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
</DebugDescription>
</TargetOption>
</Target>
<Group>
<GroupName>Source Group 1</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
</Group>
</ProjectOpt>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32MP157AACx:Cortex-M4</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32MP1xx_DFP.1.3.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x10020000,0x00020000) IRAM2(0x10040000,0x00020000) IROM(0x10000000,0x00020000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000)</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10020000 -FC1000)</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:STM32MP157AACx$Drivers\CMSIS\Device\ST\STM32MP1xx\Include\stm32mp157axx_cm4.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32MP157AACx$SVD\STM32MP157x.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
<OutputName>rt-thread</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\build\keil\List\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>4</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10020000</StartAddress>
<Size>0x20000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x10020000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x10040000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
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<SplitLS>0</SplitLS>
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<EnumInt>0</EnumInt>
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<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
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<uC99>1</uC99>
<uGnu>1</uGnu>
<useXO>0</useXO>
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<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
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<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
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<useXO>0</useXO>
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<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
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<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Source Group 1</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>&lt;Project Info&gt;</LayName>
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<LayUrl></LayUrl>
<LayKeys></LayKeys>
<LayCat></LayCat>
<LayLic></LayLic>
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</Layer>
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</Project>