From 168e12501dbf3a9a2fc3f470942dc919cd027021 Mon Sep 17 00:00:00 2001
From: Rbb666 <64397326+Rbb666@users.noreply.github.com>
Date: Wed, 11 Jan 2023 16:22:17 +0800
Subject: [PATCH] Add RA6M3 Studio Support (#6835)
---
bsp/renesas/ra6m3-ek/.config | 22 +-
bsp/renesas/ra6m3-ek/.cproject | 220 ++++++
bsp/renesas/ra6m3-ek/.project | 28 +
.../ra6m3-ek/.settings/language.settings.xml | 14 +
bsp/renesas/ra6m3-ek/.settings/projcfg.ini | 19 +
.../ra6m3-temp.JLink.Debug.rttlaunch | 90 +++
bsp/renesas/ra6m3-ek/README.md | 4 +-
bsp/renesas/ra6m3-ek/board/Kconfig | 1 -
bsp/renesas/ra6m3-ek/buildinfo.gpdsc | 156 +++++
bsp/renesas/ra6m3-ek/project.uvoptx | 212 +++---
bsp/renesas/ra6m3-ek/project.uvprojx | 28 +-
bsp/renesas/ra6m3-ek/rtconfig.h | 4 +-
bsp/renesas/ra6m3-ek/rtconfig.py | 6 +-
bsp/renesas/ra6m3-ek/script/fsp.ld | 649 ++++++++++++++++++
bsp/renesas/ra6m3-ek/script/memory_regions.ld | 22 +
bsp/renesas/ra6m3-ek/template.uvoptx | 2 +-
bsp/renesas/ra6m3-ek/template.uvprojx | 12 +-
17 files changed, 1356 insertions(+), 133 deletions(-)
create mode 100644 bsp/renesas/ra6m3-ek/.cproject
create mode 100644 bsp/renesas/ra6m3-ek/.project
create mode 100644 bsp/renesas/ra6m3-ek/.settings/language.settings.xml
create mode 100644 bsp/renesas/ra6m3-ek/.settings/projcfg.ini
create mode 100644 bsp/renesas/ra6m3-ek/.settings/ra6m3-temp.JLink.Debug.rttlaunch
create mode 100644 bsp/renesas/ra6m3-ek/buildinfo.gpdsc
create mode 100644 bsp/renesas/ra6m3-ek/script/fsp.ld
create mode 100644 bsp/renesas/ra6m3-ek/script/memory_regions.ld
diff --git a/bsp/renesas/ra6m3-ek/.config b/bsp/renesas/ra6m3-ek/.config
index e67ca92fc5..48fa486822 100644
--- a/bsp/renesas/ra6m3-ek/.config
+++ b/bsp/renesas/ra6m3-ek/.config
@@ -8,6 +8,7 @@
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMART is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
@@ -58,6 +59,7 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
#
# Memory Management
#
+CONFIG_RT_PAGE_MAX_ORDER=11
# CONFIG_RT_USING_MEMPOOL is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
@@ -76,16 +78,19 @@ CONFIG_RT_USING_HEAP=y
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_DM is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart7"
CONFIG_RT_VER_NUM=0x50000
-CONFIG_ARCH_ARM=y
+# CONFIG_RT_USING_CACHE is not set
+# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M4=y
-# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
@@ -112,12 +117,12 @@ CONFIG_FINSH_USING_DESCRIPTION=y
CONFIG_FINSH_ARG_MAX=10
# CONFIG_RT_USING_DFS is not set
# CONFIG_RT_USING_FAL is not set
-# CONFIG_RT_USING_LWP is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_UNAMED_PIPE_NUMBER=64
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_USING_SERIAL_V1 is not set
@@ -131,10 +136,14 @@ CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_NULL is not set
+# CONFIG_RT_USING_ZERO is not set
+# CONFIG_RT_USING_RANDOM is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_FDT is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
@@ -142,10 +151,13 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_DEV_BUS is not set
# CONFIG_RT_USING_WIFI is not set
+# CONFIG_RT_USING_VIRTIO is not set
#
# Using USB
@@ -695,6 +707,8 @@ CONFIG_SOC_FAMILY_RENESAS=y
CONFIG_SOC_SERIES_R7FA6M3=y
# CONFIG_SOC_SERIES_R7FA6M4 is not set
# CONFIG_SOC_SERIES_R7FA2L1 is not set
+# CONFIG_SOC_SERIES_R7FA6M5 is not set
+# CONFIG_SOC_SERIES_R7FA4M2 is not set
#
# Hardware Drivers Config
@@ -718,6 +732,8 @@ CONFIG_BSP_USING_UART7=y
# CONFIG_BSP_UART7_TX_USING_DMA is not set
CONFIG_BSP_UART7_RX_BUFSIZE=256
CONFIG_BSP_UART7_TX_BUFSIZE=0
+# CONFIG_BSP_USING_LCD is not set
+# CONFIG_BSP_USING_LVGL is not set
#
# Board extended module Drivers
diff --git a/bsp/renesas/ra6m3-ek/.cproject b/bsp/renesas/ra6m3-ek/.cproject
new file mode 100644
index 0000000000..9e643ab073
--- /dev/null
+++ b/bsp/renesas/ra6m3-ek/.cproject
@@ -0,0 +1,220 @@
+
+
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diff --git a/bsp/renesas/ra6m3-ek/.project b/bsp/renesas/ra6m3-ek/.project
new file mode 100644
index 0000000000..dbce321609
--- /dev/null
+++ b/bsp/renesas/ra6m3-ek/.project
@@ -0,0 +1,28 @@
+
+
+ ra6m3-temp
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.rt-thread.studio.rttnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
diff --git a/bsp/renesas/ra6m3-ek/.settings/language.settings.xml b/bsp/renesas/ra6m3-ek/.settings/language.settings.xml
new file mode 100644
index 0000000000..860c3fd8bb
--- /dev/null
+++ b/bsp/renesas/ra6m3-ek/.settings/language.settings.xml
@@ -0,0 +1,14 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/bsp/renesas/ra6m3-ek/.settings/projcfg.ini b/bsp/renesas/ra6m3-ek/.settings/projcfg.ini
new file mode 100644
index 0000000000..c5a64cce53
--- /dev/null
+++ b/bsp/renesas/ra6m3-ek/.settings/projcfg.ini
@@ -0,0 +1,19 @@
+#RT-Thread Studio Project Configuration
+#Tue Jan 10 14:37:39 CST 2023
+cfg_version=v3.0
+board_name=ra6m3-ek
+example_name=
+hardware_adapter=J-Link
+board_base_nano_proj=false
+project_type=rt-thread
+chip_name=R7FA6M3AH\n
+selected_rtt_version=latest
+bsp_version=
+os_branch=master
+project_base_rtt_bsp=true
+output_project_path=E\:softwareRT-ThreadStudioworkspace\ra6m3-temp
+is_base_example_project=false
+is_use_scons_build=true
+project_name=ra6m3-temp
+os_version=latest
+bsp_path=
diff --git a/bsp/renesas/ra6m3-ek/.settings/ra6m3-temp.JLink.Debug.rttlaunch b/bsp/renesas/ra6m3-ek/.settings/ra6m3-temp.JLink.Debug.rttlaunch
new file mode 100644
index 0000000000..5cae09bdb0
--- /dev/null
+++ b/bsp/renesas/ra6m3-ek/.settings/ra6m3-temp.JLink.Debug.rttlaunch
@@ -0,0 +1,90 @@
+
+
+
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diff --git a/bsp/renesas/ra6m3-ek/README.md b/bsp/renesas/ra6m3-ek/README.md
index 639ea78608..073e0d85e6 100644
--- a/bsp/renesas/ra6m3-ek/README.md
+++ b/bsp/renesas/ra6m3-ek/README.md
@@ -125,8 +125,6 @@ void hal_entry(void)
- [开发板用户手册](https://www2.renesas.cn/cn/zh/document/mah/1527156?language=zh&r=1527191)
- [瑞萨RA MCU 基础知识](https://www2.renesas.cn/cn/zh/document/gde/1520091)
- [RA6 MCU 快速设计指南](https://www2.renesas.cn/cn/zh/document/apn/ra6-quick-design-guide)
-- [RA6M4_datasheet](https://www2.renesas.cn/cn/zh/document/dst/ra6m4-group-datasheet)
-- [RA6M4 Group User’s Manual: Hardware](https://www2.renesas.cn/cn/zh/document/man/ra6m4-group-user-s-manual-hardware)
**FSP 配置**
@@ -134,7 +132,7 @@ void hal_entry(void)
1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)，请使用 FSP 3.5.0 版本
2. 下载安装完成后，需要添加 CPK-RA6M3 开发板的官方板级支持包
-> 打开[ CPK-RA6M3 开发板详情页](https://www.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ek-ra6m3-evaluation-kit-ra6m3-mcu-group#document)，在**“下载”**列表中找到 **”CPK-RA6M3板级支持包“**，点击链接即可下载
+> 打开[ CPK-RA6M3 开发板详情页](https://www.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ek-ra6m3-evaluation-kit-ra6m3-mcu-group#document)，在 **“下载”** 列表中找到 **”CPK-RA6M3板级支持包“** ，点击链接即可下载
3. 如何将 **”CPK-RA6M3板级支持包“**添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
4. 请查看文档：[使用 FSP 配置外设驱动](../docs/RA系列使用FSP配置外设驱动.md)，在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。
diff --git a/bsp/renesas/ra6m3-ek/board/Kconfig b/bsp/renesas/ra6m3-ek/board/Kconfig
index 0a30efbc6a..42e84d7b5d 100644
--- a/bsp/renesas/ra6m3-ek/board/Kconfig
+++ b/bsp/renesas/ra6m3-ek/board/Kconfig
@@ -53,7 +53,6 @@ menu "Hardware Drivers Config"
config BSP_USING_LCD
bool "Enable LCD"
select BSP_USING_GPIO
- select BSP_USING_LCD
default n
config BSP_USING_LVGL
diff --git a/bsp/renesas/ra6m3-ek/buildinfo.gpdsc b/bsp/renesas/ra6m3-ek/buildinfo.gpdsc
new file mode 100644
index 0000000000..556486c0c9
--- /dev/null
+++ b/bsp/renesas/ra6m3-ek/buildinfo.gpdsc
@@ -0,0 +1,156 @@
+
+
+ Renesas
+ Project Content
+ Project content managed by the Renesas Smart Configurator
+
+
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diff --git a/bsp/renesas/ra6m3-ek/project.uvoptx b/bsp/renesas/ra6m3-ek/project.uvoptx
index 7dafbf2d37..7fbe1c3f8c 100644
--- a/bsp/renesas/ra6m3-ek/project.uvoptx
+++ b/bsp/renesas/ra6m3-ek/project.uvoptx
@@ -117,30 +117,10 @@
Segger\JL2CM3.dll
-
- 0
- ARMRTXEVENTFLAGS
- -L70 -Z18 -C0 -M0 -T1
-
-
- 0
- DLGTARM
- (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
-
-
- 0
- ARMDBGFLAGS
-
-
-
- 0
- DLGUARM
- d
-
0
UL2CM3
- UL2CM3(-S0 -C0 -P0 ) -FN3 -FC2000 -FD20000000 -FF0RA6M3_2M -FF1RA6M3_DATA_C2M -FF2RA6M3_CONF -FL0200000 -FL110000 -FL280 -FS00 -FS140100000 -FS2100A100 -FP0($$Device:R7FA6M3AH3CFC$Flash\RA6M3_2M.FLM) -FP1($$Device:R7FA6M3AH3CFC$Flash\RA6M3_DATA_C2M.FLM) -FP2($$Device:R7FA6M3AH3CFC$Flash\RA6M3_CONF.FLM)
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC2000 -FN3 -FF0RA6M3_2M -FS00 -FL0200000 -FF1RA6M3_DATA_C2M -FS140100000 -FL110000 -FF2RA6M3_CONF -FS2100A100 -FL280 -FP0($$Device:R7FA6M3AH$Flash\RA6M3_2M.FLM) -FP1($$Device:R7FA6M3AH$Flash\RA6M3_DATA_C2M.FLM) -FP2($$Device:R7FA6M3AH$Flash\RA6M3_CONF.FLM))
0
@@ -155,12 +135,12 @@
0
1
- 1
+ 0
0
0
0
0
- 1
+ 0
0
0
0
@@ -195,7 +175,7 @@
- Compiler
+ ADT
0
0
0
@@ -207,14 +187,34 @@
0
0
0
+ ..\..\..\components\utilities\libadt\avl.c
+ avl.c
+ 0
+ 0
+
+
+
+
+ Compiler
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
..\..\..\components\libc\compilers\armlibc\syscall_mem.c
syscall_mem.c
0
0
- 1
- 2
+ 2
+ 3
1
0
0
@@ -225,8 +225,8 @@
0
- 1
- 3
+ 2
+ 4
1
0
0
@@ -237,8 +237,8 @@
0
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+ 2
+ 5
1
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0
@@ -249,8 +249,8 @@
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- 1
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+ 6
1
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@@ -261,8 +261,8 @@
0
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1
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@@ -273,8 +273,8 @@
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+ 2
+ 8
1
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@@ -285,8 +285,8 @@
0
- 1
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+ 9
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@@ -305,8 +305,8 @@
0
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+ 3
+ 10
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@@ -317,8 +317,8 @@
0
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- 10
+ 3
+ 11
1
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0
@@ -329,8 +329,8 @@
0
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+ 3
+ 12
1
0
0
@@ -341,8 +341,8 @@
0
- 2
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+ 3
+ 13
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@@ -353,8 +353,8 @@
0
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+ 3
+ 14
1
0
0
@@ -373,8 +373,8 @@
0
0
- 3
- 14
+ 4
+ 15
1
0
0
@@ -385,8 +385,8 @@
0
- 3
- 15
+ 4
+ 16
1
0
0
@@ -397,8 +397,8 @@
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- 3
- 16
+ 4
+ 17
1
0
0
@@ -409,8 +409,8 @@
0
- 3
- 17
+ 4
+ 18
1
0
0
@@ -421,8 +421,8 @@
0
- 3
- 18
+ 4
+ 19
1
0
0
@@ -433,8 +433,8 @@
0
- 3
- 19
+ 4
+ 20
1
0
0
@@ -445,8 +445,8 @@
0
- 3
- 20
+ 4
+ 21
1
0
0
@@ -457,8 +457,8 @@
0
- 3
- 21
+ 4
+ 22
1
0
0
@@ -469,8 +469,8 @@
0
- 3
- 22
+ 4
+ 23
1
0
0
@@ -489,8 +489,8 @@
0
0
- 4
- 23
+ 5
+ 24
1
0
0
@@ -501,8 +501,8 @@
0
- 4
- 24
+ 5
+ 25
1
0
0
@@ -513,8 +513,8 @@
0
- 4
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+ 5
+ 26
1
0
0
@@ -533,8 +533,8 @@
0
0
- 5
- 26
+ 6
+ 27
1
0
0
@@ -545,8 +545,8 @@
0
- 5
- 27
+ 6
+ 28
1
0
0
@@ -557,8 +557,8 @@
0
- 5
- 28
+ 6
+ 29
1
0
0
@@ -569,8 +569,8 @@
0
- 5
- 29
+ 6
+ 30
1
0
0
@@ -589,8 +589,8 @@
0
0
- 6
- 30
+ 7
+ 31
1
0
0
@@ -601,8 +601,8 @@
0
- 6
- 31
+ 7
+ 32
1
0
0
@@ -613,8 +613,8 @@
0
- 6
- 32
+ 7
+ 33
1
0
0
@@ -625,8 +625,8 @@
0
- 6
- 33
+ 7
+ 34
1
0
0
@@ -637,8 +637,8 @@
0
- 6
- 34
+ 7
+ 35
1
0
0
@@ -649,8 +649,8 @@
0
- 6
- 35
+ 7
+ 36
1
0
0
@@ -661,8 +661,8 @@
0
- 6
- 36
+ 7
+ 37
1
0
0
@@ -673,8 +673,8 @@
0
- 6
- 37
+ 7
+ 38
1
0
0
@@ -685,8 +685,8 @@
0
- 6
- 38
+ 7
+ 39
1
0
0
@@ -697,8 +697,8 @@
0
- 6
- 39
+ 7
+ 40
1
0
0
@@ -709,8 +709,8 @@
0
- 6
- 40
+ 7
+ 41
1
0
0
@@ -721,8 +721,8 @@
0
- 6
- 41
+ 7
+ 42
1
0
0
@@ -741,8 +741,8 @@
0
0
- 7
- 42
+ 8
+ 43
1
0
0
diff --git a/bsp/renesas/ra6m3-ek/project.uvprojx b/bsp/renesas/ra6m3-ek/project.uvprojx
index c2bf8ffa11..c2e10abef5 100644
--- a/bsp/renesas/ra6m3-ek/project.uvprojx
+++ b/bsp/renesas/ra6m3-ek/project.uvprojx
@@ -14,14 +14,14 @@
1
- R7FA6M3AH3CFC
+ R7FA6M3AH
Renesas
- Renesas.RA_DFP.3.8.0
+ Renesas.RA_DFP.4.2.0
https://www2.renesas.eu/Keil_MDK_Packs/
IRAM(0x1FFE0000,0x020000) IRAM2(0x20000000,0x080000) IROM(0x00000000,0x200000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE
- UL2CM3(-S0 -C0 -P0 -FD20000000 -FC2000 -FN3 -FF0RA6M3_2M -FS00 -FL0200000 -FF1RA6M3_DATA_C2M -FS140100000 -FL110000 -FF2RA6M3_CONF -FS2100A100 -FL280 -FP0($$Device:R7FA6M3AH3CFC$Flash\RA6M3_2M.FLM) -FP1($$Device:R7FA6M3AH3CFC$Flash\RA6M3_DATA_C2M.FLM) -FP2($$Device:R7FA6M3AH3CFC$Flash\RA6M3_CONF.FLM))
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC2000 -FN3 -FF0RA6M3_2M -FS00 -FL0200000 -FF1RA6M3_DATA_C2M -FS140100000 -FL110000 -FF2RA6M3_CONF -FS2100A100 -FL280 -FP0($$Device:R7FA6M3AH$Flash\RA6M3_2M.FLM) -FP1($$Device:R7FA6M3AH$Flash\RA6M3_DATA_C2M.FLM) -FP2($$Device:R7FA6M3AH$Flash\RA6M3_CONF.FLM))
0
@@ -33,7 +33,7 @@
- $$Device:R7FA6M3AH3CFC$SVD\R7FA6M3AH.svd
+ $$Device:R7FA6M3AH$SVD\R7FA6M3AH.svd
0
0
@@ -54,7 +54,7 @@
0
1
1
- 1
+ 0
.\Listings\
1
0
@@ -129,7 +129,7 @@
- 0
+ 1
1
0
1
@@ -138,7 +138,7 @@
1
BIN\UL2CM3.DLL
- "" ()
+
@@ -339,7 +339,7 @@
-Wno-license-management -Wunused -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal
RT_USING_LIBC, RT_USING_ARMLIBC, __STDC_LIMIT_MACROS, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND
- ..\..\..\components\libc\posix\ipc;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\libc\posix\io\stdio;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\libcpu\arm\common;..\libraries\HAL_Drivers\config;..\..\..\components\drivers\include;board\ports;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\libraries\HAL_Drivers;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\compilers\common\include;.;..\..\..\include;.\board
+ ..\..\..\include;board;.;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\posix\io\stdio;..\..\..\components\finsh;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\utilities\libadt;..\..\..\libcpu\arm\common;..\..\..\components\libc\posix\ipc;..\libraries\HAL_Drivers;board\ports;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m4;..\libraries\HAL_Drivers\config;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\compilers\common\include;..\..\..\components\drivers\include
@@ -380,6 +380,16 @@
+
+ ADT
+
+
+ avl.c
+ 1
+ ..\..\..\components\utilities\libadt\avl.c
+
+
+
Compiler
@@ -796,7 +806,7 @@
-
+
diff --git a/bsp/renesas/ra6m3-ek/rtconfig.h b/bsp/renesas/ra6m3-ek/rtconfig.h
index 8c37a1290e..c12031d769 100644
--- a/bsp/renesas/ra6m3-ek/rtconfig.h
+++ b/bsp/renesas/ra6m3-ek/rtconfig.h
@@ -36,6 +36,7 @@
/* Memory Management */
+#define RT_PAGE_MAX_ORDER 11
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
@@ -47,8 +48,8 @@
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart7"
#define RT_VER_NUM 0x50000
-#define ARCH_ARM
#define RT_USING_CPU_FFS
+#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M4
@@ -75,6 +76,7 @@
/* Device Drivers */
#define RT_USING_DEVICE_IPC
+#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V2
#define RT_SERIAL_USING_DMA
diff --git a/bsp/renesas/ra6m3-ek/rtconfig.py b/bsp/renesas/ra6m3-ek/rtconfig.py
index 999ef7440b..f7024ac808 100644
--- a/bsp/renesas/ra6m3-ek/rtconfig.py
+++ b/bsp/renesas/ra6m3-ek/rtconfig.py
@@ -43,7 +43,7 @@ if PLATFORM == 'gcc':
OBJCPY = PREFIX + 'objcopy'
NM = PREFIX + 'nm'
- DEVICE = ' -mcpu=cortex-m33 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
+ DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -Dgcc'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T script/fsp.ld -L script/'
@@ -69,9 +69,9 @@ elif PLATFORM == 'armclang':
LINK = 'armlink'
TARGET_EXT = 'axf'
- DEVICE = ' --cpu Cortex-M33'
+ DEVICE = ' --cpu Cortex-M4'
- CFLAGS = ' -mcpu=Cortex-M33 -xc -std=c99 --target=arm-arm-none-eabi -mfpu=fpv5-sp-d16 -mfloat-abi=hard -c'
+ CFLAGS = ' -mcpu=Cortex-M4 -xc -std=c99 --target=arm-arm-none-eabi -mfpu=fpv5-sp-d16 -mfloat-abi=hard -c'
CFLAGS += ' -fno-rtti -funsigned-char -ffunction-sections'
CFLAGS += ' -Wno-license-management -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal'
diff --git a/bsp/renesas/ra6m3-ek/script/fsp.ld b/bsp/renesas/ra6m3-ek/script/fsp.ld
new file mode 100644
index 0000000000..e8da254219
--- /dev/null
+++ b/bsp/renesas/ra6m3-ek/script/fsp.ld
@@ -0,0 +1,649 @@
+/*
+ Linker File for Renesas FSP
+*/
+
+INCLUDE memory_regions.ld
+
+/* Uncomment and set XIP_SECONDARY_SLOT_IMAGE to 1 below for the secondary XIP application image.*/
+/*
+ XIP_SECONDARY_SLOT_IMAGE = 1;
+*/
+
+QSPI_FLASH_PRV_LENGTH = DEFINED(QSPI_FLASH_SIZE) ? ABSOLUTE(QSPI_FLASH_SIZE) : ABSOLUTE(QSPI_FLASH_LENGTH);
+OSPI_DEVICE_0_PRV_LENGTH = DEFINED(OSPI_DEVICE_0_SIZE) ? ABSOLUTE(OSPI_DEVICE_0_SIZE) : ABSOLUTE(OSPI_DEVICE_0_LENGTH);
+OSPI_DEVICE_1_PRV_LENGTH = DEFINED(OSPI_DEVICE_1_SIZE) ? ABSOLUTE(OSPI_DEVICE_1_SIZE) : ABSOLUTE(OSPI_DEVICE_1_LENGTH);
+
+/* If a flat (secure) project has DEFINED RAM_NS_BUFFER_LENGTH, then emit IDAU symbols to allocate non-secure RAM. */
+__RESERVE_NS_RAM = !DEFINED(PROJECT_NONSECURE) && DEFINED(RAM_NS_BUFFER_LENGTH) && (OPTION_SETTING_S_LENGTH != 0);
+
+RAM_NS_BUFFER_BLOCK_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? ALIGN(RAM_NS_BUFFER_LENGTH, 8192) : 0;
+RAM_NS_BUFFER_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? RAM_NS_BUFFER_LENGTH : 0;
+RAM_NS_BUFFER_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_LENGTH;
+RAM_NS_BUFFER_BLOCK_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_BLOCK_LENGTH;
+
+OPTION_SETTING_START_NS = 0x0100A180;
+
+/* This definition is used to avoid moving the counter in OPTION_SETTING regions for projects that should not configure option settings.
+ * Bootloader images do not configure option settings because they are owned by the bootloader.
+ * FSP_BOOTABLE_IMAGE is only defined in bootloader images. */
+__bl_FSP_BOOTABLE_IMAGE = 1;
+__bln_FSP_BOOTABLE_IMAGE = 1;
+PROJECT_SECURE_OR_FLAT = !DEFINED(PROJECT_NONSECURE) && OPTION_SETTING_LENGTH && !DEFINED(FSP_BOOTABLE_IMAGE);
+USE_OPTION_SETTING_NS = DEFINED(PROJECT_NONSECURE) && !DEFINED(FSP_BOOTABLE_IMAGE);
+
+__bl_FLASH_IMAGE_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+ FLASH_APPLICATION_IMAGE_NUMBER == 1 ? FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH :
+ FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_SCRATCH_LENGTH + FLASH_APPLICATION_S_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH;
+__bl_FLASH_IMAGE_LENGTH = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+ FLASH_APPLICATION_S_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH;
+__bl_FLASH_IMAGE_END = __bl_FLASH_IMAGE_START + __bl_FLASH_IMAGE_LENGTH;
+__bl_XIP_SECONDARY_FLASH_IMAGE_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+ FLASH_BOOTLOADER_LENGTH + FLASH_APPLICATION_S_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH;
+__bl_XIP_SECONDARY_FLASH_IMAGE_END = __bl_XIP_SECONDARY_FLASH_IMAGE_START + __bl_FLASH_IMAGE_LENGTH;
+__bl_FLASH_NS_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+ FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END :
+ __bl_FLASH_IMAGE_START - FLASH_BOOTLOADER_HEADER_LENGTH + FLASH_APPLICATION_S_LENGTH;
+__bl_FLASH_NSC_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+ FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END :
+ __bl_FLASH_NS_START - FLASH_APPLICATION_NSC_LENGTH;
+__bl_RAM_NS_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+ FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH :
+ RAM_START + RAM_LENGTH - RAM_APPLICATION_NS_LENGTH;
+__bl_RAM_NSC_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+ FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH :
+ __bl_RAM_NS_START - RAM_APPLICATION_NSC_LENGTH;
+__bl_FLASH_NS_IMAGE_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+ FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END :
+ __bl_FLASH_NS_START + FLASH_BOOTLOADER_HEADER_LENGTH_2;
+__bln_FLASH_IMAGE_START = __bl_FLASH_NS_IMAGE_START;
+__bln_FLASH_IMAGE_LENGTH = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+ FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END :
+ FLASH_APPLICATION_NS_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH_2;
+
+XIP_SECONDARY_SLOT_IMAGE = DEFINED(XIP_SECONDARY_SLOT_IMAGE) ? XIP_SECONDARY_SLOT_IMAGE : 0;
+FLASH_ORIGIN = !DEFINED(FLASH_IMAGE_START) ? FLASH_START :
+ XIP_SECONDARY_SLOT_IMAGE == 1 ? XIP_SECONDARY_FLASH_IMAGE_START :
+ FLASH_IMAGE_START;
+LIMITED_FLASH_LENGTH = DEFINED(FLASH_IMAGE_LENGTH) ? FLASH_IMAGE_LENGTH :
+ DEFINED(FLASH_BOOTLOADER_LENGTH) ? FLASH_BOOTLOADER_LENGTH :
+ FLASH_LENGTH;
+
+/* Define memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = FLASH_ORIGIN, LENGTH = LIMITED_FLASH_LENGTH
+ RAM (rwx) : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
+ DATA_FLASH (rx) : ORIGIN = DATA_FLASH_START, LENGTH = DATA_FLASH_LENGTH
+ QSPI_FLASH (rx) : ORIGIN = QSPI_FLASH_START, LENGTH = QSPI_FLASH_PRV_LENGTH
+ OSPI_DEVICE_0 (rx) : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH
+ OSPI_DEVICE_1 (rx) : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH
+ OSPI_DEVICE_0_RAM (rwx) : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH
+ OSPI_DEVICE_1_RAM (rwx) : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH
+ SDRAM (rwx) : ORIGIN = SDRAM_START, LENGTH = SDRAM_LENGTH
+ OPTION_SETTING (r): ORIGIN = OPTION_SETTING_START, LENGTH = OPTION_SETTING_LENGTH
+ OPTION_SETTING_S (r): ORIGIN = OPTION_SETTING_S_START, LENGTH = OPTION_SETTING_S_LENGTH
+ ID_CODE (rx) : ORIGIN = ID_CODE_START, LENGTH = ID_CODE_LENGTH
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be DEFINED in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __copy_table_start__
+ * __copy_table_end__
+ * __zero_table_start__
+ * __zero_table_end__
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __Vectors_End
+ * __Vectors_Size
+ * __qspi_flash_start__
+ * __qspi_flash_end__
+ * __qspi_flash_code_size__
+ * __qspi_region_max_size__
+ * __qspi_region_start_address__
+ * __qspi_region_end_address__
+ * __ospi_device_0_start__
+ * __ospi_device_0_end__
+ * __ospi_device_0_code_size__
+ * __ospi_device_0_region_max_size__
+ * __ospi_device_0_region_start_address__
+ * __ospi_device_0_region_end_address__
+ * __ospi_device_1_start__
+ * __ospi_device_1_end__
+ * __ospi_device_1_code_size__
+ * __ospi_device_1_region_max_size__
+ * __ospi_device_1_region_start_address__
+ * __ospi_device_1_region_end_address__
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ .text :
+ {
+ __tz_FLASH_S = ABSOLUTE(FLASH_START);
+ __ROM_Start = .;
+
+ /* Even though the vector table is not 256 entries (1KB) long, we still allocate that much
+ * space because ROM registers are at address 0x400 and there is very little space
+ * in between. */
+ KEEP(*(.fixed_vectors*))
+ KEEP(*(.application_vectors*))
+ __Vectors_End = .;
+
+ /* ROM Registers start at address 0x00000400 for devices that do not have the OPTION_SETTING region. */
+ . = OPTION_SETTING_LENGTH > 0 ? . : __ROM_Start + 0x400;
+ KEEP(*(.rom_registers*))
+
+ /* Reserving 0x100 bytes of space for ROM registers. */
+ . = OPTION_SETTING_LENGTH > 0 ? . : __ROM_Start + 0x500;
+
+ /* Allocate flash write-boundary-aligned
+ * space for sce9 wrapped public keys for mcuboot if the module is used.
+ */
+ . = ALIGN(128);
+ KEEP(*(.mcuboot_sce9_key*))
+
+ *(.text*)
+
+ KEEP(*(.version))
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* section information for finsh shell */
+ . = ALIGN(4);
+ __fsymtab_start = .;
+ KEEP(*(FSymTab))
+ __fsymtab_end = .;
+
+ . = ALIGN(4);
+ __vsymtab_start = .;
+ KEEP(*(VSymTab))
+ __vsymtab_end = .;
+
+ /* section information for initial. */
+ . = ALIGN(4);
+ __rt_init_start = .;
+ KEEP(*(SORT(.rti_fn*)))
+ __rt_init_end = .;
+
+ . = ALIGN(4);
+ KEEP(*(FalPartTable))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+ __usb_dev_descriptor_start_fs = .;
+ KEEP(*(.usb_device_desc_fs*))
+ __usb_cfg_descriptor_start_fs = .;
+ KEEP(*(.usb_config_desc_fs*))
+ __usb_interface_descriptor_start_fs = .;
+ KEEP(*(.usb_interface_desc_fs*))
+ __usb_descriptor_end_fs = .;
+ __usb_dev_descriptor_start_hs = .;
+ KEEP(*(.usb_device_desc_hs*))
+ __usb_cfg_descriptor_start_hs = .;
+ KEEP(*(.usb_config_desc_hs*))
+ __usb_interface_descriptor_start_hs = .;
+ KEEP(*(.usb_interface_desc_hs*))
+ __usb_descriptor_end_hs = .;
+
+ KEEP(*(.eh_frame*))
+
+ __ROM_End = .;
+ } > FLASH = 0xFF
+
+ __Vectors_Size = __Vectors_End - __Vectors;
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ /* To copy multiple ROM to RAM sections,
+ * uncomment .copy.table section and,
+ * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .copy.table :
+ {
+ . = ALIGN(4);
+ __copy_table_start__ = .;
+ LONG (__etext)
+ LONG (__data_start__)
+ LONG (__data_end__ - __data_start__)
+ LONG (__etext2)
+ LONG (__data2_start__)
+ LONG (__data2_end__ - __data2_start__)
+ __copy_table_end__ = .;
+ } > FLASH
+ */
+
+ /* To clear multiple BSS sections,
+ * uncomment .zero.table section and,
+ * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+ /*
+ .zero.table :
+ {
+ . = ALIGN(4);
+ __zero_table_start__ = .;
+ LONG (__bss_start__)
+ LONG (__bss_end__ - __bss_start__)
+ LONG (__bss2_start__)
+ LONG (__bss2_end__ - __bss2_start__)
+ __zero_table_end__ = .;
+ } > FLASH
+ */
+
+ __etext = .;
+
+ __tz_RAM_S = ORIGIN(RAM);
+
+ /* If DTC is used, put the DTC vector table at the start of SRAM.
+ This avoids memory holes due to 1K alignment required by it. */
+ .fsp_dtc_vector_table (NOLOAD) :
+ {
+ . = ORIGIN(RAM);
+ *(.fsp_dtc_vector_table)
+ } > RAM
+
+ /* Initialized data section. */
+ .data :
+ {
+ __data_start__ = .;
+ . = ALIGN(4);
+
+ __Code_In_RAM_Start = .;
+
+ KEEP(*(.code_in_ram*))
+ __Code_In_RAM_End = .;
+
+ *(vtable)
+ /* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
+ *(.data.*)
+ *(.data)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+
+ . = ALIGN(4);
+
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM AT > FLASH
+
+
+ /* TrustZone Secure Gateway Stubs Section. */
+
+ /* Some arithmetic is needed to eliminate unnecessary FILL for secure projects. */
+ /* 1. Get the address to the next block after the .data section in FLASH. */
+ DATA_END = LOADADDR(.data) + SIZEOF(.data);
+ /* 2. Determine the secure gateway stubs address either by the provided linker variable or the next 1024-byte block after .data */
+ SGSTUBS_LOC = (DEFINED(PROJECT_SECURE) && DEFINED(FLASH_NSC_START)) ? ABSOLUTE(FLASH_NSC_START) : ALIGN(DATA_END, 1024);
+ /* 3. Manually specify the start location for .gnu.sgstubs */
+ .gnu.sgstubs SGSTUBS_LOC : ALIGN(1024)
+ {
+ __tz_FLASH_C = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(1024);
+ _start_sg = .;
+ *(.gnu.sgstubs*)
+ . = ALIGN(32);
+ _end_sg = .;
+ } > FLASH
+
+ __tz_FLASH_N = DEFINED(FLASH_NS_START) ? ABSOLUTE(FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : FLASH_LENGTH < 32768 ? FLASH_LENGTH : ALIGN(32768);
+ FLASH_NS_IMAGE_START = DEFINED(FLASH_NS_IMAGE_START) ? FLASH_NS_IMAGE_START : __tz_FLASH_N;
+
+ /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */
+ __tz_QSPI_FLASH_S = ORIGIN(QSPI_FLASH);
+
+ /* QSPI_FLASH section to be downloaded via debugger */
+ .qspi_flash :
+ {
+ __qspi_flash_start__ = .;
+ KEEP(*(.qspi_flash*))
+ KEEP(*(.code_in_qspi*))
+ __qspi_flash_end__ = .;
+ } > QSPI_FLASH
+ __qspi_flash_code_size__ = __qspi_flash_end__ - __qspi_flash_start__;
+
+ /* QSPI_FLASH non-retentive section, creates a copy in internal flash that can be copied to QSPI */
+ __qspi_flash_code_addr__ = __etext + (__data_end__ - __data_start__);
+ .qspi_non_retentive : AT (__qspi_flash_code_addr__)
+ {
+ __qspi_non_retentive_start__ = .;
+ KEEP(*(.qspi_non_retentive*))
+ __qspi_non_retentive_end__ = .;
+ } > QSPI_FLASH
+ __qspi_non_retentive_size__ = __qspi_non_retentive_end__ - __qspi_non_retentive_start__;
+
+ __qspi_region_max_size__ = 0x4000000; /* Must be the same as defined in MEMORY above */
+ __qspi_region_start_address__ = __qspi_flash_start__;
+ __qspi_region_end_address__ = __qspi_flash_start__ + __qspi_region_max_size__;
+
+ /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */
+ __tz_QSPI_FLASH_N = __qspi_non_retentive_end__;
+
+ /* Support for OctaRAM */
+ .OSPI_DEVICE_0_NO_LOAD (NOLOAD):
+ {
+ . = ALIGN(4);
+ __ospi_device_0_start__ = .;
+ *(.ospi_device_0_no_load*)
+ . = ALIGN(4);
+ __ospi_device_0_end__ = .;
+ } > OSPI_DEVICE_0_RAM
+
+ .OSPI_DEVICE_1_NO_LOAD (NOLOAD):
+ {
+ . = ALIGN(4);
+ __ospi_device_1_start__ = .;
+ *(.ospi_device_1_no_load*)
+ . = ALIGN(4);
+ __ospi_device_1_end__ = .;
+ } > OSPI_DEVICE_1_RAM
+
+ /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */
+ __tz_OSPI_DEVICE_0_S = ORIGIN(OSPI_DEVICE_0);
+
+ /* OSPI_DEVICE_0 section to be downloaded via debugger */
+ .OSPI_DEVICE_0 :
+ {
+ __ospi_device_0_start__ = .;
+ KEEP(*(.ospi_device_0*))
+ KEEP(*(.code_in_ospi_device_0*))
+ __ospi_device_0_end__ = .;
+ } > OSPI_DEVICE_0
+ __ospi_device_0_code_size__ = __ospi_device_0_end__ - __ospi_device_0_start__;
+
+ /* OSPI_DEVICE_0 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
+ __ospi_device_0_code_addr__ = __etext + (__data_end__ - __data_start__);
+ .ospi_device_0_non_retentive : AT (__ospi_device_0_code_addr__)
+ {
+ __ospi_device_0_non_retentive_start__ = .;
+ KEEP(*(.ospi_device_0_non_retentive*))
+ __ospi_device_0_non_retentive_end__ = .;
+ } > OSPI_DEVICE_0
+ __ospi_device_0_non_retentive_size__ = __ospi_device_0_non_retentive_end__ - __ospi_device_0_non_retentive_start__;
+
+ __ospi_device_0_region_max_size__ = 0x8000000; /* Must be the same as defined in MEMORY above */
+ __ospi_device_0_region_start_address__ = __ospi_device_0_start__;
+ __ospi_device_0_region_end_address__ = __ospi_device_0_start__ + __ospi_device_0_region_max_size__;
+
+ /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */
+ __tz_OSPI_DEVICE_0_N = __ospi_device_0_non_retentive_end__;
+
+ /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */
+ __tz_OSPI_DEVICE_1_S = ORIGIN(OSPI_DEVICE_1);
+
+ /* OSPI_DEVICE_1 section to be downloaded via debugger */
+ .OSPI_DEVICE_1 :
+ {
+ __ospi_device_1_start__ = .;
+ KEEP(*(.ospi_device_1*))
+ KEEP(*(.code_in_ospi_device_1*))
+ __ospi_device_1_end__ = .;
+ } > OSPI_DEVICE_1
+ __ospi_device_1_code_size__ = __ospi_device_1_end__ - __ospi_device_1_start__;
+
+ /* OSPI_DEVICE_1 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
+ __ospi_device_1_code_addr__ = __etext + (__data_end__ - __data_start__);
+ .ospi_device_1_non_retentive : AT (__ospi_device_1_code_addr__)
+ {
+ __ospi_device_1_non_retentive_start__ = .;
+ KEEP(*(.ospi_device_1_non_retentive*))
+ __ospi_device_1_non_retentive_end__ = .;
+ } > OSPI_DEVICE_1
+ __ospi_device_1_non_retentive_size__ = __ospi_device_1_non_retentive_end__ - __ospi_device_1_non_retentive_start__;
+
+ __ospi_device_1_region_max_size__ = 0x10000000; /* Must be the same as defined in MEMORY above */
+ __ospi_device_1_region_start_address__ = __ospi_device_1_start__;
+ __ospi_device_1_region_end_address__ = __ospi_device_1_start__ + __ospi_device_1_region_max_size__;
+
+ /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */
+ __tz_OSPI_DEVICE_1_N = __ospi_device_1_non_retentive_end__;
+
+ .noinit (NOLOAD):
+ {
+ . = ALIGN(4);
+ __noinit_start = .;
+ KEEP(*(.noinit*))
+ . = ALIGN(8);
+ /* Place the FreeRTOS heap here so that the __HeapLimit calculation does not include the freertos heap. */
+ KEEP(*(.heap.*))
+ __noinit_end = .;
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (NOLOAD):
+ {
+ . = ALIGN(8);
+ __HeapBase = .;
+ /* Place the STD heap here. */
+ KEEP(*(.heap))
+ __HeapLimit = .;
+ } > RAM
+
+ /* Stacks are stored in this section. */
+ .stack_dummy (NOLOAD):
+ {
+ . = ALIGN(8);
+ __StackLimit = .;
+ /* Main stack */
+ KEEP(*(.stack))
+ __StackTop = .;
+ /* Thread stacks */
+ KEEP(*(.stack*))
+ __StackTopAll = .;
+ } > RAM
+
+ PROVIDE(__stack = __StackTopAll);
+
+ /* This symbol represents the end of user allocated RAM. The RAM after this symbol can be used
+ at run time for things such as ThreadX memory pool allocations. */
+ __RAM_segment_used_end__ = ALIGN(__StackTopAll , 4);
+
+ /* RAM_NSC_START can be used to set a fixed address for non-secure callable RAM in secure projects.
+ * If it is not specified, the address for NSC RAM is the end of RAM aligned to a 1K boundary.
+ * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
+ __tz_RAM_C = DEFINED(RAM_NSC_START) ? ABSOLUTE(RAM_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__RAM_segment_used_end__, 1024);
+
+ /* RAM_NS_START can be used to set a fixed address for non-secure RAM in secure projects or flat projects.
+ * RAM_NS_BUFFER_BLOCK_LENGTH is used to allocate non-secure buffers in a flat project. If it is not
+ * specified, the address for NSC RAM is the end of RAM aligned to an 8K boundary.
+ * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
+ __tz_RAM_N = DEFINED(RAM_NS_START) ? ABSOLUTE(RAM_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__tz_RAM_C, 8192);
+
+ /* Non-secure buffers must be in non-secure RAM. This is primarily used for the EDMAC in flat projects.
+ * The EDMAC is a non-secure bus master and can only access non-secure RAM. */
+ .ns_buffer (NOLOAD):
+ {
+ /* Allocate RAM on a 32-byte boundary to help with placement of Ethernet buffers. */
+ . = __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_START & 0xFFFFFFE0) : .;
+
+ KEEP(*(.ns_buffer*))
+ } > RAM
+
+ /* Data flash. */
+ .data_flash :
+ {
+ . = ORIGIN(DATA_FLASH);
+ __tz_DATA_FLASH_S = .;
+ __Data_Flash_Start = .;
+ KEEP(*(.data_flash*))
+ __Data_Flash_End = .;
+
+ __tz_DATA_FLASH_N = DEFINED(DATA_FLASH_NS_START) ? ABSOLUTE(DATA_FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(DATA_FLASH_START + DATA_FLASH_LENGTH) : ALIGN(1024);
+ } > DATA_FLASH
+
+ /* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */
+ __tz_SDRAM_S = ORIGIN(SDRAM);
+
+ /* SDRAM */
+ .sdram (NOLOAD):
+ {
+ __SDRAM_Start = .;
+ KEEP(*(.sdram*))
+ KEEP(*(.frame*))
+ __SDRAM_End = .;
+ } > SDRAM
+
+ /* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */
+ __tz_SDRAM_N = __SDRAM_End;
+
+ /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */
+ __tz_ID_CODE_S = ORIGIN(ID_CODE);
+
+ .id_code :
+ {
+ __ID_Code_Start = .;
+ KEEP(*(.id_code*))
+ __ID_Code_End = .;
+ } > ID_CODE
+
+ /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */
+ __tz_ID_CODE_N = __ID_Code_End;
+
+ /* Symbol required for RA Configuration tool. */
+ __tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING);
+
+ .option_setting :
+ {
+ __OPTION_SETTING_Start = .;
+ KEEP(*(.option_setting_ofs0))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_Start + 0x10 : __OPTION_SETTING_Start;
+ KEEP(*(.option_setting_dualsel))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_Start + 0x34 : __OPTION_SETTING_Start;
+ KEEP(*(.option_setting_sas))
+ __OPTION_SETTING_End = .;
+ } > OPTION_SETTING = 0xFF
+
+ /* Symbol required for RA Configuration tool. */
+ __tz_OPTION_SETTING_N = OPTION_SETTING_START_NS;
+
+ .option_setting_ns :
+ {
+ __OPTION_SETTING_NS_Start = .;
+ KEEP(*(.option_setting_ofs1))
+ . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x10 : __OPTION_SETTING_NS_Start;
+ KEEP(*(.option_setting_banksel))
+ . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x40 : __OPTION_SETTING_NS_Start;
+ KEEP(*(.option_setting_bps0))
+ . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x44 : __OPTION_SETTING_NS_Start;
+ KEEP(*(.option_setting_bps1))
+ . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x48 : __OPTION_SETTING_NS_Start;
+ KEEP(*(.option_setting_bps2))
+ . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x60 : __OPTION_SETTING_NS_Start;
+ KEEP(*(.option_setting_pbps0))
+ . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x64 : __OPTION_SETTING_NS_Start;
+ KEEP(*(.option_setting_pbps1))
+ . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x68 : __OPTION_SETTING_NS_Start;
+ KEEP(*(.option_setting_pbps2))
+ __OPTION_SETTING_NS_End = .;
+ } > OPTION_SETTING = 0xFF
+
+ /* Symbol required for RA Configuration tool. */
+ __tz_OPTION_SETTING_S_S = ORIGIN(OPTION_SETTING_S);
+
+ .option_setting_s :
+ {
+ __OPTION_SETTING_S_Start = .;
+ KEEP(*(.option_setting_ofs1_sec))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x10 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_banksel_sec))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x40 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_bps_sec0))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x44 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_bps_sec1))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x48 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_bps_sec2))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x60 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_pbps_sec0))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x64 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_pbps_sec1))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x68 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_pbps_sec2))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x80 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_ofs1_sel))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x90 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_banksel_sel))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xC0 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_bps_sel0))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xC4 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_bps_sel1))
+ . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xC8 : __OPTION_SETTING_S_Start;
+ KEEP(*(.option_setting_bps_sel2))
+ __OPTION_SETTING_S_End = .;
+ } > OPTION_SETTING_S = 0xFF
+
+ /* Symbol required for RA Configuration tool. */
+ __tz_OPTION_SETTING_S_N = __OPTION_SETTING_S_End;
+}
diff --git a/bsp/renesas/ra6m3-ek/script/memory_regions.ld b/bsp/renesas/ra6m3-ek/script/memory_regions.ld
new file mode 100644
index 0000000000..836a3b55c2
--- /dev/null
+++ b/bsp/renesas/ra6m3-ek/script/memory_regions.ld
@@ -0,0 +1,22 @@
+
+ /* generated memory regions file - do not edit */
+ RAM_START = 0x1FFE0000;
+ RAM_LENGTH = 0xA0000;
+ FLASH_START = 0x00000000;
+ FLASH_LENGTH = 0x200000;
+ DATA_FLASH_START = 0x40100000;
+ DATA_FLASH_LENGTH = 0x10000;
+ OPTION_SETTING_START = 0x00000000;
+ OPTION_SETTING_LENGTH = 0x0;
+ OPTION_SETTING_S_START = 0x00000000;
+ OPTION_SETTING_S_LENGTH = 0x0;
+ ID_CODE_START = 0x0100A150;
+ ID_CODE_LENGTH = 0x10;
+ SDRAM_START = 0x90000000;
+ SDRAM_LENGTH = 0x8000000;
+ QSPI_FLASH_START = 0x60000000;
+ QSPI_FLASH_LENGTH = 0x4000000;
+ OSPI_DEVICE_0_START = 0x68000000;
+ OSPI_DEVICE_0_LENGTH = 0x0;
+ OSPI_DEVICE_1_START = 0x70000000;
+ OSPI_DEVICE_1_LENGTH = 0x0;
diff --git a/bsp/renesas/ra6m3-ek/template.uvoptx b/bsp/renesas/ra6m3-ek/template.uvoptx
index 91c5687097..b61c2ff6f9 100644
--- a/bsp/renesas/ra6m3-ek/template.uvoptx
+++ b/bsp/renesas/ra6m3-ek/template.uvoptx
@@ -120,7 +120,7 @@
0
UL2CM3
- UL2CM3(-S0 -C0 -P0 ) -FN3 -FC2000 -FD20000000 -FF0RA6M3_2M -FF1RA6M3_DATA_C2M -FF2RA6M3_CONF -FL0200000 -FL110000 -FL280 -FS00 -FS140100000 -FS2100A100 -FP0($$Device:R7FA6M3AH3CFC$Flash\RA6M3_2M.FLM) -FP1($$Device:R7FA6M3AH3CFC$Flash\RA6M3_DATA_C2M.FLM) -FP2($$Device:R7FA6M3AH3CFC$Flash\RA6M3_CONF.FLM)
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC2000 -FN3 -FF0RA6M3_2M -FS00 -FL0200000 -FF1RA6M3_DATA_C2M -FS140100000 -FL110000 -FF2RA6M3_CONF -FS2100A100 -FL280 -FP0($$Device:R7FA6M3AH$Flash\RA6M3_2M.FLM) -FP1($$Device:R7FA6M3AH$Flash\RA6M3_DATA_C2M.FLM) -FP2($$Device:R7FA6M3AH$Flash\RA6M3_CONF.FLM))
0
diff --git a/bsp/renesas/ra6m3-ek/template.uvprojx b/bsp/renesas/ra6m3-ek/template.uvprojx
index 7430003e2e..0d591581d1 100644
--- a/bsp/renesas/ra6m3-ek/template.uvprojx
+++ b/bsp/renesas/ra6m3-ek/template.uvprojx
@@ -13,14 +13,14 @@
1
- R7FA6M3AH3CFC
+ R7FA6M3AH
Renesas
- Renesas.RA_DFP.3.8.0
+ Renesas.RA_DFP.4.2.0
https://www2.renesas.eu/Keil_MDK_Packs/
IRAM(0x1FFE0000,0x020000) IRAM2(0x20000000,0x080000) IROM(0x00000000,0x200000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE
- UL2CM3(-S0 -C0 -P0 -FD20000000 -FC2000 -FN3 -FF0RA6M3_2M -FS00 -FL0200000 -FF1RA6M3_DATA_C2M -FS140100000 -FL110000 -FF2RA6M3_CONF -FS2100A100 -FL280 -FP0($$Device:R7FA6M3AH3CFC$Flash\RA6M3_2M.FLM) -FP1($$Device:R7FA6M3AH3CFC$Flash\RA6M3_DATA_C2M.FLM) -FP2($$Device:R7FA6M3AH3CFC$Flash\RA6M3_CONF.FLM))
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC2000 -FN3 -FF0RA6M3_2M -FS00 -FL0200000 -FF1RA6M3_DATA_C2M -FS140100000 -FL110000 -FF2RA6M3_CONF -FS2100A100 -FL280 -FP0($$Device:R7FA6M3AH$Flash\RA6M3_2M.FLM) -FP1($$Device:R7FA6M3AH$Flash\RA6M3_DATA_C2M.FLM) -FP2($$Device:R7FA6M3AH$Flash\RA6M3_CONF.FLM))
0
@@ -32,7 +32,7 @@
- $$Device:R7FA6M3AH3CFC$SVD\R7FA6M3AH.svd
+ $$Device:R7FA6M3AH$SVD\R7FA6M3AH.svd
0
0
@@ -128,7 +128,7 @@
- 0
+ 1
1
0
1
@@ -137,7 +137,7 @@
1
BIN\UL2CM3.DLL
- "" ()
+