diff --git a/bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c b/bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c
index c4bc353cf6..388f88671f 100644
--- a/bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c
+++ b/bsp/nuvoton_nuc472/Libraries/Device/Nuvoton/NUC472_442/Source/GCC/startup.c
@@ -150,9 +150,9 @@ extern unsigned char _sdata;
// End address for the .data section// defined in linker script
extern unsigned char _edata;
// Begin address for the .bss section// defined in linker script
-extern unsigned char __bss_start__;
+extern unsigned char __bss_start;
// End address for the .bss section// defined in linker script
-extern unsigned char __bss_end__;
+extern unsigned char __bss_end;
extern int entry(void);
@@ -333,7 +333,7 @@ pHandler g_pfnVectors[] =
void _start()
{
memcpy(&_sdata, &_sidata, &_edata - &_sdata);
- memset(&__bss_start__, 0, &__bss_end__ - &__bss_start__);
+ memset(&__bss_start, 0, &__bss_end - &__bss_start);
}
static void Reset_Handler(void)
diff --git a/bsp/nuvoton_nuc472/README.md b/bsp/nuvoton_nuc472/README.md
index a3febd4e36..5bc4e9c7b3 100644
--- a/bsp/nuvoton_nuc472/README.md
+++ b/bsp/nuvoton_nuc472/README.md
@@ -3,7 +3,7 @@
NuTiny-EVB-NUC472
## note:
- support the GCC MDK5 IAR
+ support the GCC MDK4 MDK5 IAR
**TODO**
diff --git a/bsp/nuvoton_nuc472/drivers/board.c b/bsp/nuvoton_nuc472/drivers/board.c
index f8135a795e..3184e138f9 100644
--- a/bsp/nuvoton_nuc472/drivers/board.c
+++ b/bsp/nuvoton_nuc472/drivers/board.c
@@ -22,7 +22,7 @@ extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
#else
-extern int __bss_end__;
+extern int __bss_end;
#endif
/**
@@ -80,7 +80,7 @@ void rt_hw_board_init(void)
rt_system_heap_init(__segment_end("HEAP"), (void*)SRAM_END);
#else
/* init memory system */
- rt_system_heap_init((void*)&__bss_end__, (void*)SRAM_END);
+ rt_system_heap_init((void*)&__bss_end, (void*)SRAM_END);
#endif
#endif /* RT_USING_HEAP */
diff --git a/bsp/nuvoton_nuc472/drivers/nuc472_eth.c b/bsp/nuvoton_nuc472/drivers/nuc472_eth.c
index de9f32eedd..e082669ca8 100644
--- a/bsp/nuvoton_nuc472/drivers/nuc472_eth.c
+++ b/bsp/nuvoton_nuc472/drivers/nuc472_eth.c
@@ -181,7 +181,7 @@ static void init_rx_desc(rt_nuc472_emac_t emac)
emac->rx_desc[i].status1 = OWNERSHIP_EMAC;
emac->rx_desc[i].buf = &emac->rx_buf[i][0];
emac->rx_desc[i].status2 = 0;
- emac->rx_desc[i].next = &emac->rx_desc[(i + 1) % TX_DESCRIPTOR_NUM];
+ emac->rx_desc[i].next = &emac->rx_desc[(i + 1) % RX_DESCRIPTOR_NUM];
}
emac_base->RXDSA = (unsigned int)&emac->rx_desc[0];
return;
@@ -205,8 +205,8 @@ static void set_mac_addr(rt_nuc472_emac_t emac, rt_uint8_t *addr)
void EMAC_init(rt_nuc472_emac_t emac, rt_uint8_t *mac_addr)
{
+ EMAC_T *emac_base = emac->emac_base;
RT_ASSERT(emac->dev_addr != RT_NULL);
- EMAC_T *emac_base = emac->emac_base;
CLK_EnableModuleClock(EMAC_MODULE);
@@ -445,12 +445,12 @@ rt_err_t rt_nuc472_emac_tx(rt_device_t dev, struct pbuf* p)
struct pbuf *rt_nuc472_emac_rx(rt_device_t dev)
{
rt_nuc472_emac_t emac = (rt_nuc472_emac_t)dev;
+ unsigned int status;
struct pbuf* p;
/* init p pointer */
p = RT_NULL;
- unsigned int status;
status = emac->cur_rx_desc_ptr->status1;
if(status & OWNERSHIP_EMAC)
diff --git a/bsp/nuvoton_nuc472/ldscripts/libs.ld b/bsp/nuvoton_nuc472/ldscripts/libs.ld
deleted file mode 100644
index 70fea89265..0000000000
--- a/bsp/nuvoton_nuc472/ldscripts/libs.ld
+++ /dev/null
@@ -1,8 +0,0 @@
-
-/*
- * Placeholder to list other libraries required by the application.
-
-GROUP(
-)
-
- */
diff --git a/bsp/nuvoton_nuc472/ldscripts/mem.ld b/bsp/nuvoton_nuc472/ldscripts/mem.ld
deleted file mode 100644
index 351c8f767a..0000000000
--- a/bsp/nuvoton_nuc472/ldscripts/mem.ld
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Memory Spaces Definitions.
- *
- * Need modifying for a specific board.
- * FLASH.ORIGIN: starting address of flash
- * FLASH.LENGTH: length of flash
- * RAM.ORIGIN: starting address of RAM bank 0
- * RAM.LENGTH: length of RAM bank 0
- *
- * The values below can be addressed in further linker scripts
- * using functions like 'ORIGIN(RAM)' or 'LENGTH(RAM)'.
- */
-
-MEMORY
-{
- RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
- FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K /*4K*/
-}
-
-/*
- * For external ram use something like:
-
- RAM (xrw) : ORIGIN = 0x68000000, LENGTH = 8K
-
- */
diff --git a/bsp/nuvoton_nuc472/ldscripts/sections.ld b/bsp/nuvoton_nuc472/ldscripts/sections.ld
index d7989ad7f9..9e7ed857ca 100644
--- a/bsp/nuvoton_nuc472/ldscripts/sections.ld
+++ b/bsp/nuvoton_nuc472/ldscripts/sections.ld
@@ -1,129 +1,32 @@
/*
- * Default linker script for Cortex-M
- *
- * To make use of the multi-region initialisations, define
- * OS_INCLUDE_STARTUP_INIT_MULTIPLE_RAM_SECTIONS for the _startup.c file.
+ * linker script for STM32F10x with GNU ld
+ * bernard.xiong 2009-10-14
*/
-/*
- * The '__stack' definition is required by crt0, do not remove it.
- */
-__stack = ORIGIN(RAM) + LENGTH(RAM);
-
-_estack = __stack; /* STM specific definition */
-
-/*
- * Default stack sizes.
- * These are used by the startup in order to allocate stacks
- * for the different modes.
- */
-
-__Main_Stack_Size = 1024 ;
-
-PROVIDE ( _Main_Stack_Size = __Main_Stack_Size ) ;
-
-__Main_Stack_Limit = __stack - __Main_Stack_Size ;
-
-/* "PROVIDE" allows to easily override these values from an
- * object file or the command line. */
-PROVIDE ( _Main_Stack_Limit = __Main_Stack_Limit ) ;
-
-/*
- * There will be a link error if there is not this amount of
- * RAM free at the end.
- */
-_Minimum_Stack_Size = 256 ;
-
-/*
- * Default heap definitions.
- * The heap start immediately after the last statically allocated
- * .sbss/.noinit section, and extends up to the main stack limit.
- */
-PROVIDE ( _Heap_Begin = _end_noinit ) ;
-PROVIDE ( _Heap_Limit = __stack - __Main_Stack_Size ) ;
-
-/*
- * The entry point is informative, for debuggers and simulators,
- * since the Cortex-M vector points to it anyway.
- */
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+ CODE (rx) : ORIGIN = 0x00000000, LENGTH = 512k /* 128K sram */
+ DATA (rw) : ORIGIN = 0x20000000, LENGTH = 64k /* 512KB flash */
+}
ENTRY(_start)
-
-
-/* Sections Definitions */
+_system_stack_size = 0x400;
SECTIONS
{
- /*
- * For Cortex-M devices, the beginning of the startup code is stored in
- * the .isr_vector section, which goes to FLASH.
- */
- .isr_vector : ALIGN(4)
+ .text :
{
- FILL(0xFF)
-
- __vectors_start = ABSOLUTE(.) ;
- __vectors_start__ = ABSOLUTE(.) ; /* STM specific definition */
- KEEP(*(.isr_vector)) /* Interrupt vectors */
-
- KEEP(*(.cfmconfig)) /* Freescale configuration words */
-
- /*
- * This section is here for convenience, to store the
- * startup code at the beginning of the flash area, hoping that
- * this will increase the readability of the listing.
- */
- *(.after_vectors .after_vectors.*) /* Startup code and ISR */
-
- } >FLASH
-
- .inits : ALIGN(4)
- {
- /*
- * Memory regions initialisation arrays.
- *
- * Thee are two kinds of arrays for each RAM region, one for
- * data and one for bss. Each is iterrated at startup and the
- * region initialisation is performed.
- *
- * The data array includes:
- * - from (LOADADDR())
- * - region_begin (ADDR())
- * - region_end (ADDR()+SIZEOF())
- *
- * The bss array includes:
- * - region_begin (ADDR())
- * - region_end (ADDR()+SIZEOF())
- *
- * WARNING: It is mandatory that the regions are word aligned,
- * since the initialisation code works only on words.
- */
-
- __data_regions_array_start = .;
-
- LONG(LOADADDR(.data));
- LONG(ADDR(.data));
- LONG(ADDR(.data)+SIZEOF(.data));
-
- __data_regions_array_end = .;
-
- __bss_regions_array_start = .;
-
- LONG(ADDR(.bss));
- LONG(ADDR(.bss)+SIZEOF(.bss));
-
-
- __bss_regions_array_end = .;
-
- /* End of memory regions initialisation arrays. */
-
- /*
- * These are the old initialisation sections, intended to contain
- * naked code, with the prologue/epilogue added by crti.o/crtn.o
- * when linking with startup files. The standalone startup code
- * currently does not run these, better use the init arrays below.
- */
- KEEP(*(.init))
- KEEP(*(.fini))
+ . = ALIGN(4);
+ _stext = .;
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ *(.text) /* remaining code */
+ *(.text.*) /* remaining code */
+ *(.rodata) /* read-only data (constants) */
+ *(.rodata*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
@@ -135,7 +38,7 @@ SECTIONS
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
-
+
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
@@ -143,212 +46,67 @@ SECTIONS
__rt_init_end = .;
. = ALIGN(4);
+ . = ALIGN(4);
+ _etext = .;
+ } > CODE = 0
- /*
- * The preinit code, i.e. an array of pointers to initialisation
- * functions to be performed before constructors.
- */
- PROVIDE_HIDDEN (__preinit_array_start = .);
-
- /*
- * Used to run the SystemInit() before anything else.
- */
- KEEP(*(.preinit_array_sysinit .preinit_array_sysinit.*))
-
- /*
- * Used for other platform inits.
- */
- KEEP(*(.preinit_array_platform .preinit_array_platform.*))
-
- /*
- * The application inits. If you need to enforce some order in
- * execution, create new sections, as before.
- */
- KEEP(*(.preinit_array .preinit_array.*))
-
- PROVIDE_HIDDEN (__preinit_array_end = .);
-
- . = ALIGN(4);
-
- /*
- * The init code, i.e. an array of pointers to static constructors.
- */
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE_HIDDEN (__init_array_end = .);
-
- . = ALIGN(4);
-
- /*
- * The fini code, i.e. an array of pointers to static destructors.
- */
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP(*(SORT(.fini_array.*)))
- KEEP(*(.fini_array))
- PROVIDE_HIDDEN (__fini_array_end = .);
-
- } >FLASH
-
- /*
- * For some STRx devices, the beginning of the startup code
- * is stored in the .flashtext section, which goes to FLASH.
- */
- .flashtext : ALIGN(4)
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+ __exidx_start = .;
+ .ARM.exidx :
{
- *(.flashtext .flashtext.*) /* Startup code */
- } >FLASH
-
-
- /*
- * The program code is stored in the .text section,
- * which goes to FLASH.
- */
- .text : ALIGN(4)
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+ /* This is used by the startup in order to initialize the .data secion */
+ _sidata = .;
+ } > CODE
+ __exidx_end = .;
+
+ /* .data section which is used for initialized data */
+
+ .data : AT (_sidata)
{
- *(.text .text.*) /* all remaining code */
-
- /* read-only data (constants) */
- *(.rodata .rodata.* .constdata .constdata.*)
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _sdata = . ;
- *(vtable) /* C++ virtual tables */
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
- KEEP(*(.eh_frame*))
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _edata = . ;
+ } >DATA
- /*
- * Stub sections generated by the linker, to glue together
- * ARM and Thumb code. .glue_7 is used for ARM code calling
- * Thumb code, and .glue_7t is used for Thumb code calling
- * ARM code. Apparently always generated by the linker, for some
- * architectures, so better leave them here.
- */
- *(.glue_7)
- *(.glue_7t)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- } >FLASH
-
- /* ARM magic sections */
- .ARM.extab : ALIGN(4)
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > FLASH
-
- . = ALIGN(4);
- __exidx_start = .;
- .ARM.exidx : ALIGN(4)
- {
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- } > FLASH
- __exidx_end = .;
-
- . = ALIGN(4);
- _etext = .;
- __etext = .;
-
- /* MEMORY_ARRAY */
- /*
- .ROarraySection :
+ .stack :
{
- *(.ROarraySection .ROarraySection.*)
- } >MEMORY_ARRAY
- */
-
- /*
- * This address is used by the startup code to
- * initialise the .data section.
- */
- _sidata = LOADADDR(.data);
+ _sstack = .;
+ . = . + _system_stack_size;
+ . = ALIGN(4);
+ _estack = .;
+ } >DATA
- /*
- * The initialised data section.
- *
- * The program executes knowing that the data is in the RAM
- * but the loader puts the initial values in the FLASH (inidata).
- * It is one task of the startup to copy the initial values from
- * FLASH to RAM.
- */
- .data : ALIGN(4)
+ __bss_start = .;
+ .bss :
{
- FILL(0xFF)
- /* This is used by the startup code to initialise the .data section */
- _sdata = . ; /* STM specific definition */
- __data_start__ = . ;
- *(.data_begin .data_begin.*)
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .;
- *(.data .data.*)
-
- *(.data_end .data_end.*)
- . = ALIGN(4);
-
- /* This is used by the startup code to initialise the .data section */
- _edata = . ; /* STM specific definition */
- __data_end__ = . ;
-
- } >RAM AT>FLASH
-
- /*
- * The uninitialised data sections. NOLOAD is used to avoid
- * the "section `.bss' type changed to PROGBITS" warning
- */
-
- /* The primary uninitialised data section. */
- .bss (NOLOAD) : ALIGN(4)
- {
- __bss_start__ = .; /* standard newlib definition */
- _sbss = .; /* STM specific definition */
- *(.bss_begin .bss_begin.*)
-
- *(.bss .bss.*)
+ *(.bss)
+ *(.bss.*)
*(COMMON)
-
- *(.bss_end .bss_end.*)
- . = ALIGN(4);
- __bss_end__ = .; /* standard newlib definition */
- _ebss = . ; /* STM specific definition */
- } >RAM
-
- .noinit (NOLOAD) : ALIGN(4)
- {
- _noinit = .;
-
- *(.noinit .noinit.*)
-
- . = ALIGN(4) ;
- _end_noinit = .;
- } > RAM
-
- /* Mandatory to be word aligned, _sbrk assumes this */
- PROVIDE ( end = _end_noinit ); /* was _ebss */
- PROVIDE ( _end = _end_noinit );
- PROVIDE ( __end = _end_noinit );
- PROVIDE ( __end__ = _end_noinit );
-
- /*
- * Used for validation only, do not allocate anything here!
- *
- * This is just to check that there is enough RAM left for the Main
- * stack. It should generate an error if it's full.
- */
- ._check_stack : ALIGN(4)
- {
- . = . + _Minimum_Stack_Size ;
- } >RAM
- /* After that there are only debugging sections. */
-
- /* This can remove the debugging information from the standard libraries */
- /*
- DISCARD :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
- */
-
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _ebss = . ;
+
+ *(.bss.init)
+ } > DATA
+ __bss_end = .;
+
+ _end = .;
+
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
@@ -357,11 +115,9 @@ SECTIONS
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
- /*
- * DWARF debug sections.
+ /* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
- * of the section so we begin them at 0.
- */
+ * of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
@@ -383,5 +139,5 @@ SECTIONS
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
}
diff --git a/bsp/nuvoton_nuc472/project.uvproj b/bsp/nuvoton_nuc472/project.uvproj
new file mode 100644
index 0000000000..0888eb8df9
--- /dev/null
+++ b/bsp/nuvoton_nuc472/project.uvproj
@@ -0,0 +1,1153 @@
+
+
+ 1.1
+ ### uVision Project, (C) Keil Software
+
+
+ rtthread-nuc472
+ 0x4
+ ARM-ADS
+
+
+ NUC472HI8AE
+ Nuvoton
+ IRAM(0x20000000-0x2000FFFF) IROM(0-0x7FFFF) CLOCK(84000000) CPUTYPE("Cortex-M4") FPU2
+
+ undefined
+
+ 0
+
+
+
+
+
+
+
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+ 0
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+
+ DARMCM1.DLL
+
+ SARMCM3.DLL
+
+ TARMCM1.DLL
+
+
+
+
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+
+
+ applications;.;drivers;Libraries\CMSIS\Include;Libraries\Device\Nuvoton\NUC472_442\Include;Libraries\StdDriver\inc;..\..\include;..\..\libcpu\arm\cortex-m4;..\..\libcpu\arm\common;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\net\lwip-2.0.2\src\include\posix
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
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+
+
+
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+ 1
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+ 0
+ 0
+ 1
+ 0
+ 0x00000000
+ 0x20000000
+
+
+
+
+ --keep *.o(.rti_fn.*) --keep *.o(FSymTab)
+
+
+
+
+
+
+
+ Applications
+
+
+ application.c
+ 1
+ applications\application.c
+
+
+
+
+ Drivers
+
+
+ board.c
+ 1
+ drivers\board.c
+
+
+
+
+ nuc472_eth.c
+ 1
+ drivers\nuc472_eth.c
+
+
+
+
+ usart.c
+ 1
+ drivers\usart.c
+
+
+
+
+ CMSIS
+
+
+ system_NUC472_442.c
+ 1
+ Libraries\Device\Nuvoton\NUC472_442\Source\system_NUC472_442.c
+
+
+
+
+ startup_NUC472_442.s
+ 2
+ Libraries\Device\Nuvoton\NUC472_442\Source\ARM\startup_NUC472_442.s
+
+
+
+
+ NUC472_StdPeriph
+
+
+ acmp.c
+ 1
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+
+
+
+
+ adc.c
+ 1
+ Libraries\StdDriver\src\adc.c
+
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+ can.c
+ 1
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+
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+ cap.c
+ 1
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+
+
+
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+ clk.c
+ 1
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+
+
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+ crc.c
+ 1
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+
+
+
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+ crypto.c
+ 1
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+
+
+
+
+ eadc.c
+ 1
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+
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+ ebi.c
+ 1
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+ emac.c
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+ epwm.c
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+ fmc.c
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+ gpio.c
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+ i2c.c
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+ i2s.c
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+ Libraries\StdDriver\src\i2s.c
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+
+
+ pdma.c
+ 1
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+
+
+
+
+ ps2.c
+ 1
+ Libraries\StdDriver\src\ps2.c
+
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+
+
+ pwm.c
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+ rtc.c
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+ sc.c
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+ sd.c
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+ spi.c
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+ Libraries\StdDriver\src\spi.c
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+
+
+
+ sys_.c
+ 1
+ Libraries\StdDriver\src\sys_.c
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+
+
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+ timer_.c
+ 1
+ Libraries\StdDriver\src\timer_.c
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+ uart.c
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+ usbd.c
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+ wwdt.c
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+
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+ Kernel
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+ CORTEX-M4
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+ context_rvds.S
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+ backtrace.c
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+ msh_file.c
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+
+
+
+ lwIP
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+
+ sys_arch.c
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+
+
+
+
+ api_lib.c
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+
+
+
+ api_msg.c
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+ err.c
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+
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+
+
+
+
+ netdb.c
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+
+
+
+
+ netifapi.c
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+
+
+
+
+ sockets.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\api\sockets.c
+
+
+
+
+ tcpip.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\api\tcpip.c
+
+
+
+
+ def.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\def.c
+
+
+
+
+ dns.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\dns.c
+
+
+
+
+ inet_chksum.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\inet_chksum.c
+
+
+
+
+ init.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\init.c
+
+
+
+
+ ip.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\ip.c
+
+
+
+
+ memp.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\memp.c
+
+
+
+
+ netif.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\netif.c
+
+
+
+
+ pbuf.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\pbuf.c
+
+
+
+
+ raw.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\raw.c
+
+
+
+
+ stats.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\stats.c
+
+
+
+
+ sys.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\sys.c
+
+
+
+
+ tcp.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\tcp.c
+
+
+
+
+ tcp_in.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\tcp_in.c
+
+
+
+
+ tcp_out.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\tcp_out.c
+
+
+
+
+ timeouts.c
+ 1
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+
+
+
+
+ udp.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\udp.c
+
+
+
+
+ ethernet.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\netif\ethernet.c
+
+
+
+
+ ethernetif.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\netif\ethernetif.c
+
+
+
+
+ lowpan6.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\netif\lowpan6.c
+
+
+
+
+ autoip.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\ipv4\autoip.c
+
+
+
+
+ dhcp.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\ipv4\dhcp.c
+
+
+
+
+ etharp.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\ipv4\etharp.c
+
+
+
+
+ icmp.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\ipv4\icmp.c
+
+
+
+
+ igmp.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\ipv4\igmp.c
+
+
+
+
+ ip4.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4.c
+
+
+
+
+ ip4_addr.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_addr.c
+
+
+
+
+ ip4_frag.c
+ 1
+ ..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_frag.c
+
+
+
+
+
+
+
diff --git a/bsp/nuvoton_nuc472/template.uvproj b/bsp/nuvoton_nuc472/template.uvproj
new file mode 100644
index 0000000000..61af4cfa37
--- /dev/null
+++ b/bsp/nuvoton_nuc472/template.uvproj
@@ -0,0 +1,407 @@
+
+
+
+ 1.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ rtthread-nuc472
+ 0x4
+ ARM-ADS
+
+
+ NUC472HI8AE
+ Nuvoton
+ IRAM(0x20000000-0x2000FFFF) IROM(0-0x7FFFF) CLOCK(84000000) CPUTYPE("Cortex-M4") FPU2
+
+ undefined
+
+ 0
+
+
+
+
+
+
+
+
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+ SFD\Nuvoton\NUC400_v1.SFR
+ 0
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+
+ 1
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+
+ SARMCM3.DLL
+
+ DARMCM1.DLL
+
+ SARMCM3.DLL
+
+ TARMCM1.DLL
+
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