[DeviceDriver] Update QSPI driver framework.

This commit is contained in:
armink 2018-11-24 15:02:53 +08:00
parent 2ca5995160
commit 15b2feb60d
4 changed files with 8 additions and 4 deletions

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@ -186,6 +186,10 @@ config RT_USING_SPI
bool "Using defined supported flash chip information table"
default y
config RT_SFUD_USING_QSPI
bool "Using QSPI mode support"
default n
config RT_DEBUG_SFUD
bool "Show more SFUD debug information"
default n

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@ -144,8 +144,8 @@ struct rt_qspi_configuration
rt_uint32_t medium_size;
/* double data rate mode */
rt_uint8_t ddr_mode;
/* the number of lines connected to the hardware */
rt_uint8_t qspi_hw_lines;
/* the data lines max width which QSPI bus supported, such as 1, 2, 4 */
rt_uint8_t qspi_dl_width ;
};
struct rt_qspi_device

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@ -2,7 +2,7 @@ from building import *
import rtconfig
cwd = GetCurrentDir()
src = ['spi_core.c', 'spi_dev.c']
src = ['spi_core.c', 'spi_dev.c', 'qspi_core.c']
CPPPATH = [cwd, cwd + '/../include']
LOCAL_CCFLAGS = ''

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@ -25,7 +25,7 @@ rt_err_t rt_qspi_configure(struct rt_qspi_device *device, struct rt_qspi_configu
qspi_device->config.parent.reserved = cfg->parent.reserved;
qspi_device->config.medium_size = cfg->medium_size;
qspi_device->config.ddr_mode = cfg->ddr_mode;
qspi_device->config.qspi_hw_lines = cfg->qspi_hw_lines;
qspi_device->config.qspi_dl_width = cfg->qspi_dl_width;
result = rt_spi_configure(&device->parent, &cfg->parent);