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[DM/SPI] Make CS pin config fixed in system (#9977)

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Make a max CS pin value (16) for SPI, that will not
alloc `*cs_pins` by malloc, because drivers call
`rt_device_unregister` may not free item.

Fixup the QSPI init configure member in DM mode.

Make SoC Kconfig import easy.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
This commit is contained in:
GUI 2025-02-11 14:54:59 +08:00 committed by GitHub
parent f820c1948a
commit 1564735b5c
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
5 changed files with 25 additions and 24 deletions
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7
components/drivers/include/drivers/dev_spi.h
View File

@ -132,6 +132,8 @@ extern "C"{
#define RT_SPI_BUS_MODE_SPI (1<<0)
#define RT_SPI_BUS_MODE_QSPI (1<<1)
#define RT_SPI_CS_CNT_MAX 16
/**
* @brief SPI message structure
*/
@ -175,7 +177,8 @@ struct rt_spi_bus
const struct rt_spi_ops *ops;
#ifdef RT_USING_DM
rt_base_t *pins;
rt_base_t cs_pins[RT_SPI_CS_CNT_MAX];
rt_uint8_t cs_active_vals[RT_SPI_CS_CNT_MAX];
rt_bool_t slave;
int num_chipselect;
#endif /* RT_USING_DM */
@ -220,7 +223,7 @@ struct rt_spi_device
const struct rt_spi_device_id *id;
const struct rt_ofw_node_id *ofw_id;
rt_uint8_t chip_select;
rt_uint8_t chip_select[RT_SPI_CS_CNT_MAX];
struct rt_spi_delay cs_setup;
struct rt_spi_delay cs_hold;
struct rt_spi_delay cs_inactive;

5
components/drivers/spi/dev_qspi_core.c
View File

@ -52,7 +52,12 @@ rt_err_t rt_qspi_configure(struct rt_qspi_device *device, struct rt_qspi_configu
device->config.parent.mode = cfg->parent.mode;
device->config.parent.max_hz = cfg->parent.max_hz;
device->config.parent.data_width = cfg->parent.data_width;
#ifdef RT_USING_DM
device->config.parent.data_width_tx = cfg->parent.data_width_tx;
device->config.parent.data_width_rx = cfg->parent.data_width_rx;
#else
device->config.parent.reserved = cfg->parent.reserved;
#endif
device->config.medium_size = cfg->medium_size;
device->config.ddr_mode = cfg->ddr_mode;
device->config.qspi_dl_width = cfg->qspi_dl_width;

7
components/drivers/spi/dev_spi_bus.c
View File

@ -27,7 +27,6 @@ void spi_bus_scan_devices(struct rt_spi_bus *bus)
rt_ofw_foreach_available_child_node(np, spi_dev_np)
{
rt_uint64_t reg_offset;
struct rt_spi_device *spi_dev;
if (!rt_ofw_prop_read_bool(spi_dev_np, "compatible"))
@ -46,8 +45,6 @@ void spi_bus_scan_devices(struct rt_spi_bus *bus)
return;
}
rt_ofw_get_address(spi_dev_np, 0, &reg_offset, RT_NULL);
spi_dev->parent.ofw_node = spi_dev_np;
spi_dev->parent.type = RT_Device_Class_Unknown;
spi_dev->name = rt_ofw_node_name(spi_dev_np);
@ -137,9 +134,9 @@ static rt_err_t spi_probe(rt_device_t dev)
bus = device->bus;
if (bus->pins)
if (bus->cs_pins[0] >= 0)
{
device->cs_pin = bus->pins[device->chip_select];
device->cs_pin = bus->cs_pins[device->chip_select[0]];
rt_pin_mode(device->cs_pin, PIN_MODE_OUTPUT);
}

17
components/drivers/spi/dev_spi_core.c
View File

@ -53,25 +53,14 @@ rt_err_t rt_spi_bus_register(struct rt_spi_bus *bus,
if (pin_count > 0)
{
pin_count = rt_max_t(int, pin_count, bus->num_chipselect);
bus->pins = rt_malloc(sizeof(bus->pins[0]) * pin_count);
if (!bus->pins)
{
rt_device_unregister(&bus->parent);
return -RT_ENOMEM;
}
for (int i = 0; i < pin_count; ++i)
{
bus->pins[i] = rt_pin_get_named_pin(&bus->parent, "cs", i,
RT_NULL, RT_NULL);
bus->cs_pins[i] = rt_pin_get_named_pin(&bus->parent, "cs", i,
RT_NULL, &bus->cs_active_vals[i]);
}
}
else if (pin_count == 0)
{
bus->pins = RT_NULL;
}
else
else if (pin_count < 0)
{
result = pin_count;

13
components/drivers/spi/dev_spi_dm.c
View File

@ -38,7 +38,7 @@ static void ofw_parse_delay(struct rt_ofw_node *np, struct rt_spi_delay *delay,
rt_err_t spi_device_ofw_parse(struct rt_spi_device *spi_dev)
{
rt_err_t err;
rt_uint32_t value;
rt_uint32_t value, cs[RT_SPI_CS_CNT_MAX];
struct rt_spi_bus *spi_bus = spi_dev->bus;
struct rt_ofw_node *np = spi_dev->parent.ofw_node;
struct rt_spi_configuration *conf = &spi_dev->config;
@ -84,13 +84,20 @@ rt_err_t spi_device_ofw_parse(struct rt_spi_device *spi_dev)
return RT_EOK;
}
if ((err = rt_ofw_prop_read_u32(np, "reg", &value)))
value = rt_ofw_prop_read_u32_array_index(np, "reg", 0, RT_SPI_CS_CNT_MAX, cs);
if ((rt_int32_t)value < 0)
{
err = (rt_err_t)value;
LOG_E("Find 'reg' failed");
return err;
}
spi_dev->chip_select = value;
for (int i = 0; i < value; ++i)
{
spi_dev->chip_select[i] = cs[i];
}
if (!rt_ofw_prop_read_u32(np, "spi-max-frequency", &value))
{