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update LPC214X: Modify the interrupt interface implementations.

This commit is contained in:
aozima 2013-03-23 20:21:40 +08:00
parent eab20a9975
commit 1549b7db90
3 changed files with 80 additions and 54 deletions
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14
bsp/lpc2148/drivers/board.c
View File

@ -27,7 +27,7 @@
* This is the timer interrupt service routine.
* @param vector the irq number for timer
*/
void rt_hw_timer_handler(int vector)
void rt_hw_timer_handler(int vector, void *param)
{
rt_tick_increase();
@ -53,10 +53,10 @@ void rt_hw_console_output(const char* str)
while (!(U0LSR & 0x20));
U0THR = '\r';
}
while (!(U0LSR & 0x20));
U0THR = *str;
str ++;
}
}
@ -82,11 +82,11 @@ void rt_hw_console_init()
/**
* This function will initial sam7x256 board.
*/
void rt_hw_board_init()
void rt_hw_board_init(void)
{
/* console init */
rt_hw_console_init();
/* prescaler = 0*/
T0PR = 0;
T0PC = 0;
@ -94,12 +94,12 @@ void rt_hw_board_init()
/* reset and enable MR0 interrupt */
T0MCR = 0x3;
T0MR0 = PCLK / RT_TICK_PER_SECOND;
/* enable timer 0 */
T0TCR = 1;
/* install timer handler */
rt_hw_interrupt_install(TIMER0_INT, rt_hw_timer_handler, RT_NULL);
rt_hw_interrupt_install(TIMER0_INT, rt_hw_timer_handler, RT_NULL, "TIMER0");
rt_hw_interrupt_umask(TIMER0_INT);
}

50
bsp/lpc2148/drivers/serial.c
View File

@ -69,7 +69,7 @@ void rt_hw_uart_isr(struct rt_lpcserial* lpc_serial)
UNUSED rt_uint32_t iir;
RT_ASSERT(lpc_serial != RT_NULL)
if (UART_LSR(lpc_serial->hw_base) & 0x01)
{
rt_base_t level;
@ -80,12 +80,12 @@ void rt_hw_uart_isr(struct rt_lpcserial* lpc_serial)
level = rt_hw_interrupt_disable();
/* read character */
lpc_serial->rx_buffer[lpc_serial->save_index] =
lpc_serial->rx_buffer[lpc_serial->save_index] =
UART_RBR(lpc_serial->hw_base);
lpc_serial->save_index ++;
if (lpc_serial->save_index >= RT_UART_RX_BUFFER_SIZE)
lpc_serial->save_index = 0;
/* if the next position is read index, discard this 'read char' */
if (lpc_serial->save_index == lpc_serial->read_index)
{
@ -113,7 +113,7 @@ void rt_hw_uart_isr(struct rt_lpcserial* lpc_serial)
}
#ifdef RT_USING_UART1
void rt_hw_uart_isr_1(int irqno)
void rt_hw_uart_isr_1(int irqno, void *param)
{
/* get lpc serial device */
rt_hw_uart_isr(&serial1);
@ -121,7 +121,7 @@ void rt_hw_uart_isr_1(int irqno)
#endif
#ifdef RT_USING_UART2
void rt_hw_uart_isr_2(int irqno)
void rt_hw_uart_isr_2(int irqno, void *param)
{
/* get lpc serial device */
rt_hw_uart_isr(&serial2);
@ -153,13 +153,15 @@ static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
if (lpc_serial->irqno == UART0_INT)
{
#ifdef RT_USING_UART1
rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_1, RT_NULL);
rt_hw_interrupt_install(lpc_serial->irqno,
rt_hw_uart_isr_1, &serial1, "UART1");
#endif
}
else
{
#ifdef RT_USING_UART2
rt_hw_interrupt_install(lpc_serial->irqno, rt_hw_uart_isr_2, RT_NULL);
rt_hw_interrupt_install(lpc_serial->irqno,
rt_hw_uart_isr_2, &serial2, "UART2");
#endif
}
@ -173,7 +175,7 @@ static rt_err_t rt_serial_close(rt_device_t dev)
{
struct rt_lpcserial* lpc_serial;
lpc_serial = (struct rt_lpcserial*) dev;
RT_ASSERT(lpc_serial != RT_NULL);
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
@ -244,7 +246,7 @@ static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_
{
/* Read Character */
*ptr = UART_RBR(lpc_serial->hw_base);
ptr ++;
size --;
}
@ -271,7 +273,7 @@ static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buff
/* polling write */
ptr = (char *)buffer;
if (dev->flag & RT_DEVICE_FLAG_STREAM)
{
/* stream mode */
@ -285,7 +287,7 @@ static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buff
while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
UART_THR(lpc_serial->hw_base) = *ptr;
ptr ++;
size --;
}
@ -296,37 +298,37 @@ static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buff
{
while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
UART_THR(lpc_serial->hw_base) = *ptr;
ptr ++;
size --;
}
}
return (rt_size_t) ptr - (rt_size_t) buffer;
}
void rt_hw_serial_init(void)
{
struct rt_lpcserial* lpc_serial;
#ifdef RT_USING_UART1
lpc_serial = &serial1;
lpc_serial->parent.type = RT_Device_Class_Char;
lpc_serial->hw_base = 0xE000C000;
lpc_serial->baudrate = 115200;
lpc_serial->irqno = UART0_INT;
rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
lpc_serial->read_index = lpc_serial->save_index = 0;
/* Enable UART0 RxD and TxD pins */
PINSEL0 |= 0x05;
PINSEL0 |= 0x05;
/* 8 bits, no Parity, 1 Stop bit */
UART_LCR(lpc_serial->hw_base) = 0x83;
/* Setup Baudrate */
UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
@ -334,6 +336,7 @@ void rt_hw_serial_init(void)
/* DLAB = 0 */
UART_LCR(lpc_serial->hw_base) = 0x03;
lpc_serial->parent.type = RT_Device_Class_Char;
lpc_serial->parent.init = rt_serial_init;
lpc_serial->parent.open = rt_serial_open;
lpc_serial->parent.close = rt_serial_close;
@ -342,13 +345,13 @@ void rt_hw_serial_init(void)
lpc_serial->parent.control = rt_serial_control;
lpc_serial->parent.user_data = RT_NULL;
rt_device_register(&lpc_serial->parent,
rt_device_register(&lpc_serial->parent,
"uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
#endif
#ifdef RT_USING_UART2
lpc_serial = &serial2;
lpc_serial->parent.type = RT_Device_Class_Char;
lpc_serial->hw_base = 0xE0010000;
@ -363,7 +366,7 @@ void rt_hw_serial_init(void)
/* 8 bits, no Parity, 1 Stop bit */
UART_LCR(lpc_serial->hw_base) = 0x83;
/* Setup Baudrate */
UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
@ -371,6 +374,7 @@ void rt_hw_serial_init(void)
/* DLAB = 0 */
UART_LCR(lpc_serial->hw_base) = 0x03;
lpc_serial->parent.type = RT_Device_Class_Char;
lpc_serial->parent.init = rt_serial_init;
lpc_serial->parent.open = rt_serial_open;
lpc_serial->parent.close = rt_serial_close;
@ -379,7 +383,7 @@ void rt_hw_serial_init(void)
lpc_serial->parent.control = rt_serial_control;
lpc_serial->parent.user_data = RT_NULL;
rt_device_register(&lpc_serial->parent,
rt_device_register(&lpc_serial->parent,
"uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
#endif
}

70
libcpu/arm/lpc214x/cpuport.c
View File

@ -10,9 +10,11 @@
* Change Logs:
* Date Author Notes
* 2011-06-15 aozima the first version for lpc214x
* 2013-03-29 aozima Modify the interrupt interface implementations.
*/
#include <rtthread.h>
#include <rthw.h>
#include "lpc214x.h"
#define MAX_HANDLERS 32
@ -20,6 +22,9 @@
extern rt_uint32_t rt_interrupt_nest;
/* exception and interrupt handler table */
struct rt_irq_desc irq_desc[MAX_HANDLERS];
/**
* @addtogroup LPC214x
*/
@ -71,7 +76,7 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;
void rt_hw_interrupt_handler(int vector)
void rt_hw_interrupt_handler(int vector, void *param)
{
rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
}
@ -79,7 +84,7 @@ void rt_hw_interrupt_handler(int vector)
/**
* This function will initialize hardware interrupt
*/
void rt_hw_interrupt_init()
void rt_hw_interrupt_init(void)
{
rt_base_t index;
rt_uint32_t *vect_addr, *vect_ctl;
@ -90,12 +95,15 @@ void rt_hw_interrupt_init()
/* set all to IRQ */
VICIntSelect = 0;
rt_memset(irq_desc, 0x00, sizeof(irq_desc));
for (index = 0; index < MAX_HANDLERS; index ++)
{
irq_desc[index].handler = rt_hw_interrupt_handler;
vect_addr = (rt_uint32_t *)(VIC_BASE_ADDR + 0x100 + (index << 2));
vect_ctl = (rt_uint32_t *)(VIC_BASE_ADDR + 0x200 + (index << 2));
*vect_addr = (rt_uint32_t)rt_hw_interrupt_handler;
*vect_addr = (rt_uint32_t)&irq_desc[index];
*vect_ctl = 0xF;
}
@ -127,30 +135,39 @@ void rt_hw_interrupt_umask(int vector)
/**
* This function will install a interrupt service routine to a interrupt.
* @param vector the interrupt number
* @param new_handler the interrupt service routine to be installed
* @param old_handler the old interrupt service routine
* @param handler the interrupt service routine to be installed
* @param param the interrupt service function parameter
* @param name the interrupt name
* @return old handler
*/
void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_handler_t *old_handler)
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
void *param, char *name)
{
if(vector >= 0 && vector < MAX_HANDLERS)
{
/* get VIC address */
rt_uint32_t* vect_addr = (rt_uint32_t *)(VIC_BASE_ADDR + 0x100 + (vector << 2));
rt_uint32_t* vect_ctl = (rt_uint32_t *)(VIC_BASE_ADDR + 0x200 + (vector << 2));
rt_isr_handler_t old_handler = RT_NULL;
/* assign IRQ slot and enable this slot */
*vect_ctl = 0x20 | (vector & 0x1F);
if(vector >= 0 && vector < MAX_HANDLERS)
{
rt_uint32_t* vect_ctl = (rt_uint32_t *)(VIC_BASE_ADDR + 0x200 + (vector << 2));
if (old_handler != RT_NULL) *old_handler = (rt_isr_handler_t) *vect_addr;
if (new_handler != RT_NULL) *vect_addr = (rt_uint32_t) new_handler;
}
/* assign IRQ slot and enable this slot */
*vect_ctl = 0x20 | (vector & 0x1F);
old_handler = irq_desc[vector].handler;
if (handler != RT_NULL)
{
irq_desc[vector].handler = handler;
irq_desc[vector].param = param;
}
}
return old_handler;
}
/**
* this function will reset CPU
*
*/
void rt_hw_cpu_reset()
void rt_hw_cpu_reset(void)
{
}
@ -165,18 +182,23 @@ void rt_hw_cpu_shutdown()
while (1);
}
void rt_hw_trap_irq()
void rt_hw_trap_irq(void)
{
rt_isr_handler_t isr_func;
int irqno;
struct rt_irq_desc* irq;
extern struct rt_irq_desc irq_desc[];
isr_func = (rt_isr_handler_t) VICVectAddr;
isr_func(0);
irq = (struct rt_irq_desc*) VICVectAddr;
irqno = ((rt_uint32_t) irq - (rt_uint32_t) &irq_desc[0])/sizeof(struct rt_irq_desc);
/* acknowledge Interrupt */
// VICVectAddr = 0;
/* invoke isr */
irq->handler(irqno, irq->param);
/* acknowledge Interrupt */
// VICVectAddr = 0;
}
void rt_hw_trap_fiq()
void rt_hw_trap_fiq(void)
{
rt_kprintf("fast interrupt request\n");
}