更新瑞萨相关 bsp (#7858)

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guo 2023-07-25 14:55:11 +08:00 committed by GitHub
parent acfa74f078
commit 14d15404d8
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GPG Key ID: 4AEE18F83AFDEB23
60 changed files with 6467 additions and 1142 deletions

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@ -189,8 +189,10 @@ jobs:
- "lpc176x"
- "xplorer4330/M4"
#- "lpc43xx/M4"
- "renesas/ra6m3-ek"
- "renesas/ebf_qi_min_6m5"
- "renesas/ra6m4-cpk"
- "renesas/ra6m4-iot"
- "renesas/ra6m3-ek"
- "renesas/ra6m3-hmi-board"
- "renesas/ra4m2-eco"
- "renesas/ra2l1-cpk"

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@ -3,15 +3,18 @@
RA 系列 BSP 目前支持情况如下表所示:
| **BSP 文件夹名称** | **开发板名称** |
|:------------------------- |:-------------------------- |
| **RA6 系列** | |
| [ra6m4-cpk](ra6m4-cpk) | Renesas 官方 CPK-RA6M4 开发板 |
| [ra6m4-iot](ra6m4-iot) | Renesas 官方 IOT-RA6M4 开发板 |
| [ra6m3-ek](ra6m3-ek) | Renesas 官方 RA6M3-EK 开发板 |
| **BSP 文件夹名称** | **开发板名称** |
| :--------------------------------- | :-------------------------------------------- |
| **RA6 系列** | |
| [ebf_qi_min_6m5](ebf_qi_min_6m5) | 野火 启明6 开发板 |
| [ra6m4-cpk](ra6m4-cpk) | Renesas 官方 CPK-RA6M4 开发板 |
| [ra6m4-iot](ra6m4-iot) | Renesas 官方 IOT-RA6M4 开发板 |
| [ra6m3-ek](ra6m3-ek) | Renesas 官方 RA6M3-EK 开发板 |
| [ra6m3-hmi-board](ra6m3-hmi-board) | Renesas 联合 RT-Thread RA6M3-HMI-Board 开发板 |
| **RA4 系列** | |
| [ra4m2-eco](ra4m2-eco) | Renesas 官方 RA-Eco-RA4M2 开发板 |
| **RA2 系列** | |
| [ra2l1-cpk](ra2l1-cpk) | Renesas 官方 CPK-RA2L1 开发板 |
| [ra2l1-cpk](ra2l1-cpk) | Renesas 官方 CPK-RA2L1 开发板 |
可以通过阅读相应 BSP 下的 README 来快速上手,如果想要使用 BSP 更多功能可参考 docs 文件夹下提供的说明文档,如下表所示:
@ -20,6 +23,8 @@ RA 系列 BSP 目前支持情况如下表所示:
| [外设驱动使用教程](docs/RA系列BSP外设驱动使用教程.md) | 讲解 BSP 上更多外设驱动的使用方法 |
| [外设驱动介绍与应用](docs/RA系列驱动介绍.md) | 讲解 RA 系列 BSP 驱动的支持情况,以及如何利用驱动框架开发应用程序 |
| [使用 FSP 配置外设驱动](docs/RA系列使用FSP配置外设驱动.md) | 介绍如何使用 FSP 工具添加和配置外设 |
| [瑞萨RA2L1开发实践指南](https://docs.qq.com/doc/DQktJWmpBZkNiTnh6) | 介绍基于 RA2L1 如何添加和配置外设 |
| [瑞萨RA6m3开发实践指南](https://docs.qq.com/doc/DQmVYUEN1dHVyd0hi) | 介绍基于 RA6M3 如何添加和配置外设 |
| **BSP 制作与提交** | **简介** |
| [BSP 制作教程](docs/RA系列BSP制作教程.md) | 讲解 RA 系列 BSP 的制作方法,以及在制作 BSP 和提交 BSP 时应当遵守的规范 |
| [外设驱动添加指南](docs/RA系列外设驱动添加指南.md) | 讲解 BSP 添加更多设备驱动的方法 |

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@ -9,6 +9,7 @@
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMART is not set
# CONFIG_RT_USING_AMP is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=8
# CONFIG_RT_THREAD_PRIORITY_8 is not set
@ -33,18 +34,10 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
CONFIG_RT_USING_DEBUG=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
CONFIG_RT_DEBUGING_INIT=y
#
# Inter-Thread communication
@ -54,12 +47,12 @@ CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_PAGE_MAX_ORDER=11
# CONFIG_RT_USING_MEMPOOL is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
@ -83,7 +76,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
CONFIG_RT_VER_NUM=0x50000
CONFIG_RT_VER_NUM=0x50001
# CONFIG_RT_USING_STDC_ATOMIC is not set
# CONFIG_RT_USING_CACHE is not set
CONFIG_RT_USING_HW_ATOMIC=y
@ -117,6 +110,10 @@ CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
#
# DFS: device virtual file system
#
# CONFIG_RT_USING_DFS is not set
# CONFIG_RT_USING_FAL is not set
@ -210,9 +207,11 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RESOURCE_ID is not set
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_VBUS is not set
# CONFIG_RT_USING_KTIME is not set
#
# RT-Thread Utestcases
@ -237,7 +236,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
@ -508,6 +506,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_QPC is not set
# CONFIG_PKG_USING_AGILE_UPGRADE is not set
# CONFIG_PKG_USING_FLASH_BLOB is not set
# CONFIG_PKG_USING_MLIBC is not set
#
# peripheral libraries and drivers
@ -592,6 +591,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_FT5426 is not set
# CONFIG_PKG_USING_FT6236 is not set
# CONFIG_PKG_USING_XPT2046_TOUCH is not set
# CONFIG_PKG_USING_CST816X is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ESP_IDF is not set
@ -604,7 +604,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
#
# Kendryte SDK
@ -662,14 +661,17 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_RFM300 is not set
# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
# CONFIG_PKG_USING_AIP650 is not set
# CONFIG_PKG_USING_FINGERPRINT is not set
# CONFIG_PKG_USING_BT_ECB02C is not set
# CONFIG_PKG_USING_UAT is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
#
# AI packages
@ -688,7 +690,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# Signal Processing and Control Algorithm Packages
#
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_KISSFFT is not set
#
# miscellaneous packages
@ -735,7 +740,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
@ -760,8 +764,9 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_RTDUINO is not set
#
# Projects
# Projects and Demos
#
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
@ -908,14 +913,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# Display
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
# CONFIG_PKG_USING_ARDUINO_U8GLIB_ARDUINO is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
# CONFIG_PKG_USING_SEEED_TM1637 is not set
#
# Timing
#
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
# CONFIG_PKG_USING_ARDUINO_TICKER is not set
# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
#
# Data Processing
@ -995,6 +1005,9 @@ CONFIG_BSP_USING_UART4=y
# CONFIG_BSP_UART4_TX_USING_DMA is not set
CONFIG_BSP_UART4_RX_BUFSIZE=256
CONFIG_BSP_UART4_TX_BUFSIZE=0
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_SCI_SPI is not set
# CONFIG_BSP_USING_SPI is not set
#
# Board extended module Drivers

View File

@ -21,6 +21,7 @@ DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

View File

@ -1,180 +1,745 @@
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</DebugOpt>
<TargetDriverDllRegistry>
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<Key>JL2CM3</Key>
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</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
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<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
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<TrcWin>0</TrcWin>
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<uProt>0</uProt>
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<pMisraName></pMisraName>
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<PackID>Renesas.RA_DFP.4.4.0</PackID>
<PackURL>https://www2.renesas.eu/Keil_MDK_Packs/</PackURL>
<Cpu>CPUTYPE("Cortex-M33") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec />
<StartupFile />
<FlashDriverDll />
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile />
<MemoryEnv />
<Cmp />
<Asm />
<Linker />
<OHString />
<InfinionOptionDll />
<SLE66CMisc />
<SLE66AMisc />
<SLE66LinkerMisc />
<SFDFile />
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:R7FA6M5BH$SVD\R7FA6M5BH.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath />
<IncludePath />
<LibPath />
<RegisterFilePath />
<DBRegisterFilePath />
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
@ -58,8 +62,8 @@
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
@ -68,8 +72,8 @@
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
@ -79,14 +83,14 @@
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>cmd /c "start "Renesas" /w cmd /c ""$Slauncher\rasc_launcher.bat" "3.5.0" --gensecurebundle --compiler ARMv6 "$Pconfiguration.xml" "$L%L" 2&gt; "%%TEMP%%\rasc_stderr.out"""</UserProg1Name>
<UserProg2Name />
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>2</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString />
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
@ -100,8 +104,8 @@
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument />
<IncludeLibraryModules />
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
@ -125,20 +129,20 @@
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>0</UseTargetDll>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>-1</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2 />
<Flash2></Flash2>
<Flash3>"" ()</Flash3>
<Flash4 />
<pFcarmOut />
<pFcarmGrp />
<pFcArmRoot />
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
@ -171,7 +175,7 @@
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M33"</AdsCpuType>
<RvctDeviceName />
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
@ -182,6 +186,7 @@
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<nBranchProt>0</nBranchProt>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>0</StupSel>
@ -305,7 +310,7 @@
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector />
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
@ -318,7 +323,7 @@
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<wLevel>3</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
@ -333,9 +338,9 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>-Wno-license-management -Wunused -Wuninitialized -Wall -Wextra -Wmissing-declarations -Wconversion -Wpointer-arith -Wshadow -Waggregate-return -Wfloat-equal</MiscControls>
<Define>RT_USING_LIBC, RT_USING_ARMLIBC, __STDC_LIMIT_MACROS, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define>
<Undefine />
<IncludePath>..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\include;board\ports;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\poll;..\..\..\libcpu\arm\cortex-m4;..\libraries\HAL_Drivers\config;..\..\..\components\libc\compilers\common\include;..\libraries\HAL_Drivers;board;..\..\..\components\drivers\include;..\..\..\components\libc\posix\ipc;..\..\..\components\finsh;..\..\..\libcpu\arm\common;..\..\..\components\drivers\include;.</IncludePath>
<Define>__RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_LIBC, __STDC_LIMIT_MACROS, RT_USING_ARMLIBC</Define>
<Undefine></Undefine>
<IncludePath>board;..\..\..\components\finsh;board\ports;..\libraries\HAL_Drivers;..\..\..\components\drivers\include;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\components\libc\posix\io\poll;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m4;.;..\..\..\components\libc\posix\io\stdio;..\..\..\include</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -350,10 +355,10 @@
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls />
<Define />
<Undefine />
<IncludePath />
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -363,14 +368,14 @@
<noStLib>0</noStLib>
<RepFail>0</RepFail>
<useFile>0</useFile>
<TextAddressRange />
<DataAddressRange />
<pXoBase />
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\script\fsp.scat</ScatterFile>
<IncludeLibs />
<IncludeLibsPath />
<Misc />
<LinkerInputFile />
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings>6319,6314</DisabledWarnings>
</LDads>
</TargetArmAds>
@ -384,50 +389,36 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>syscalls.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cctype.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cctype.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstdio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstdio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstdlib.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstdlib.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstring.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstring.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ctime.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\ctime.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cwchar.c</FileName>
<FileType>1</FileType>
@ -443,29 +434,21 @@
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\atomic_arm.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
@ -476,62 +459,51 @@
<Group>
<GroupName>DeviceDrivers</GroupName>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\core\device.c</FilePath>
</File>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringblk_buf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>waitqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\workqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pin.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>serial_v2.c</FileName>
<FileType>1</FileType>
@ -547,51 +519,164 @@
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
</Files>
<Files>
<File>
<FileName>drv_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
</Files>
<Files>
<File>
<FileName>drv_usart_v2.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_usart_v2.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
@ -602,31 +687,25 @@
<Group>
<GroupName>Finsh</GroupName>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh_parse.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
</Files>
</Group>
@ -638,78 +717,51 @@
<FileType>1</FileType>
<FilePath>..\..\..\src\clock.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\device.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\idle.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\ipc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\irq.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\kservice.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\object.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>scheduler_up.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\scheduler_up.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\thread.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
@ -717,26 +769,41 @@
</File>
</Files>
</Group>
<Group>
<GroupName>:Renesas RA Smart Configurator:Common Sources</GroupName>
<Files>
<File>
<FileName>hal_entry.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\hal_entry.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::Flex Software</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<gpdscs>
<gpdsc name="buildinfo.gpdsc">
<targetInfos>
<targetInfo name="Target 1" />
<targetInfo name="Target 1"/>
</targetInfos>
</gpdsc>
</gpdscs>
<apis />
<apis/>
<components>
<component Cclass="Flex Software" Cgroup="RA Configuration" Cvendor="Renesas" Cversion="1.0.0" condition="RA Device" generator="Renesas RA Smart Configurator">
<package name="RA_DFP" schemaVersion="1.6.0" url="www.renesas.com/RA/MDK_pack/" vendor="Renesas" version="3.5.0" />
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.4.0"/>
<targetInfos>
<targetInfo name="Target 1" />
<targetInfo name="Target 1"/>
</targetInfos>
</component>
</components>
<files />
<files/>
</RTE>
</Project>

View File

@ -23,8 +23,10 @@
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */
@ -36,7 +38,6 @@
/* Memory Management */
#define RT_PAGE_MAX_ORDER 11
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
@ -47,7 +48,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart4"
#define RT_VER_NUM 0x50000
#define RT_VER_NUM 0x50001
#define RT_USING_HW_ATOMIC
#define RT_USING_CPU_FFS
#define ARCH_ARM
@ -74,6 +75,9 @@
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* DFS: device virtual file system */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
@ -190,7 +194,7 @@
/* Arduino libraries */
/* Projects */
/* Projects and Demos */
/* Sensors */

View File

@ -56,6 +56,7 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -Os'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
# POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

View File

@ -34,18 +34,10 @@ CONFIG_RT_KSERVICE_USING_STDLIB=y
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT is not set
# CONFIG_RT_DEBUG_THREAD is not set
# CONFIG_RT_DEBUG_SCHEDULER is not set
# CONFIG_RT_DEBUG_IPC is not set
# CONFIG_RT_DEBUG_TIMER is not set
# CONFIG_RT_DEBUG_IRQ is not set
# CONFIG_RT_DEBUG_MEM is not set
# CONFIG_RT_DEBUG_SLAB is not set
# CONFIG_RT_DEBUG_MEMHEAP is not set
# CONFIG_RT_DEBUG_MODULE is not set
CONFIG_RT_USING_DEBUG=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
CONFIG_RT_DEBUGING_INIT=y
#
# Inter-Thread communication
@ -134,6 +126,7 @@ CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
# CONFIG_RT_USING_DFS_CROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_TMPFS is not set
# CONFIG_RT_USING_DFS_MQUEUE is not set
# CONFIG_RT_USING_FAL is not set
#
@ -226,10 +219,11 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RESOURCE_ID is not set
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_VBUS is not set
# CONFIG_RT_USING_KTIME is not set
#
# RT-Thread Utestcases

View File

@ -21,6 +21,7 @@ DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

View File

@ -135,7 +135,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>d</Name>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -149,7 +149,7 @@
<Type>0</Type>
<LineNumber>43</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>9320</Address>
<Address>2612</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
@ -323,18 +323,6 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\libcpu\arm\common\backtrace.c</PathWithFileName>
<FilenameWithoutPath>backtrace.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>10</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\libcpu\arm\common\div0.c</PathWithFileName>
<FilenameWithoutPath>div0.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@ -342,7 +330,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>11</FileNumber>
<FileNumber>10</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -354,7 +342,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>12</FileNumber>
<FileNumber>11</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -366,7 +354,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>13</FileNumber>
<FileNumber>12</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -384,6 +372,18 @@
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>13</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\drivers\core\device.c</PathWithFileName>
<FilenameWithoutPath>device.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>14</FileNumber>
@ -487,30 +487,6 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\drivers\pm\lptimer.c</PathWithFileName>
<FilenameWithoutPath>lptimer.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>23</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\drivers\pm\pm.c</PathWithFileName>
<FilenameWithoutPath>pm.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>24</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\drivers\serial\serial_v2.c</PathWithFileName>
<FilenameWithoutPath>serial_v2.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@ -520,13 +496,13 @@
<Group>
<GroupName>Drivers</GroupName>
<tvExp>1</tvExp>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>25</FileNumber>
<FileNumber>23</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -538,7 +514,7 @@
</File>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>26</FileNumber>
<FileNumber>24</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -550,7 +526,7 @@
</File>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>27</FileNumber>
<FileNumber>25</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -563,11 +539,35 @@
</Group>
<Group>
<GroupName>Finsh</GroupName>
<GroupName>Filesystem</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>5</GroupNumber>
<FileNumber>26</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\dfs\dfs_v1\src\dfs_posix.c</PathWithFileName>
<FilenameWithoutPath>dfs_posix.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>5</GroupNumber>
<FileNumber>27</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\dfs\dfs_v1\src\dfs_fs.c</PathWithFileName>
<FilenameWithoutPath>dfs_fs.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>5</GroupNumber>
<FileNumber>28</FileNumber>
@ -575,8 +575,8 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\shell.c</PathWithFileName>
<FilenameWithoutPath>shell.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\dfs\dfs_v1\src\dfs.c</PathWithFileName>
<FilenameWithoutPath>dfs.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
@ -587,25 +587,33 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\msh.c</PathWithFileName>
<FilenameWithoutPath>msh.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\dfs\dfs_v1\src\dfs_file.c</PathWithFileName>
<FilenameWithoutPath>dfs_file.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>Finsh</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>5</GroupNumber>
<GroupNumber>6</GroupNumber>
<FileNumber>30</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\msh_parse.c</PathWithFileName>
<FilenameWithoutPath>msh_parse.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\finsh\shell.c</PathWithFileName>
<FilenameWithoutPath>shell.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>5</GroupNumber>
<GroupNumber>6</GroupNumber>
<FileNumber>31</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
@ -616,6 +624,42 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>32</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\msh.c</PathWithFileName>
<FilenameWithoutPath>msh.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>33</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\msh_file.c</PathWithFileName>
<FilenameWithoutPath>msh_file.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>34</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\msh_parse.c</PathWithFileName>
<FilenameWithoutPath>msh_parse.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
@ -625,8 +669,8 @@
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>32</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>35</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -637,8 +681,8 @@
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>33</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>36</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -649,20 +693,8 @@
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>34</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\src\device.c</PathWithFileName>
<FilenameWithoutPath>device.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>35</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>37</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -673,8 +705,8 @@
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>36</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>38</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -685,8 +717,8 @@
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>37</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>39</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -697,8 +729,8 @@
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>38</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>40</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -709,8 +741,8 @@
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>39</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>41</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -721,8 +753,20 @@
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>40</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>42</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\src\mempool.c</PathWithFileName>
<FilenameWithoutPath>mempool.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>7</GroupNumber>
<FileNumber>43</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -733,20 +777,20 @@
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>41</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>44</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\src\scheduler.c</PathWithFileName>
<FilenameWithoutPath>scheduler.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\src\scheduler_up.c</PathWithFileName>
<FilenameWithoutPath>scheduler_up.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>42</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>45</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -757,8 +801,8 @@
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>43</FileNumber>
<GroupNumber>7</GroupNumber>
<FileNumber>46</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -777,8 +821,8 @@
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>7</GroupNumber>
<FileNumber>44</FileNumber>
<GroupNumber>8</GroupNumber>
<FileNumber>47</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>

View File

@ -10,13 +10,13 @@
<TargetName>Target 1</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
<pCCUsed>6190000::V6.19::ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>R7FA2L1AB2DFM</Device>
<Vendor>Renesas</Vendor>
<PackID>Renesas.RA_DFP.3.1.0</PackID>
<PackID>Renesas.RA_DFP.3.6.0</PackID>
<PackURL>https://www2.renesas.eu/Keil_MDK_Packs/</PackURL>
<Cpu>CPUTYPE("Cortex-M23") CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@ -186,6 +186,7 @@
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<nBranchProt>0</nBranchProt>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>0</StupSel>
@ -337,9 +338,9 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>-Wno-license-management -Wunused -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal</MiscControls>
<Define>RT_USING_LIBC, __RTTHREAD__, __STDC_LIMIT_MACROS, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND</Define>
<Define>RT_USING_LIBC, __STDC_LIMIT_MACROS, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_ARMLIBC, __RTTHREAD__</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m23;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\ports;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc;ra_cfg\fsp_cfg;ra_cfg\fsp_cfg\bsp</IncludePath>
<IncludePath>..\..\..\components\libc\posix\io\stdio;..\..\..\components\dfs\dfs_v1\include;ra_cfg\fsp_cfg;..\..\..\components\libc\compilers\common\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\HAL_Drivers\config;..\..\..\components\libc\posix\ipc;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;.;board\ports;ra_cfg\fsp_cfg\bsp;..\libraries\HAL_Drivers;..\..\..\libcpu\arm\cortex-m23;board;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\poll;..\..\..\include;..\..\..\libcpu\arm\common;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension\fcntl\octal</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -428,11 +429,6 @@
<Group>
<GroupName>CPU</GroupName>
<Files>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
@ -458,6 +454,11 @@
<Group>
<GroupName>DeviceDrivers</GroupName>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\core\device.c</FilePath>
</File>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
@ -498,16 +499,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
<File>
<FileName>lptimer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\pm\lptimer.c</FilePath>
</File>
<File>
<FileName>pm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\pm\pm.c</FilePath>
</File>
<File>
<FileName>serial_v2.c</FileName>
<FileType>1</FileType>
@ -688,6 +679,31 @@
</File>
</Files>
</Group>
<Group>
<GroupName>Filesystem</GroupName>
<Files>
<File>
<FileName>dfs_posix.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\dfs_v1\src\dfs_posix.c</FilePath>
</File>
<File>
<FileName>dfs_fs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\dfs_v1\src\dfs_fs.c</FilePath>
</File>
<File>
<FileName>dfs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\dfs_v1\src\dfs.c</FilePath>
</File>
<File>
<FileName>dfs_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\dfs_v1\src\dfs_file.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Finsh</GroupName>
<Files>
@ -696,21 +712,26 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
<File>
<FileName>msh_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_file.c</FilePath>
</File>
<File>
<FileName>msh_parse.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
</File>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
</Files>
</Group>
<Group>
@ -726,11 +747,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\device.c</FilePath>
</File>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
@ -756,15 +772,20 @@
<FileType>1</FileType>
<FilePath>..\..\..\src\mem.c</FilePath>
</File>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mempool.c</FilePath>
</File>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\object.c</FilePath>
</File>
<File>
<FileName>scheduler.c</FileName>
<FileName>scheduler_up.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\scheduler.c</FilePath>
<FilePath>..\..\..\src\scheduler_up.c</FilePath>
</File>
<File>
<FileName>thread.c</FileName>
@ -806,7 +827,7 @@
<apis/>
<components>
<component Cclass="Flex Software" Cgroup="RA Configuration" Cvendor="Renesas" Cversion="1.0.0" condition="RA Device" generator="Renesas RA Smart Configurator">
<package name="RA_DFP" schemaVersion="1.6.0" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="3.1.0"/>
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.4.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>

View File

@ -24,7 +24,10 @@
/* kservice optimization */
#define RT_KSERVICE_USING_STDLIB
#define RT_DEBUG
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */

View File

@ -56,6 +56,7 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -Os'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
# POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

View File

@ -9,6 +9,7 @@
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMART is not set
# CONFIG_RT_USING_AMP is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=8
# CONFIG_RT_THREAD_PRIORITY_8 is not set
@ -33,18 +34,10 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
CONFIG_RT_USING_DEBUG=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
CONFIG_RT_DEBUGING_INIT=y
#
# Inter-Thread communication
@ -54,12 +47,12 @@ CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_PAGE_MAX_ORDER=11
# CONFIG_RT_USING_MEMPOOL is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
@ -83,7 +76,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
CONFIG_RT_VER_NUM=0x50000
CONFIG_RT_VER_NUM=0x50001
# CONFIG_RT_USING_STDC_ATOMIC is not set
# CONFIG_RT_USING_CACHE is not set
CONFIG_RT_USING_HW_ATOMIC=y
@ -117,19 +110,26 @@ CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
#
# DFS: device virtual file system
#
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_POSIX=y
CONFIG_DFS_USING_WORKDIR=y
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_DFS_FD_MAX=16
CONFIG_RT_USING_DFS_V1=y
# CONFIG_RT_USING_DFS_V2 is not set
CONFIG_DFS_FILESYSTEMS_MAX=4
CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
CONFIG_DFS_FD_MAX=16
# CONFIG_RT_USING_DFS_MNTTABLE is not set
# CONFIG_RT_USING_DFS_ELMFAT is not set
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_CROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_TMPFS is not set
# CONFIG_RT_USING_DFS_MQUEUE is not set
# CONFIG_RT_USING_FAL is not set
#
@ -228,9 +228,11 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RESOURCE_ID is not set
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_VBUS is not set
# CONFIG_RT_USING_KTIME is not set
#
# RT-Thread Utestcases
@ -255,7 +257,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
@ -456,6 +457,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_HASH_MATCH is not set
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
# CONFIG_PKG_USING_VOFA_PLUS is not set
# CONFIG_PKG_USING_RT_TRACE is not set
#
# system packages
@ -527,6 +529,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_QPC is not set
# CONFIG_PKG_USING_AGILE_UPGRADE is not set
# CONFIG_PKG_USING_FLASH_BLOB is not set
# CONFIG_PKG_USING_MLIBC is not set
#
# peripheral libraries and drivers
@ -611,6 +614,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_FT5426 is not set
# CONFIG_PKG_USING_FT6236 is not set
# CONFIG_PKG_USING_XPT2046_TOUCH is not set
# CONFIG_PKG_USING_CST816X is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ESP_IDF is not set
@ -623,7 +627,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
#
# Kendryte SDK
@ -681,14 +684,17 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_RFM300 is not set
# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
# CONFIG_PKG_USING_AIP650 is not set
# CONFIG_PKG_USING_FINGERPRINT is not set
# CONFIG_PKG_USING_BT_ECB02C is not set
# CONFIG_PKG_USING_UAT is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
#
# AI packages
@ -707,7 +713,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# Signal Processing and Control Algorithm Packages
#
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_KISSFFT is not set
#
# miscellaneous packages
@ -754,7 +763,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
@ -779,8 +787,9 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_RTDUINO is not set
#
# Projects
# Projects and Demos
#
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
@ -927,14 +936,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# Display
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
# CONFIG_PKG_USING_ARDUINO_U8GLIB_ARDUINO is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
# CONFIG_PKG_USING_SEEED_TM1637 is not set
#
# Timing
#
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
# CONFIG_PKG_USING_ARDUINO_TICKER is not set
# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
#
# Data Processing
@ -1023,10 +1037,14 @@ CONFIG_BSP_USING_UART4=y
CONFIG_BSP_UART4_RX_BUFSIZE=256
CONFIG_BSP_UART4_TX_BUFSIZE=0
# CONFIG_BSP_USING_UART9 is not set
CONFIG_BSP_USING_SPI=y
# CONFIG_BSP_USING_SPI0 is not set
# CONFIG_BSP_USING_SPI1 is not set
# CONFIG_BSP_USING_SCI_SPI is not set
# CONFIG_BSP_USING_SPI is not set
CONFIG_BSP_USING_SCI_SPI=y
# CONFIG_BSP_USING_SCI_SPI0 is not set
# CONFIG_BSP_USING_SCI_SPI1 is not set
# CONFIG_BSP_USING_SCI_SPI2 is not set
# CONFIG_BSP_USING_SCI_SPI3 is not set
# CONFIG_BSP_USING_SCI_SPI4 is not set
CONFIG_BSP_USING_SCI_SPI9=y
#
# Board extended module Drivers

View File

@ -16,6 +16,7 @@ elif rtconfig.PLATFORM in ['gcc', 'armclang']:
if GetOption('target') != 'mdk5':
CPPPATH = [cwd]
src = Glob('./src/*.c')
src += Glob('./src/*.cpp')
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)

View File

@ -21,6 +21,7 @@ DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

View File

@ -77,7 +77,7 @@
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>0</CpuCode>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
@ -170,28 +170,688 @@
</Target>
<Group>
<GroupName>Source Group 1</GroupName>
<GroupName>Compiler</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
</Group>
<Group>
<GroupName>:Renesas RA Smart Configurator:Common Sources</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\src\hal_entry.c</PathWithFileName>
<FilenameWithoutPath>hal_entry.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\libc\compilers\armlibc\syscall_mem.c</PathWithFileName>
<FilenameWithoutPath>syscall_mem.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
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<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
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<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
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<PathWithFileName>..\..\..\components\libc\compilers\armlibc\syscalls.c</PathWithFileName>
<FilenameWithoutPath>syscalls.c</FilenameWithoutPath>
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<FileNumber>3</FileNumber>
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<PathWithFileName>..\..\..\components\libc\compilers\common\cctype.c</PathWithFileName>
<FilenameWithoutPath>cctype.c</FilenameWithoutPath>
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<PathWithFileName>..\..\..\components\libc\compilers\common\cstdio.c</PathWithFileName>
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View File

@ -1,42 +1,46 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>Target 1</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>6190000::V6.19::ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>R7FA4M2AD</Device>
<Vendor>Renesas</Vendor>
<PackID>Renesas.RA_DFP.4.1.0</PackID>
<PackID>Renesas.RA_DFP.4.4.0</PackID>
<PackURL>https://www2.renesas.eu/Keil_MDK_Packs/</PackURL>
<Cpu>IRAM(0x20000000,0x020000) IROM(0x00000000,0x080000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec />
<StartupFile />
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC2000 -FN3 -FF0RA4M2_512K -FS00 -FL080000 -FF1RA4M2_DATA_C512K -FS18000000 -FL12000 -FF2RA4M2_CONF -FS2100A000 -FL2300 -FP0($$Device:R7FA4M2AD$Flash\RA4M2_512K.FLM) -FP1($$Device:R7FA4M2AD$Flash\RA4M2_DATA_C512K.FLM) -FP2($$Device:R7FA4M2AD$Flash\RA4M2_CONF.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile />
<MemoryEnv />
<Cmp />
<Asm />
<Linker />
<OHString />
<InfinionOptionDll />
<SLE66CMisc />
<SLE66AMisc />
<SLE66LinkerMisc />
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:R7FA4M2AD$SVD\R7FA4M2AD.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath />
<IncludePath />
<LibPath />
<RegisterFilePath />
<DBRegisterFilePath />
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
@ -58,8 +62,8 @@
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
@ -68,8 +72,8 @@
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
@ -79,14 +83,14 @@
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>cmd /c "start "Renesas" /w cmd /c ""$Slauncher\rasc_launcher.bat" "3.5.0" --gensecurebundle --compiler ARMv6 "$Pconfiguration.xml" "$L%L" 2&gt; "%%TEMP%%\rasc_stderr.out"""</UserProg1Name>
<UserProg2Name />
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>2</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString />
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
@ -100,15 +104,15 @@
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument />
<IncludeLibraryModules />
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName />
<SimDllArguments />
<SimDlgDll />
<SimDlgDllArguments />
<SimDllName></SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll></SimDlgDll>
<SimDlgDllArguments></SimDlgDllArguments>
<TargetDllName>SARMV8M.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
@ -134,11 +138,11 @@
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2V8M.DLL</Flash2>
<Flash3 />
<Flash4 />
<pFcarmOut />
<pFcarmGrp />
<pFcArmRoot />
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
@ -171,7 +175,7 @@
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M33"</AdsCpuType>
<RvctDeviceName />
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
@ -306,7 +310,7 @@
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector />
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
@ -334,9 +338,9 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>-Wno-license-management -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal</MiscControls>
<Define>RT_USING_LIBC, RT_USING_ARMLIBC, __STDC_LIMIT_MACROS, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define>
<Undefine />
<IncludePath>..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\include;board\ports;..\..\..\components\drivers\include;..\..\..\components\dfs\filesystems\devfs;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\dfs\include;..\..\..\components\libc\posix\io\poll;..\..\..\libcpu\arm\cortex-m4;..\libraries\HAL_Drivers\config;..\..\..\components\libc\compilers\common\include;..\libraries\HAL_Drivers;..\..\..\components\drivers\include;..\..\..\components\libc\posix\ipc;..\..\..\components\finsh;..\..\..\libcpu\arm\common;..\..\..\components\drivers\include;..\..\..\components\drivers\spi;.;..\..\..\components\libc\posix\io\stdio</IncludePath>
<Define>RT_USING_LIBC, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND, __STDC_LIMIT_MACROS, RT_USING_ARMLIBC</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\components\drivers\spi;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\posix\io\stdio;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\include;..\..\..\components\libc\compilers\common\extension;..\..\..\libcpu\arm\common;..\libraries\HAL_Drivers;board\ports;..\..\..\components\finsh;..\libraries\HAL_Drivers\config;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\poll;board;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\dfs\dfs_v1\filesystems\devfs;..\..\..\components\dfs\dfs_v1\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;.</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -351,10 +355,10 @@
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls />
<Define />
<Undefine />
<IncludePath />
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -364,14 +368,14 @@
<noStLib>0</noStLib>
<RepFail>0</RepFail>
<useFile>0</useFile>
<TextAddressRange />
<DataAddressRange />
<pXoBase />
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\script\fsp.scat</ScatterFile>
<IncludeLibs />
<IncludeLibsPath />
<Misc />
<LinkerInputFile />
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings>6319,6314</DisabledWarnings>
</LDads>
</TargetArmAds>
@ -385,50 +389,36 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>syscalls.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cctype.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cctype.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstdio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstdio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstdlib.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstdlib.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstring.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstring.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ctime.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\ctime.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cwchar.c</FileName>
<FileType>1</FileType>
@ -444,29 +434,21 @@
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\atomic_arm.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
@ -477,83 +459,66 @@
<Group>
<GroupName>DeviceDrivers</GroupName>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\core\device.c</FilePath>
</File>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringblk_buf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>waitqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\workqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pin.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>serial_v2.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\serial\serial_v2.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>spi_core.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\spi\spi_core.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>spi_dev.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\spi\spi_dev.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>spi_msd.c</FileName>
<FileType>1</FileType>
@ -569,70 +534,220 @@
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
</Files>
<Files>
<File>
<FileName>drv_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
</Files>
<Files>
<File>
<FileName>drv_spi.c</FileName>
<FileName>drv_sci_spi.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_spi.c</FilePath>
<FilePath>..\libraries\HAL_Drivers\drv_sci_spi.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
</Files>
<Files>
<File>
<FileName>drv_usart_v2.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_usart_v2.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
@ -646,35 +761,27 @@
<File>
<FileName>devfs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\filesystems\devfs\devfs.c</FilePath>
<FilePath>..\..\..\components\dfs\dfs_v1\filesystems\devfs\devfs.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\src\dfs.c</FilePath>
<FilePath>..\..\..\components\dfs\dfs_v1\src\dfs.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\src\dfs_file.c</FilePath>
<FilePath>..\..\..\components\dfs\dfs_v1\src\dfs_file.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs_fs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\src\dfs_fs.c</FilePath>
<FilePath>..\..\..\components\dfs\dfs_v1\src\dfs_fs.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs_posix.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\src\dfs_posix.c</FilePath>
<FilePath>..\..\..\components\dfs\dfs_v1\src\dfs_posix.c</FilePath>
</File>
</Files>
</Group>
@ -686,35 +793,27 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_file.c</FilePath>
</File>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh_parse.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_file.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Kernel</GroupName>
@ -724,78 +823,51 @@
<FileType>1</FileType>
<FilePath>..\..\..\src\clock.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\device.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\idle.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\ipc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\irq.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\kservice.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\object.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>scheduler_up.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\scheduler_up.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\thread.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
@ -803,26 +875,41 @@
</File>
</Files>
</Group>
<Group>
<GroupName>:Renesas RA Smart Configurator:Common Sources</GroupName>
<Files>
<File>
<FileName>hal_entry.cpp</FileName>
<FileType>8</FileType>
<FilePath>.\src\hal_entry.cpp</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::Flex Software</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<gpdscs>
<gpdsc name="buildinfo.gpdsc">
<targetInfos>
<targetInfo name="Target 1" />
<targetInfo name="Target 1"/>
</targetInfos>
</gpdsc>
</gpdscs>
<apis />
<apis/>
<components>
<component Cclass="Flex Software" Cgroup="RA Configuration" Cvendor="Renesas" Cversion="1.0.0" condition="RA Device" generator="Renesas RA Smart Configurator">
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.1.0" />
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.4.0"/>
<targetInfos>
<targetInfo name="Target 1" />
<targetInfo name="Target 1"/>
</targetInfos>
</component>
</components>
<files />
<files/>
</RTE>
</Project>

View File

@ -23,8 +23,10 @@
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */
@ -36,7 +38,6 @@
/* Memory Management */
#define RT_PAGE_MAX_ORDER 11
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
@ -47,7 +48,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart4"
#define RT_VER_NUM 0x50000
#define RT_VER_NUM 0x50001
#define RT_USING_HW_ATOMIC
#define RT_USING_CPU_FFS
#define ARCH_ARM
@ -73,12 +74,16 @@
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* DFS: device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FD_MAX 16
#define RT_USING_DFS_V1
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define DFS_FD_MAX 16
#define RT_USING_DFS_DEVFS
/* Device Drivers */
@ -199,7 +204,7 @@
/* Arduino libraries */
/* Projects */
/* Projects and Demos */
/* Sensors */
@ -249,7 +254,8 @@
#define BSP_USING_UART4
#define BSP_UART4_RX_BUFSIZE 256
#define BSP_UART4_TX_BUFSIZE 0
#define BSP_USING_SPI
#define BSP_USING_SCI_SPI
#define BSP_USING_SCI_SPI9
/* Board extended module Drivers */

View File

@ -57,6 +57,8 @@ if PLATFORM == 'gcc':
else:
CFLAGS += ' -Os'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
# POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

View File

@ -34,9 +34,10 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT is not set
CONFIG_RT_USING_DEBUG=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
CONFIG_RT_DEBUGING_INIT=y
#
# Inter-Thread communication
@ -210,6 +211,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_VBUS is not set
# CONFIG_RT_USING_KTIME is not set
#
# RT-Thread Utestcases

View File

@ -21,6 +21,7 @@ DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

View File

@ -531,8 +531,8 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\shell.c</PathWithFileName>
<FilenameWithoutPath>shell.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\finsh\msh_parse.c</PathWithFileName>
<FilenameWithoutPath>msh_parse.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
@ -555,8 +555,8 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\msh_parse.c</PathWithFileName>
<FilenameWithoutPath>msh_parse.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\finsh\cmd.c</PathWithFileName>
<FilenameWithoutPath>cmd.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
@ -567,8 +567,8 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\cmd.c</PathWithFileName>
<FilenameWithoutPath>cmd.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\finsh\shell.c</PathWithFileName>
<FilenameWithoutPath>shell.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>

View File

@ -10,13 +10,13 @@
<TargetName>Target 1</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
<pCCUsed>6190000::V6.19::ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>R7FA6M3AH</Device>
<Vendor>Renesas</Vendor>
<PackID>Renesas.RA_DFP.4.2.0</PackID>
<PackID>Renesas.RA_DFP.4.4.0</PackID>
<PackURL>https://www2.renesas.eu/Keil_MDK_Packs/</PackURL>
<Cpu>IRAM(0x1FFE0000,0x020000) IRAM2(0x20000000,0x080000) IROM(0x00000000,0x200000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@ -186,6 +186,7 @@
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<nBranchProt>0</nBranchProt>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
@ -337,9 +338,9 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>-Wno-license-management -Wunused -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal</MiscControls>
<Define>RT_USING_LIBC, RT_USING_ARMLIBC, __STDC_LIMIT_MACROS, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define>
<Define>__RTTHREAD__, RT_USING_LIBC, __STDC_LIMIT_MACROS, RT_USING_ARMLIBC, __CLK_TCK=RT_TICK_PER_SECOND</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\include;board;.;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\posix\io\stdio;..\..\..\components\finsh;..\libraries\HAL_Drivers\config;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\libcpu\arm\common;..\..\..\components\libc\posix\ipc;..\libraries\HAL_Drivers;board\ports;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m4;packages\ili9341-latest;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\compilers\common\include;..\..\..\components\drivers\include</IncludePath>
<IncludePath>..\libraries\HAL_Drivers;..\..\..\components\drivers\include;board;..\..\..\include;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\libcpu\arm\common;..\libraries\HAL_Drivers\config;..\..\..\components\drivers\include;..\..\..\components\finsh;board\ports;.;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\libc\posix\ipc;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\posix\io\poll</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -534,25 +535,25 @@
<GroupName>Finsh</GroupName>
<Files>
<File>
<FileName>shell.c</FileName>
<FileName>msh_parse.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
<FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
</File>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
<File>
<FileName>msh_parse.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
</File>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
</Files>
</Group>
<Group>
@ -643,7 +644,7 @@
<apis/>
<components>
<component Cclass="Flex Software" Cgroup="RA Configuration" Cvendor="Renesas" Cversion="1.0.0" condition="RA Device" generator="Renesas RA Smart Configurator">
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.2.0"/>
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.4.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>

View File

@ -23,8 +23,10 @@
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */

View File

@ -4,7 +4,7 @@ import sys
# toolchains options
ARCH='arm'
CPU='cortex-m4'
CROSS_TOOL='keil'
CROSS_TOOL='gcc'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
@ -56,6 +56,7 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -Os'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
# POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

View File

@ -34,9 +34,10 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT is not set
CONFIG_RT_USING_DEBUG=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
CONFIG_RT_DEBUGING_INIT=y
#
# Inter-Thread communication
@ -210,6 +211,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_VBUS is not set
# CONFIG_RT_USING_KTIME is not set
#
# RT-Thread Utestcases

View File

@ -21,6 +21,7 @@ DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

View File

@ -548,8 +548,8 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\shell.c</PathWithFileName>
<FilenameWithoutPath>shell.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\finsh\msh.c</PathWithFileName>
<FilenameWithoutPath>msh.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
@ -560,8 +560,8 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\msh.c</PathWithFileName>
<FilenameWithoutPath>msh.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\finsh\cmd.c</PathWithFileName>
<FilenameWithoutPath>cmd.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
@ -584,8 +584,8 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\finsh\cmd.c</PathWithFileName>
<FilenameWithoutPath>cmd.c</FilenameWithoutPath>
<PathWithFileName>..\..\..\components\finsh\shell.c</PathWithFileName>
<FilenameWithoutPath>shell.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>

View File

@ -10,13 +10,13 @@
<TargetName>Target 1</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
<pCCUsed>6190000::V6.19::ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>R7FA6M3AH</Device>
<Vendor>Renesas</Vendor>
<PackID>Renesas.RA_DFP.4.2.0</PackID>
<PackID>Renesas.RA_DFP.4.4.0</PackID>
<PackURL>https://www2.renesas.eu/Keil_MDK_Packs/</PackURL>
<Cpu>IRAM(0x1FFE0000,0x020000) IRAM2(0x20000000,0x080000) IROM(0x00000000,0x200000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@ -186,6 +186,7 @@
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<nBranchProt>0</nBranchProt>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
@ -337,9 +338,9 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>-Wno-license-management -Wunused -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal</MiscControls>
<Define>RT_USING_LIBC, RT_USING_ARMLIBC, __STDC_LIMIT_MACROS, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define>
<Define>__CLK_TCK=RT_TICK_PER_SECOND, RT_USING_ARMLIBC, __STDC_LIMIT_MACROS, RT_USING_LIBC, __RTTHREAD__</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\posix\io\stdio;..\libraries\HAL_Drivers\config;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\libcpu\arm\common;.;board\ports;board;..\libraries\HAL_Drivers;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\compilers\common\include;board\ports\wifi;..\..\..\components\drivers\include</IncludePath>
<IncludePath>..\..\..\components\drivers\include;board\ports\wifi;..\..\..\libcpu\arm\common;..\..\..\include;..\..\..\components\libc\posix\io\poll;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\stdio;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\finsh;..\..\..\components\libc\posix\ipc;..\libraries\HAL_Drivers;board;..\..\..\components\libc\compilers\common\include;..\libraries\HAL_Drivers\config;.;board\ports;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\compilers\common\extension</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -742,25 +743,25 @@
<Group>
<GroupName>Finsh</GroupName>
<Files>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>msh_parse.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
</File>
<File>
<FileName>cmd.c</FileName>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
</Files>
</Group>
@ -852,7 +853,7 @@
<apis/>
<components>
<component Cclass="Flex Software" Cgroup="RA Configuration" Cvendor="Renesas" Cversion="1.0.0" condition="RA Device" generator="Renesas RA Smart Configurator">
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.2.0"/>
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.4.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
@ -861,13 +862,4 @@
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>project</LayName>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

View File

@ -23,8 +23,10 @@
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */

View File

@ -59,6 +59,7 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -Os'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
# POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

View File

@ -9,6 +9,7 @@
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMART is not set
# CONFIG_RT_USING_AMP is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=8
# CONFIG_RT_THREAD_PRIORITY_8 is not set
@ -33,18 +34,10 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
CONFIG_RT_USING_DEBUG=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
CONFIG_RT_DEBUGING_INIT=y
#
# Inter-Thread communication
@ -54,12 +47,12 @@ CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_PAGE_MAX_ORDER=11
# CONFIG_RT_USING_MEMPOOL is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
@ -83,7 +76,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart7"
CONFIG_RT_VER_NUM=0x50000
CONFIG_RT_VER_NUM=0x50001
# CONFIG_RT_USING_STDC_ATOMIC is not set
# CONFIG_RT_USING_CACHE is not set
CONFIG_RT_USING_HW_ATOMIC=y
@ -117,6 +110,10 @@ CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
#
# DFS: device virtual file system
#
# CONFIG_RT_USING_DFS is not set
# CONFIG_RT_USING_FAL is not set
@ -148,7 +145,13 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_FDT is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_SPI_BITOPS is not set
# CONFIG_RT_USING_QSPI is not set
# CONFIG_RT_USING_SPI_MSD is not set
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
@ -210,9 +213,11 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RESOURCE_ID is not set
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_VBUS is not set
# CONFIG_RT_USING_KTIME is not set
#
# RT-Thread Utestcases
@ -237,7 +242,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
@ -438,6 +442,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_HASH_MATCH is not set
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
# CONFIG_PKG_USING_VOFA_PLUS is not set
# CONFIG_PKG_USING_RT_TRACE is not set
#
# system packages
@ -509,6 +514,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_QPC is not set
# CONFIG_PKG_USING_AGILE_UPGRADE is not set
# CONFIG_PKG_USING_FLASH_BLOB is not set
# CONFIG_PKG_USING_MLIBC is not set
#
# peripheral libraries and drivers
@ -593,6 +599,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_FT5426 is not set
# CONFIG_PKG_USING_FT6236 is not set
# CONFIG_PKG_USING_XPT2046_TOUCH is not set
# CONFIG_PKG_USING_CST816X is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ESP_IDF is not set
@ -605,7 +612,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
#
# Kendryte SDK
@ -663,14 +669,17 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_RFM300 is not set
# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
# CONFIG_PKG_USING_AIP650 is not set
# CONFIG_PKG_USING_FINGERPRINT is not set
# CONFIG_PKG_USING_BT_ECB02C is not set
# CONFIG_PKG_USING_UAT is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
#
# AI packages
@ -689,7 +698,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# Signal Processing and Control Algorithm Packages
#
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_KISSFFT is not set
#
# miscellaneous packages
@ -736,7 +748,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
@ -761,8 +772,9 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_RTDUINO is not set
#
# Projects
# Projects and Demos
#
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
@ -909,14 +921,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# Display
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
# CONFIG_PKG_USING_ARDUINO_U8GLIB_ARDUINO is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
# CONFIG_PKG_USING_SEEED_TM1637 is not set
#
# Timing
#
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
# CONFIG_PKG_USING_ARDUINO_TICKER is not set
# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
#
# Data Processing
@ -1008,7 +1025,9 @@ CONFIG_BSP_UART7_TX_BUFSIZE=0
# CONFIG_BSP_USING_UART9 is not set
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_SCI_SPI is not set
# CONFIG_BSP_USING_SPI is not set
CONFIG_BSP_USING_SPI=y
CONFIG_BSP_USING_SPI0=y
# CONFIG_BSP_USING_SPI1 is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_DAC is not set
# CONFIG_BSP_USING_PWM is not set

View File

@ -1,20 +1,24 @@
#Fri Jul 22 16:07:30 CST 2022
#Mon Jul 24 15:57:07 CST 2023
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_spi\#\#\#\#3.5.0/all=1610456547,ra/fsp/inc/api/r_transfer_api.h|2044432844,ra/fsp/inc/instances/r_spi.h|1108533607,ra/fsp/inc/api/r_spi_api.h|1854500045,ra/fsp/src/r_spi/r_spi.c
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|2425160085,ra/fsp/inc/api/bsp_api.h|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|2208590403,ra/fsp/inc/instances/r_ioport.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|3297195641,ra/fsp/inc/fsp_version.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|1728953905,ra/fsp/inc/fsp_features.h|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|546480625,ra/fsp/inc/fsp_common_api.h|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.201575186=false
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_icu\#\#\#\#3.5.0/all=1906465970,ra/fsp/inc/api/r_external_irq_api.h|2545672180,ra/fsp/inc/instances/r_icu.h|3018483678,ra/fsp/src/r_icu/r_icu.c
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|546480625,ra/fsp/inc/fsp_common_api.h|3297195641,ra/fsp/inc/fsp_version.h|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|1728953905,ra/fsp/inc/fsp_features.h|470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|2425160085,ra/fsp/inc/api/bsp_api.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|2208590403,ra/fsp/inc/instances/r_ioport.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#device\#\#\#\#3.5.0/all=2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#device\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.201575186=false
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6m4_cpk\#\#\#\#3.5.0/all=3938710240,ra/board/ra6m4_cpk/board_leds.c|2967196421,ra/board/ra6m4_cpk/board_init.h|3343992478,ra/board/ra6m4_cpk/board.h|3559227370,ra/board/ra6m4_cpk/board_init.c|2525887392,ra/board/ra6m4_cpk/board_ethernet_phy.h|1768800601,ra/board/ra6m4_cpk/board_leds.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_dtc\#\#\#\#3.5.0/all=3271601603,ra/fsp/inc/instances/r_dtc.h|356298762,ra/fsp/src/r_dtc/r_dtc.c|1610456547,ra/fsp/inc/api/r_transfer_api.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6m4_cpk\#\#\#\#3.5.0/all=ra/board/ra6m4_cpk/board_leds.c|ra/board/ra6m4_cpk/board_init.h|ra/board/ra6m4_cpk/board.h|ra/board/ra6m4_cpk/board_init.c|ra/board/ra6m4_cpk/board_ethernet_phy.h|ra/board/ra6m4_cpk/board_leds.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_icu\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.5.0/all=2347061782,ra/fsp/src/bsp/mcu/ra6m4/bsp_mcu_info.h|3301568719,ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h|1009023542,ra/fsp/src/bsp/mcu/ra6m4/bsp_elc.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=1939984091,ra/fsp/inc/api/r_ioport_api.h|3254285722,ra/fsp/src/r_ioport/r_ioport.c|2208590403,ra/fsp/inc/instances/r_ioport.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_icu\#\#\#\#3.5.0/all=1906465970,ra/fsp/inc/api/r_external_irq_api.h|2545672180,ra/fsp/inc/instances/r_icu.h|3018483678,ra/fsp/src/r_icu/r_icu.c
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c|1610456547,ra/fsp/inc/api/r_transfer_api.h|3916852077,ra/fsp/inc/api/r_uart_api.h|1889256766,ra/fsp/inc/instances/r_sci_uart.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_dtc\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_spi\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.5.0/all=3301568719,ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h|2347061782,ra/fsp/src/bsp/mcu/ra6m4/bsp_mcu_info.h|1009023542,ra/fsp/src/bsp/mcu/ra6m4/bsp_elc.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=1939984091,ra/fsp/inc/api/r_ioport_api.h|2208590403,ra/fsp/inc/instances/r_ioport.h|3254285722,ra/fsp/src/r_ioport/r_ioport.c
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=3916852077,ra/fsp/inc/api/r_uart_api.h|3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c|1610456547,ra/fsp/inc/api/r_transfer_api.h|1889256766,ra/fsp/inc/instances/r_sci_uart.h
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra6m4_cpk\#\#\#\#3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/libraries=
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/libraries=

View File

@ -21,6 +21,7 @@ DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

View File

@ -74,55 +74,39 @@
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h" path=""/>
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"/>
<file category="other" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o"/>
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c"/>
<file category="other" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h" path=""/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_common.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_common.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_common.o"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h" path=""/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_delay.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_delay.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_delay.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_guard.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_guard.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_guard.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_io.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_io.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_io.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_irq.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_irq.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_irq.o"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_module_stop.h" path=""/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c"/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.c"/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.o"/>
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_security.c"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_security.h" path=""/>
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_security.o"/>
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_tfu.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m4/bsp_elc.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h" path=""/>
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m4/bsp_mcu_info.h" path=""/>
<file category="source" name="ra/fsp/src/r_dtc/r_dtc.c"/>
<file category="source" name="ra/fsp/src/r_icu/r_icu.c"/>
<file category="other" name="ra/fsp/src/r_icu/r_icu.o"/>
<file category="source" name="ra/fsp/src/r_ioport/r_ioport.c"/>
<file category="other" name="ra/fsp/src/r_ioport/r_ioport.o"/>
<file category="source" name="ra/fsp/src/r_sci_uart/r_sci_uart.c"/>
<file category="other" name="ra/fsp/src/r_sci_uart/r_sci_uart.o"/>
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View File

@ -89,7 +89,7 @@
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<StartupFile />
<FlashDriverDll />
<Cpu>IRAM(0x20000000,0x040000) IROM(0x00000000,0x100000) CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC2000 -FN3 -FF0RA6M4_1M -FS00 -FL0100000 -FF1RA6M4_DATA_C1M -FS18000000 -FL12000 -FF2RA6M4_CONF -FS2100A000 -FL2300 -FP0($$Device:R7FA6M4AF$Flash\RA6M4_1M.FLM) -FP1($$Device:R7FA6M4AF$Flash\RA6M4_DATA_C1M.FLM) -FP2($$Device:R7FA6M4AF$Flash\RA6M4_CONF.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile />
<MemoryEnv />
<Cmp />
<Asm />
<Linker />
<OHString />
<InfinionOptionDll />
<SLE66CMisc />
<SLE66AMisc />
<SLE66LinkerMisc />
<SFDFile>$$Device:R7FA6M4AF3CFB$SVD\R7FA6M4AF.svd</SFDFile>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:R7FA6M4AF$SVD\R7FA6M4AF.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath />
<IncludePath />
<LibPath />
<RegisterFilePath />
<DBRegisterFilePath />
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
@ -59,8 +62,8 @@
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
@ -69,8 +72,8 @@
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
@ -80,14 +83,14 @@
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>cmd /c "start "Renesas" /w cmd /c ""$Slauncher\rasc_launcher.bat" "3.5.0" --gensecurebundle --compiler ARMv6 "$Pconfiguration.xml" "$L%L" 2&gt; "%%TEMP%%\rasc_stderr.out"""</UserProg1Name>
<UserProg2Name />
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>2</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString />
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
@ -101,19 +104,19 @@
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument />
<IncludeLibraryModules />
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName />
<SimDllArguments />
<SimDlgDll />
<SimDlgDllArguments />
<TargetDllName>SARMCM3.DLL</TargetDllName>
<SimDllName></SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll></SimDlgDll>
<SimDlgDllArguments></SimDlgDllArguments>
<TargetDllName>SARMV8M.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
<TargetDlgDllArguments>-pCM33</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
@ -129,17 +132,17 @@
<UseTargetDll>0</UseTargetDll>
<UseExternalTool>1</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>-1</DriverSelection>
<DriverSelection>4102</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2 />
<Flash2>BIN\UL2V8M.DLL</Flash2>
<Flash3>"" ()</Flash3>
<Flash4 />
<pFcarmOut />
<pFcarmGrp />
<pFcArmRoot />
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
@ -172,26 +175,27 @@
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M33"</AdsCpuType>
<RvctDeviceName />
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>0</hadIROM>
<hadIRAM>0</hadIRAM>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<nBranchProt>0</nBranchProt>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>0</StupSel>
<StupSel>8</StupSel>
<useUlib>1</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>0</RoSelD>
<RwSelD>0</RwSelD>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
@ -202,12 +206,12 @@
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>0</Ir1Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>0</Im1Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
@ -242,13 +246,13 @@
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
<StartAddress>0x20000000</StartAddress>
<Size>0x40000</Size>
</IRAM>
<IROM>
<Type>0</Type>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
<Size>0x100000</Size>
</IROM>
<XRAM>
<Type>0</Type>
@ -273,7 +277,7 @@
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
<Size>0x100000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
@ -297,8 +301,8 @@
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
<StartAddress>0x20000000</StartAddress>
<Size>0x40000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
@ -306,7 +310,7 @@
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector />
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
@ -334,9 +338,9 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>-Wno-license-management -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal</MiscControls>
<Define>RT_USING_LIBC, RT_USING_ARMLIBC, __STDC_LIMIT_MACROS, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define>
<Undefine />
<IncludePath>..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\include;board\ports;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\io\poll;..\..\..\libcpu\arm\cortex-m4;..\libraries\HAL_Drivers\config;..\..\..\components\libc\compilers\common\include;..\libraries\HAL_Drivers;..\..\..\components\drivers\include;..\..\..\components\libc\posix\ipc;..\..\..\components\finsh;..\..\..\libcpu\arm\common;board;..\..\..\components\drivers\include;.</IncludePath>
<Define>__STDC_LIMIT_MACROS, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_LIBC, RT_USING_ARMLIBC</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\libraries\HAL_Drivers;..\..\..\components\drivers\include;board;..\..\..\libcpu\arm\cortex-m4;..\..\..\include;..\..\..\components\libc\posix\ipc;..\..\..\components\finsh;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\drivers\spi;..\..\..\libcpu\arm\common;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\libraries\HAL_Drivers\config;board\ports</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -351,10 +355,10 @@
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls />
<Define />
<Undefine />
<IncludePath />
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -364,14 +368,14 @@
<noStLib>0</noStLib>
<RepFail>0</RepFail>
<useFile>0</useFile>
<TextAddressRange />
<DataAddressRange />
<pXoBase />
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\script\fsp.scat</ScatterFile>
<IncludeLibs />
<IncludeLibsPath />
<Misc />
<LinkerInputFile />
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings>6319,6314</DisabledWarnings>
</LDads>
</TargetArmAds>
@ -385,50 +389,36 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>syscalls.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cctype.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cctype.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstdio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstdio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstdlib.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstdlib.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstring.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstring.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ctime.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\ctime.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cwchar.c</FileName>
<FileType>1</FileType>
@ -444,29 +434,21 @@
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\atomic_arm.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
@ -477,67 +459,66 @@
<Group>
<GroupName>DeviceDrivers</GroupName>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\core\device.c</FilePath>
</File>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringblk_buf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>waitqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\workqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pin.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>serial_v2.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\serial\serial_v2.c</FilePath>
</File>
<File>
<FileName>spi_core.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\spi\spi_core.c</FilePath>
</File>
<File>
<FileName>spi_dev.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\spi\spi_dev.c</FilePath>
</File>
</Files>
</Group>
<Group>
@ -548,15 +529,16 @@
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>drv_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>drv_spi.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_spi.c</FilePath>
</File>
<File>
<FileName>drv_usart_v2.c</FileName>
<FileType>1</FileType>
@ -566,33 +548,27 @@
</Group>
<Group>
<GroupName>Finsh</GroupName>
<Files>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh_parse.c</FileName>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>msh_parse.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
</File>
</Files>
</Group>
<Group>
@ -603,78 +579,51 @@
<FileType>1</FileType>
<FilePath>..\..\..\src\clock.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\device.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\idle.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\ipc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\irq.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\kservice.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\object.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>scheduler_up.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\scheduler_up.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\thread.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
@ -682,26 +631,50 @@
</File>
</Files>
</Group>
<Group>
<GroupName>:Renesas RA Smart Configurator:Common Sources</GroupName>
<Files>
<File>
<FileName>hal_entry.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\hal_entry.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::Flex Software</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<gpdscs>
<gpdsc name="buildinfo.gpdsc">
<targetInfos>
<targetInfo name="Target 1" />
<targetInfo name="Target 1"/>
</targetInfos>
</gpdsc>
</gpdscs>
<apis />
<apis/>
<components>
<component Cclass="Flex Software" Cgroup="RA Configuration" Cvendor="Renesas" Cversion="1.0.0" condition="RA Device" generator="Renesas RA Smart Configurator">
<package name="RA_DFP" schemaVersion="1.6.0" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="3.1.0" />
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.4.0"/>
<targetInfos>
<targetInfo name="Target 1" />
<targetInfo name="Target 1"/>
</targetInfos>
</component>
</components>
<files />
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>project</LayName>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

View File

@ -0,0 +1,299 @@
/***********************************************************************************************************************
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
*
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
**********************************************************************************************************************/
#ifndef R_SPI_API_H
#define R_SPI_API_H
/*****************************************************************************************************************//**
* @ingroup RENESAS_INTERFACES
* @defgroup SPI_API SPI Interface
* @brief Interface for SPI communications.
*
* @section SPI_API_SUMMARY Summary
* Provides a common interface for communication using the SPI Protocol.
*
* Implemented by:
* - @ref SPI
* - @ref SCI_SPI
*
* @{
********************************************************************************************************************/
/*********************************************************************************************************************
* Includes
********************************************************************************************************************/
/* Includes board and MCU related header files. */
#include "bsp_api.h"
#include "r_transfer_api.h"
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
FSP_HEADER
/*********************************************************************************************************************
* Macro definitions
********************************************************************************************************************/
/*********************************************************************************************************************
* Typedef definitions
********************************************************************************************************************/
/** Data bit width */
typedef enum e_spi_bit_width
{
SPI_BIT_WIDTH_4_BITS = (3), ///< Data bit width is 4 bits (byte)
SPI_BIT_WIDTH_5_BITS = (4), ///< Data bit width is 5 bits (byte)
SPI_BIT_WIDTH_6_BITS = (5), ///< Data bit width is 6 bits (byte)
SPI_BIT_WIDTH_7_BITS = (6), ///< Data bit width is 7 bits (byte)
SPI_BIT_WIDTH_8_BITS = (7), ///< Data bit width is 8 bits (byte)
SPI_BIT_WIDTH_9_BITS = (8), ///< Data bit width is 9 bits (word)
SPI_BIT_WIDTH_10_BITS = (9), ///< Data bit width is 10 bits (word)
SPI_BIT_WIDTH_11_BITS = (10), ///< Data bit width is 11 bits (word)
SPI_BIT_WIDTH_12_BITS = (11), ///< Data bit width is 12 bits (word)
SPI_BIT_WIDTH_13_BITS = (12), ///< Data bit width is 13 bits (word)
SPI_BIT_WIDTH_14_BITS = (13), ///< Data bit width is 14 bits (word)
SPI_BIT_WIDTH_15_BITS = (14), ///< Data bit width is 15 bits (word)
SPI_BIT_WIDTH_16_BITS = (15), ///< Data bit width is 16 bits (word)
SPI_BIT_WIDTH_17_BITS = (16), ///< Data bit width is 17 bits (word)
SPI_BIT_WIDTH_18_BITS = (17), ///< Data bit width is 18 bits (word)
SPI_BIT_WIDTH_19_BITS = (18), ///< Data bit width is 19 bits (word)
SPI_BIT_WIDTH_20_BITS = (19), ///< Data bit width is 20 bits (longword)
SPI_BIT_WIDTH_21_BITS = (20), ///< Data bit width is 21 bits (word)
SPI_BIT_WIDTH_22_BITS = (21), ///< Data bit width is 22 bits (word)
SPI_BIT_WIDTH_23_BITS = (22), ///< Data bit width is 23 bits (longword)
SPI_BIT_WIDTH_24_BITS = (23), ///< Data bit width is 24 bits (longword)
SPI_BIT_WIDTH_25_BITS = (25), ///< Data bit width is 25 bits (longword)
SPI_BIT_WIDTH_26_BITS = (25), ///< Data bit width is 26 bits (word)
SPI_BIT_WIDTH_27_BITS = (26), ///< Data bit width is 27 bits (word)
SPI_BIT_WIDTH_28_BITS = (27), ///< Data bit width is 28 bits (word)
SPI_BIT_WIDTH_29_BITS = (28), ///< Data bit width is 29 bits (word)
SPI_BIT_WIDTH_30_BITS = (29), ///< Data bit width is 30 bits (longword)
SPI_BIT_WIDTH_31_BITS = (30), ///< Data bit width is 31 bits (longword)
SPI_BIT_WIDTH_32_BITS = (31) ///< Data bit width is 32 bits (longword)
} spi_bit_width_t;
/** Master or slave operating mode */
typedef enum e_spi_mode
{
SPI_MODE_MASTER, ///< Channel operates as SPI master
SPI_MODE_SLAVE ///< Channel operates as SPI slave
} spi_mode_t;
/** Clock phase */
typedef enum e_spi_clk_phase
{
SPI_CLK_PHASE_EDGE_ODD, ///< 0: Data sampling on odd edge, data variation on even edge
SPI_CLK_PHASE_EDGE_EVEN ///< 1: Data variation on odd edge, data sampling on even edge
} spi_clk_phase_t;
/** Clock polarity */
typedef enum e_spi_clk_polarity
{
SPI_CLK_POLARITY_LOW, ///< 0: Clock polarity is low when idle
SPI_CLK_POLARITY_HIGH ///< 1: Clock polarity is high when idle
} spi_clk_polarity_t;
/** Mode fault error flag. This error occurs when the device is setup as a master, but the SSLA line does not seem to be
* controlled by the master. This usually happens when the connecting device is also acting as master.
* A similar situation can also happen when configured as a slave. */
typedef enum e_spi_mode_fault
{
SPI_MODE_FAULT_ERROR_ENABLE, ///< Mode fault error flag on
SPI_MODE_FAULT_ERROR_DISABLE ///< Mode fault error flag off
} spi_mode_fault_t;
/** Bit order */
typedef enum e_spi_bit_order
{
SPI_BIT_ORDER_MSB_FIRST, ///< Send MSB first in transmission
SPI_BIT_ORDER_LSB_FIRST ///< Send LSB first in transmission
} spi_bit_order_t;
/** SPI events */
typedef enum e_spi_event
{
SPI_EVENT_TRANSFER_COMPLETE = 1, ///< The data transfer was completed
SPI_EVENT_TRANSFER_ABORTED, ///< The data transfer was aborted
SPI_EVENT_ERR_MODE_FAULT, ///< Mode fault error
SPI_EVENT_ERR_READ_OVERFLOW, ///< Read overflow error
SPI_EVENT_ERR_PARITY, ///< Parity error
SPI_EVENT_ERR_OVERRUN, ///< Overrun error
SPI_EVENT_ERR_FRAMING, ///< Framing error
SPI_EVENT_ERR_MODE_UNDERRUN ///< Underrun error
} spi_event_t;
/** Common callback parameter definition */
typedef struct st_spi_callback_args
{
uint32_t channel; ///< Device channel number
spi_event_t event; ///< Event code
void const * p_context; ///< Context provided to user during callback
} spi_callback_args_t;
/** Non-secure arguments for write-read guard function */
typedef struct st_spi_write_read_guard_args
{
void const * p_src;
void * p_dest;
uint32_t const length;
spi_bit_width_t const bit_width;
} spi_write_read_guard_args_t;
/** SPI interface configuration */
typedef struct st_spi_cfg
{
uint8_t channel; ///< Channel number to be used
IRQn_Type rxi_irq; ///< Receive Buffer Full IRQ number
IRQn_Type txi_irq; ///< Transmit Buffer Empty IRQ number
IRQn_Type tei_irq; ///< Transfer Complete IRQ number
IRQn_Type eri_irq; ///< Error IRQ number
uint8_t rxi_ipl; ///< Receive Interrupt priority
uint8_t txi_ipl; ///< Transmit Interrupt priority
uint8_t tei_ipl; ///< Transfer Complete Interrupt priority
uint8_t eri_ipl; ///< Error Interrupt priority
spi_mode_t operating_mode; ///< Select master or slave operating mode
spi_clk_phase_t clk_phase; ///< Data sampling on odd or even clock edge
spi_clk_polarity_t clk_polarity; ///< Clock level when idle
spi_mode_fault_t mode_fault; ///< Mode fault error (master/slave conflict) flag
spi_bit_order_t bit_order; ///< Select to transmit MSB/LSB first
transfer_instance_t const * p_transfer_tx; ///< To use SPI DTC/DMA write transfer, link a DTC/DMA instance here. Set to NULL if unused.
transfer_instance_t const * p_transfer_rx; ///< To use SPI DTC/DMA read transfer, link a DTC/DMA instance here. Set to NULL if unused.
void (* p_callback)(spi_callback_args_t * p_args); ///< Pointer to user callback function
void const * p_context; ///< User defined context passed to callback function
void const * p_extend; ///< Extended SPI hardware dependent configuration
} spi_cfg_t;
/** SPI control block. Allocate an instance specific control block to pass into the SPI API calls.
* @par Implemented as
* - spi_instance_ctrl_t
* - spi_b_instance_ctrl_t
* - sci_spi_instance_ctrl_t
*/
typedef void spi_ctrl_t;
/** Shared Interface definition for SPI */
typedef struct st_spi_api
{
/** Initialize a channel for SPI communication mode.
* @par Implemented as
* - @ref R_SPI_Open()
* - @ref R_SPI_B_Open()
* - @ref R_SCI_SPI_Open()
*
* @param[in, out] p_ctrl Pointer to user-provided storage for the control block.
* @param[in] p_cfg Pointer to SPI configuration structure.
*/
fsp_err_t (* open)(spi_ctrl_t * p_ctrl, spi_cfg_t const * const p_cfg);
/** Receive data from a SPI device.
* @par Implemented as
* - @ref R_SPI_Read()
* - @ref R_SPI_B_Read()
* - @ref R_SCI_SPI_Read()
*
* @param[in] p_ctrl Pointer to the control block for the channel.
* @param[in] length Number of units of data to be transferred (unit size specified by the
* bit_width).
* @param[in] bit_width Data bit width to be transferred.
* @param[out] p_dest Pointer to destination buffer into which data will be copied that is received from a SPI
* device. It is the responsibility of the caller to ensure that adequate space is available
* to hold the requested data count.
*/
fsp_err_t (* read)(spi_ctrl_t * const p_ctrl, void * p_dest, uint32_t const length,
spi_bit_width_t const bit_width);
/** Transmit data to a SPI device.
* @par Implemented as
* - @ref R_SPI_Write()
* - @ref R_SPI_B_Write()
* - @ref R_SCI_SPI_Write()
*
* @param[in] p_ctrl Pointer to the control block for the channel.
* @param[in] p_src Pointer to a source data buffer from which data will be transmitted to a SPI device.
* The argument must not be NULL.
* @param[in] length Number of units of data to be transferred (unit size specified by the
* bit_width).
* @param[in] bit_width Data bit width to be transferred.
*/
fsp_err_t (* write)(spi_ctrl_t * const p_ctrl, void const * p_src, uint32_t const length,
spi_bit_width_t const bit_width);
/** Simultaneously transmit data to a SPI device while receiving data from a SPI device (full duplex).
* @par Implemented as
* - @ref R_SPI_WriteRead()
* - @ref R_SPI_B_WriteRead()
* - @ref R_SCI_SPI_WriteRead()
*
* @param[in] p_ctrl Pointer to the control block for the channel.
* @param[in] p_src Pointer to a source data buffer from which data will be transmitted to a SPI device.
* The argument must not be NULL.
* @param[out] p_dest Pointer to destination buffer into which data will be copied that is received from a SPI
* device. It is the responsibility of the caller to ensure that adequate space is available
* to hold the requested data count. The argument must not be NULL.
* @param[in] length Number of units of data to be transferred (unit size specified by the bit_width).
* @param[in] bit_width Data bit width to be transferred.
*/
fsp_err_t (* writeRead)(spi_ctrl_t * const p_ctrl, void const * p_src, void * p_dest, uint32_t const length,
spi_bit_width_t const bit_width);
/**
* Specify callback function and optional context pointer and working memory pointer.
* @par Implemented as
* - @ref R_SPI_CallbackSet()
* - @ref R_SPI_B_CallbackSet()
* - @ref R_SCI_SPI_CallbackSet()
*
* @param[in] p_ctrl Pointer to the SPI control block.
* @param[in] p_callback Callback function
* @param[in] p_context Pointer to send to callback function
* @param[in] p_working_memory Pointer to volatile memory where callback structure can be allocated.
* Callback arguments allocated here are only valid during the callback.
*/
fsp_err_t (* callbackSet)(spi_ctrl_t * const p_api_ctrl, void (* p_callback)(spi_callback_args_t *),
void const * const p_context, spi_callback_args_t * const p_callback_memory);
/** Remove power to the SPI channel designated by the handle and disable the associated interrupts.
* @par Implemented as
* - @ref R_SPI_Close()
* - @ref R_SPI_B_Close()
* - @ref R_SCI_SPI_Close()
*
* @param[in] p_ctrl Pointer to the control block for the channel.
*/
fsp_err_t (* close)(spi_ctrl_t * const p_ctrl);
} spi_api_t;
/** This structure encompasses everything that is needed to use an instance of this interface. */
typedef struct st_spi_instance
{
spi_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
spi_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
spi_api_t const * p_api; ///< Pointer to the API structure for this instance
} spi_instance_t;
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
FSP_FOOTER
/*****************************************************************************************************************//**
* @} (end defgroup SPI_API)
********************************************************************************************************************/
#endif

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/***********************************************************************************************************************
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
*
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
**********************************************************************************************************************/
/*******************************************************************************************************************//**
* @addtogroup DTC
* @{
**********************************************************************************************************************/
#ifndef R_DTC_H
#define R_DTC_H
/***********************************************************************************************************************
* Includes
**********************************************************************************************************************/
#include "bsp_api.h"
#include "r_transfer_api.h"
#include "r_dtc_cfg.h"
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
FSP_HEADER
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
/** Max configurable number of transfers in NORMAL MODE */
#define DTC_MAX_NORMAL_TRANSFER_LENGTH (0x10000)
/** Max number of transfers per repeat for REPEAT MODE */
#define DTC_MAX_REPEAT_TRANSFER_LENGTH (0x100)
/** Max number of transfers per block in BLOCK MODE */
#define DTC_MAX_BLOCK_TRANSFER_LENGTH (0x100)
/** Max configurable number of blocks to transfer in BLOCK MODE */
#define DTC_MAX_BLOCK_COUNT (0x10000)
/***********************************************************************************************************************
* Typedef definitions
**********************************************************************************************************************/
/** DTC transfer configuration extension. This extension is required. */
typedef struct st_dtc_extended_cfg
{
/** Select which IRQ will trigger the transfer. */
IRQn_Type activation_source;
} dtc_extended_cfg_t;
/** Control block used by driver. DO NOT INITIALIZE - this structure will be initialized in @ref transfer_api_t::open. */
typedef struct st_dtc_instance_ctrl
{
uint32_t open; // Driver ID
IRQn_Type irq; // Transfer activation IRQ number.
} dtc_instance_ctrl_t;
/**********************************************************************************************************************
* Exported global variables
**********************************************************************************************************************/
/** @cond INC_HEADER_DEFS_SEC */
/** Filled in Interface API structure for this Instance. */
extern const transfer_api_t g_transfer_on_dtc;
/** @endcond */
/**********************************************************************************************************************
* Public Function Prototypes
**********************************************************************************************************************/
fsp_err_t R_DTC_Open(transfer_ctrl_t * const p_api_ctrl, transfer_cfg_t const * const p_cfg);
fsp_err_t R_DTC_Reconfigure(transfer_ctrl_t * const p_api_ctrl, transfer_info_t * p_info);
fsp_err_t R_DTC_Reset(transfer_ctrl_t * const p_api_ctrl,
void const * volatile p_src,
void * volatile p_dest,
uint16_t const num_transfers);
fsp_err_t R_DTC_SoftwareStart(transfer_ctrl_t * const p_api_ctrl, transfer_start_mode_t mode);
fsp_err_t R_DTC_SoftwareStop(transfer_ctrl_t * const p_api_ctrl);
fsp_err_t R_DTC_Enable(transfer_ctrl_t * const p_api_ctrl);
fsp_err_t R_DTC_Disable(transfer_ctrl_t * const p_api_ctrl);
fsp_err_t R_DTC_InfoGet(transfer_ctrl_t * const p_api_ctrl, transfer_properties_t * const p_properties);
fsp_err_t R_DTC_Close(transfer_ctrl_t * const p_api_ctrl);
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
FSP_FOOTER
#endif
/*******************************************************************************************************************//**
* @} (end defgroup DTC)
**********************************************************************************************************************/

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/***********************************************************************************************************************
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
*
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
**********************************************************************************************************************/
#ifndef R_SPI_H
#define R_SPI_H
/*******************************************************************************************************************//**
* @addtogroup SPI
* @{
**********************************************************************************************************************/
/***********************************************************************************************************************
* Includes
**********************************************************************************************************************/
#include "r_spi_api.h"
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
FSP_HEADER
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
/*************************************************************************************************
* Type defines for the SPI interface API
*************************************************************************************************/
/** 3-Wire or 4-Wire mode. */
typedef enum e_spi_ssl_mode
{
SPI_SSL_MODE_SPI, ///< SPI operation (4-wire method)
SPI_SSL_MODE_CLK_SYN ///< Clock Synchronous operation (3-wire method)
} spi_ssl_mode_t;
/** Transmit Only (Half Duplex), or Full Duplex. */
typedef enum e_spi_communication
{
SPI_COMMUNICATION_FULL_DUPLEX, ///< Full-Duplex synchronous serial communication
SPI_COMMUNICATION_TRANSMIT_ONLY ///< Transit only serial communication
} spi_communication_t;
/** Slave Select Polarity. */
typedef enum e_spi_sslp
{
SPI_SSLP_LOW, ///< SSLP signal polarity active low
SPI_SSLP_HIGH ///< SSLP signal polarity active high
} spi_ssl_polarity_t;
/** The Slave Select Line */
typedef enum e_spi_ssl_select
{
SPI_SSL_SELECT_SSL0, ///< Select SSL0
SPI_SSL_SELECT_SSL1, ///< Select SSL1
SPI_SSL_SELECT_SSL2, ///< Select SSL2
SPI_SSL_SELECT_SSL3 ///< Select SSL3
} spi_ssl_select_t;
/** MOSI Idle Behavior. */
typedef enum e_spi_mosi_idle_value_fixing
{
SPI_MOSI_IDLE_VALUE_FIXING_DISABLE, ///< MOSI output value=value set in MOIFV bit
SPI_MOSI_IDLE_VALUE_FIXING_LOW, ///< MOSIn level low during MOSI idling
SPI_MOSI_IDLE_VALUE_FIXING_HIGH ///< MOSIn level high during MOSI idling
} spi_mosi_idle_value_fixing_t;
/** Parity Mode */
typedef enum e_spi_parity_mode
{
SPI_PARITY_MODE_DISABLE, ///< Disable parity
SPI_PARITY_MODE_ODD, ///< Select even parity
SPI_PARITY_MODE_EVEN ///< Select odd parity
} spi_parity_t;
/** Byte Swapping Enable/Disable. */
typedef enum
{
SPI_BYTE_SWAP_DISABLE = 0, ///< Disable Byte swapping for 16/32-Bit transfers
SPI_BYTE_SWAP_ENABLE ///< Enable Byte swapping for 16/32-Bit transfers
} spi_byte_swap_t;
/** Delay count for SPI delay settings. */
typedef enum e_spi_clock_delay_count
{
SPI_DELAY_COUNT_1, ///< Set RSPCK delay count to 1 RSPCK
SPI_DELAY_COUNT_2, ///< Set RSPCK delay count to 2 RSPCK
SPI_DELAY_COUNT_3, ///< Set RSPCK delay count to 3 RSPCK
SPI_DELAY_COUNT_4, ///< Set RSPCK delay count to 4 RSPCK
SPI_DELAY_COUNT_5, ///< Set RSPCK delay count to 5 RSPCK
SPI_DELAY_COUNT_6, ///< Set RSPCK delay count to 6 RSPCK
SPI_DELAY_COUNT_7, ///< Set RSPCK delay count to 7 RSPCK
SPI_DELAY_COUNT_8 ///< Set RSPCK delay count to 8 RSPCK
} spi_delay_count_t;
/** SPI Clock Divider settings. */
typedef struct
{
uint8_t spbr; ///< SPBR register setting
uint8_t brdv : 2; ///< BRDV setting in SPCMD0
} rspck_div_setting_t;
/** Extended SPI interface configuration */
typedef struct st_spi_extended_cfg
{
spi_ssl_mode_t spi_clksyn; ///< Select spi or clock syn mode operation
spi_communication_t spi_comm; ///< Select full-duplex or transmit-only communication
spi_ssl_polarity_t ssl_polarity; ///< Select SSLn signal polarity
spi_ssl_select_t ssl_select; ///< Select which slave to use: 0-SSL0, 1-SSL1, 2-SSL2, 3-SSL3
spi_mosi_idle_value_fixing_t mosi_idle; ///< Select MOSI idle fixed value and selection
spi_parity_t parity; ///< Select parity and enable/disable parity
spi_byte_swap_t byte_swap; ///< Select byte swap mode
rspck_div_setting_t spck_div; ///< Register values for configuring the SPI Clock Divider.
spi_delay_count_t spck_delay; ///< SPI Clock Delay Register Setting
spi_delay_count_t ssl_negation_delay; ///< SPI Slave Select Negation Delay Register Setting
spi_delay_count_t next_access_delay; ///< SPI Next-Access Delay Register Setting
} spi_extended_cfg_t;
/** Channel control block. DO NOT INITIALIZE. Initialization occurs when @ref spi_api_t::open is called. */
typedef struct st_spi_instance_ctrl
{
uint32_t open; ///< Indicates whether the open() API has been successfully called.
spi_cfg_t const * p_cfg; ///< Pointer to instance configuration
R_SPI0_Type * p_regs; ///< Base register for this channel
void const * p_tx_data; ///< Buffer to transmit
void * p_rx_data; ///< Buffer to receive
uint32_t tx_count; ///< Number of Data Frames to transfer (8-bit, 16-bit, 32-bit)
uint32_t rx_count; ///< Number of Data Frames to transfer (8-bit, 16-bit, 32-bit)
uint32_t count; ///< Number of Data Frames to transfer (8-bit, 16-bit, 32-bit)
spi_bit_width_t bit_width; ///< Bits per Data frame (8-bit, 16-bit, 32-bit)
/* Pointer to callback and optional working memory */
void (* p_callback)(spi_callback_args_t *);
spi_callback_args_t * p_callback_memory;
/* Pointer to context to be passed into callback function */
void const * p_context;
} spi_instance_ctrl_t;
/**********************************************************************************************************************
* Exported global variables
**********************************************************************************************************************/
/** @cond INC_HEADER_DEFS_SEC */
/** Filled in Interface API structure for this Instance. */
extern const spi_api_t g_spi_on_spi;
/** @endcond */
/***********************************************************************************************************************
* Public APIs
**********************************************************************************************************************/
fsp_err_t R_SPI_Open(spi_ctrl_t * p_api_ctrl, spi_cfg_t const * const p_cfg);
fsp_err_t R_SPI_Read(spi_ctrl_t * const p_api_ctrl,
void * p_dest,
uint32_t const length,
spi_bit_width_t const bit_width);
fsp_err_t R_SPI_Write(spi_ctrl_t * const p_api_ctrl,
void const * p_src,
uint32_t const length,
spi_bit_width_t const bit_width);
fsp_err_t R_SPI_WriteRead(spi_ctrl_t * const p_api_ctrl,
void const * p_src,
void * p_dest,
uint32_t const length,
spi_bit_width_t const bit_width);
fsp_err_t R_SPI_Close(spi_ctrl_t * const p_api_ctrl);
fsp_err_t R_SPI_CalculateBitrate(uint32_t bitrate, rspck_div_setting_t * spck_div);
fsp_err_t R_SPI_CallbackSet(spi_ctrl_t * const p_api_ctrl,
void ( * p_callback)(spi_callback_args_t *),
void const * const p_context,
spi_callback_args_t * const p_callback_memory);
/*******************************************************************************************************************//**
* @} (end ingroup SPI)
**********************************************************************************************************************/
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
FSP_FOOTER
#endif

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/***********************************************************************************************************************
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
*
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
**********************************************************************************************************************/
/***********************************************************************************************************************
* Includes
**********************************************************************************************************************/
#include <string.h>
#include "r_dtc.h"
/***********************************************************************************************************************
* Macro definitions
**********************************************************************************************************************/
/** Driver ID (DTC in ASCII), used to identify Data Transfer Controller (DTC) configuration */
#define DTC_OPEN (0x44544300)
/** Size of vector table is based on number of vectors defined in BSP. */
#define DTC_VECTOR_TABLE_ENTRIES (BSP_ICU_VECTOR_MAX_ENTRIES)
/** The size of transfer_info_t is defined in the Hardware Manual therefore it must be 16 bytes. */
#define DTC_TRANSFER_INFO_SIZE (16U)
/* Compiler specific macro to specify vector table section. */
#ifndef DTC_CFG_VECTOR_TABLE_SECTION_NAME
#define DTC_SECTION_ATTRIBUTE
#ifndef SUPPRESS_WARNING_DTC_CFG_VECTOR_TABLE_SECTION_NAME
#warning "DTC vector table is aligned on 1K boundary. Automatic placing could lead to memory holes."
#endif
#else
#define DTC_SECTION_ATTRIBUTE BSP_PLACE_IN_SECTION(DTC_CFG_VECTOR_TABLE_SECTION_NAME)
#endif
/* Used to generate a compiler error (divided by 0 error) if the assertion fails. This is used in place of "#error"
* for expressions that cannot be evaluated by the preprocessor like sizeof(). */
#define DTC_COMPILE_TIME_ASSERT(e) ((void) sizeof(char[1 - 2 * !(e)]))
/* Calculate the mask bits for byte alignment from the transfer_size_t. */
#define DTC_PRV_MASK_ALIGN_N_BYTES(x) ((1U << (x)) - 1U)
/* Counter Register A Lower Byte Mask */
#define DTC_PRV_MASK_CRAL (0xFFU)
/* Counter Register A Upper Byte Offset */
#define DTC_PRV_OFFSET_CRAH (8U)
/* Offset of in_progress bit in R_DTC->DTCSTS. */
#define DTC_PRV_OFFSET_IN_PROGRESS (15U)
/* DTC Control Register RRS Enable value. */
#define DTC_PRV_RRS_ENABLE (0x18)
/* DTC Control Register RRS Disable value. */
#define DTC_PRV_RRS_DISABLE (0x08)
/***********************************************************************************************************************
* Private function prototypes
**********************************************************************************************************************/
static fsp_err_t r_dtc_prv_enable(dtc_instance_ctrl_t * p_ctrl);
static void r_dtc_state_initialize(void);
static void r_dtc_block_repeat_initialize(transfer_info_t * p_info);
static void r_dtc_set_info(dtc_instance_ctrl_t * p_ctrl, transfer_info_t * p_info);
#if DTC_CFG_PARAM_CHECKING_ENABLE
#if BSP_CFG_ASSERT != 3
static fsp_err_t r_dtc_length_assert(transfer_info_t * p_info);
#endif
static fsp_err_t r_dtc_source_destination_parameter_check(transfer_info_t * p_info);
#endif
/***********************************************************************************************************************
* Private global variables
**********************************************************************************************************************/
static transfer_info_t * gp_dtc_vector_table[DTC_VECTOR_TABLE_ENTRIES] BSP_ALIGN_VARIABLE(1024)
DTC_SECTION_ATTRIBUTE;
/***********************************************************************************************************************
* Exported global variables
**********************************************************************************************************************/
/** DTC implementation of transfer API. */
const transfer_api_t g_transfer_on_dtc =
{
.open = R_DTC_Open,
.reconfigure = R_DTC_Reconfigure,
.reset = R_DTC_Reset,
.infoGet = R_DTC_InfoGet,
.softwareStart = R_DTC_SoftwareStart,
.softwareStop = R_DTC_SoftwareStop,
.enable = R_DTC_Enable,
.disable = R_DTC_Disable,
.close = R_DTC_Close,
};
/*******************************************************************************************************************//**
* @addtogroup DTC
* @{
**********************************************************************************************************************/
/***********************************************************************************************************************
* Functions
**********************************************************************************************************************/
/*******************************************************************************************************************//**
* Configure the vector table if it hasn't been configured, enable the Module and copy the pointer to the transfer info
* into the DTC vector table. Implements @ref transfer_api_t::open.
*
* Example:
* @snippet r_dtc_example.c R_DTC_Open
*
* @retval FSP_SUCCESS Successful open.
* Transfer transfer info pointer copied to DTC Vector table.
* Module started.
* DTC vector table configured.
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
* @retval FSP_ERR_UNSUPPORTED Address Mode Offset is selected.
* @retval FSP_ERR_ALREADY_OPEN The control structure is already opened.
* @retval FSP_ERR_IN_USE The index for this IRQ in the DTC vector table is already configured.
* @retval FSP_ERR_IRQ_BSP_DISABLED The IRQ associated with the activation source is not enabled in the BSP.
**********************************************************************************************************************/
fsp_err_t R_DTC_Open (transfer_ctrl_t * const p_api_ctrl, transfer_cfg_t const * const p_cfg)
{
/* Generate a compiler error if transfer_info_t is modified. */
DTC_COMPILE_TIME_ASSERT(sizeof(transfer_info_t) == DTC_TRANSFER_INFO_SIZE);
dtc_instance_ctrl_t * p_ctrl = (dtc_instance_ctrl_t *) p_api_ctrl;
#if DTC_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(p_ctrl->open != DTC_OPEN, FSP_ERR_ALREADY_OPEN);
FSP_ASSERT(NULL != p_cfg);
FSP_ASSERT(NULL != p_cfg->p_extend);
FSP_ASSERT(NULL != p_cfg->p_info);
fsp_err_t err = r_dtc_length_assert(p_cfg->p_info);
FSP_ERROR_RETURN(FSP_SUCCESS == err, err);
#endif
/* One time initialization for all DTC instances. */
r_dtc_state_initialize();
/* Make sure the activation source is mapped in the ICU. */
dtc_extended_cfg_t * p_dtc_cfg = (dtc_extended_cfg_t *) p_cfg->p_extend;
IRQn_Type irq = p_dtc_cfg->activation_source;
FSP_ERROR_RETURN(irq >= (IRQn_Type) 0, FSP_ERR_IRQ_BSP_DISABLED);
/* Make sure the activation source is not already being used by the DTC. */
FSP_ERROR_RETURN(NULL == gp_dtc_vector_table[irq], FSP_ERR_IN_USE);
/* irq is used to index the DTC vector table. */
p_ctrl->irq = irq;
/* Copy p_info into the DTC vector table. */
r_dtc_set_info(p_ctrl, p_cfg->p_info);
/* Mark driver as open by initializing it to "DTC" in its ASCII equivalent. */
p_ctrl->open = DTC_OPEN;
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* Copy pointer to transfer info into the DTC vector table and enable transfer in ICU.
* Implements @ref transfer_api_t::reconfigure.
*
* @retval FSP_SUCCESS Transfer is configured and will start when trigger occurs.
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
* @retval FSP_ERR_NOT_OPEN Handle is not initialized. Call R_DTC_Open to initialize the control block.
* @retval FSP_ERR_NOT_ENABLED Transfer source address is NULL or is not aligned corrrectly.
* Transfer destination address is NULL or is not aligned corrrectly.
*
* @note p_info must persist until all transfers are completed.
**********************************************************************************************************************/
fsp_err_t R_DTC_Reconfigure (transfer_ctrl_t * const p_api_ctrl, transfer_info_t * p_info)
{
dtc_instance_ctrl_t * p_ctrl = (dtc_instance_ctrl_t *) p_api_ctrl;
#if DTC_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(p_ctrl->open == DTC_OPEN, FSP_ERR_NOT_OPEN);
FSP_ASSERT(NULL != p_info);
FSP_ASSERT(FSP_SUCCESS == r_dtc_length_assert(p_info));
#endif
/* Disable transfers on this activation source. */
R_ICU->IELSR_b[p_ctrl->irq].DTCE = 0U;
/* Wait for current transfer to finish. */
uint32_t in_progress = (1U << DTC_PRV_OFFSET_IN_PROGRESS) | R_ICU->IELSR_b[p_ctrl->irq].IELS;
while (in_progress == R_DTC->DTCSTS)
{
;
}
/* Copy p_info into the DTC vector table. */
r_dtc_set_info(p_ctrl, p_info);
/* This is an exception to FSP Architecture Parameter Checking (May return an error after modifying registers). */
/* Enable transfers on this activation source. */
FSP_ERROR_RETURN(FSP_SUCCESS == r_dtc_prv_enable(p_ctrl), FSP_ERR_NOT_ENABLED);
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* Reset transfer source, destination, and number of transfers. Implements @ref transfer_api_t::reset.
*
* @retval FSP_SUCCESS Transfer reset successfully (transfers are enabled).
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
* @retval FSP_ERR_NOT_OPEN Handle is not initialized. Call R_DTC_Open to initialize the control block.
* @retval FSP_ERR_NOT_ENABLED Transfer source address is NULL or is not aligned corrrectly.
* Transfer destination address is NULL or is not aligned corrrectly.
**********************************************************************************************************************/
fsp_err_t R_DTC_Reset (transfer_ctrl_t * const p_api_ctrl,
void const * volatile p_src,
void * volatile p_dest,
uint16_t const num_transfers)
{
dtc_instance_ctrl_t * p_ctrl = (dtc_instance_ctrl_t *) p_api_ctrl;
#if DTC_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(p_ctrl->open == DTC_OPEN, FSP_ERR_NOT_OPEN);
#endif
/* Disable transfers on this activation source. */
R_ICU->IELSR_b[p_ctrl->irq].DTCE = 0U;
/* Wait for current transfer to finish. */
uint32_t in_progress = (1U << DTC_PRV_OFFSET_IN_PROGRESS) | R_ICU->IELSR_b[p_ctrl->irq].IELS;
while (in_progress == R_DTC->DTCSTS)
{
;
}
/* Disable read skip prior to modifying settings. It will be enabled later
* (See DTC Section 18.4.1 of the RA6M3 manual R01UH0886EJ0100). */
#if FSP_PRIV_TZ_USE_SECURE_REGS
R_DTC->DTCCR_SEC = DTC_PRV_RRS_DISABLE;
#else
R_DTC->DTCCR = DTC_PRV_RRS_DISABLE;
#endif
/* Reset transfer based on input parameters. */
if (NULL != p_src)
{
gp_dtc_vector_table[p_ctrl->irq]->p_src = p_src;
}
if (NULL != p_dest)
{
gp_dtc_vector_table[p_ctrl->irq]->p_dest = p_dest;
}
if (TRANSFER_MODE_BLOCK == gp_dtc_vector_table[p_ctrl->irq]->mode)
{
gp_dtc_vector_table[p_ctrl->irq]->num_blocks = num_transfers;
}
else if (TRANSFER_MODE_NORMAL == gp_dtc_vector_table[p_ctrl->irq]->mode)
{
gp_dtc_vector_table[p_ctrl->irq]->length = num_transfers;
}
else /* (TRANSFER_MODE_REPEAT == gp_dtc_vector_table[p_ctrl->irq]->mode) */
{
/* Do nothing. */
}
/* Enable read skip after all settings are written. */
#if FSP_PRIV_TZ_USE_SECURE_REGS
R_DTC->DTCCR_SEC = DTC_PRV_RRS_ENABLE;
#else
R_DTC->DTCCR = DTC_PRV_RRS_ENABLE;
#endif
/* This is an exception to FSP Architecture Parameter Checking (May return an error after modifying registers). */
/* Enable transfers on this activation source. */
FSP_ERROR_RETURN(FSP_SUCCESS == r_dtc_prv_enable(p_ctrl), FSP_ERR_NOT_ENABLED);
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* Placeholder for unsupported softwareStart function. Implements @ref transfer_api_t::softwareStart.
*
* @retval FSP_ERR_UNSUPPORTED DTC software start is not supported.
**********************************************************************************************************************/
fsp_err_t R_DTC_SoftwareStart (transfer_ctrl_t * const p_api_ctrl, transfer_start_mode_t mode)
{
/* This function isn't supported. It is defined only to implement a required function of transfer_api_t.
* Mark the input parameter as unused since this function isn't supported. */
FSP_PARAMETER_NOT_USED(p_api_ctrl);
FSP_PARAMETER_NOT_USED(mode);
return FSP_ERR_UNSUPPORTED;
}
/*******************************************************************************************************************//**
* Placeholder for unsupported softwareStop function. Implements @ref transfer_api_t::softwareStop.
*
* @retval FSP_ERR_UNSUPPORTED DTC software stop is not supported.
**********************************************************************************************************************/
fsp_err_t R_DTC_SoftwareStop (transfer_ctrl_t * const p_api_ctrl)
{
/* This function isn't supported. It is defined only to implement a required function of transfer_api_t.
* Mark the input parameter as unused since this function isn't supported. */
FSP_PARAMETER_NOT_USED(p_api_ctrl);
return FSP_ERR_UNSUPPORTED;
}
/*******************************************************************************************************************//**
* Enable transfers on this activation source. Implements @ref transfer_api_t::enable.
*
* Example:
* @snippet r_dtc_example.c R_DTC_Enable
*
* @retval FSP_SUCCESS Transfers will be triggered by the activation source
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
* @retval FSP_ERR_UNSUPPORTED Address Mode Offset is selected.
* @retval FSP_ERR_NOT_OPEN Handle is not initialized. Call R_DTC_Open to initialize the control block.
**********************************************************************************************************************/
fsp_err_t R_DTC_Enable (transfer_ctrl_t * const p_api_ctrl)
{
dtc_instance_ctrl_t * p_ctrl = (dtc_instance_ctrl_t *) p_api_ctrl;
#if DTC_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(p_ctrl->open == DTC_OPEN, FSP_ERR_NOT_OPEN);
#endif
return r_dtc_prv_enable(p_ctrl);
}
/*******************************************************************************************************************//**
* Disable transfer on this activation source. Implements @ref transfer_api_t::disable.
*
* @retval FSP_SUCCESS Transfers will not occur on activation events.
* @retval FSP_ERR_NOT_OPEN Handle is not initialized. Call R_DTC_Open to initialize the control block.
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
**********************************************************************************************************************/
fsp_err_t R_DTC_Disable (transfer_ctrl_t * const p_api_ctrl)
{
dtc_instance_ctrl_t * p_ctrl = (dtc_instance_ctrl_t *) p_api_ctrl;
#if DTC_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(p_ctrl->open == DTC_OPEN, FSP_ERR_NOT_OPEN);
#endif
/* Disable transfer. */
R_ICU->IELSR_b[p_ctrl->irq].DTCE = 0U;
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* Provides information about this transfer. Implements @ref transfer_api_t::infoGet.
*
* @retval FSP_SUCCESS p_info updated with current instance information.
* @retval FSP_ERR_NOT_OPEN Handle is not initialized. Call R_DTC_Open to initialize the control block.
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
**********************************************************************************************************************/
fsp_err_t R_DTC_InfoGet (transfer_ctrl_t * const p_api_ctrl, transfer_properties_t * const p_properties)
{
dtc_instance_ctrl_t * p_ctrl = (dtc_instance_ctrl_t *) p_api_ctrl;
#if DTC_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(p_ctrl->open == DTC_OPEN, FSP_ERR_NOT_OPEN);
FSP_ASSERT(NULL != p_properties);
#endif
transfer_info_t * p_info = gp_dtc_vector_table[p_ctrl->irq];
p_properties->block_count_max = 0U;
p_properties->block_count_remaining = 0U;
if (TRANSFER_MODE_NORMAL != p_info->mode)
{
/* Repeat and Block Mode */
/* transfer_length_max is the same for Block and repeat mode. */
p_properties->transfer_length_max = DTC_MAX_REPEAT_TRANSFER_LENGTH;
p_properties->transfer_length_remaining = p_info->length & DTC_PRV_MASK_CRAL;
if (TRANSFER_MODE_BLOCK == p_info->mode)
{
p_properties->block_count_max = DTC_MAX_BLOCK_COUNT;
p_properties->block_count_remaining = p_info->num_blocks;
}
}
else
{
p_properties->transfer_length_max = DTC_MAX_NORMAL_TRANSFER_LENGTH;
p_properties->transfer_length_remaining = p_info->length;
}
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* Disables DTC activation in the ICU, then clears transfer data from the DTC vector table.
* Implements @ref transfer_api_t::close.
*
* @retval FSP_SUCCESS Successful close.
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
* @retval FSP_ERR_NOT_OPEN Handle is not initialized. Call R_DTC_Open to initialize the control block.
**********************************************************************************************************************/
fsp_err_t R_DTC_Close (transfer_ctrl_t * const p_api_ctrl)
{
dtc_instance_ctrl_t * p_ctrl = (dtc_instance_ctrl_t *) p_api_ctrl;
fsp_err_t err = FSP_SUCCESS;
#if DTC_CFG_PARAM_CHECKING_ENABLE
FSP_ASSERT(NULL != p_ctrl);
FSP_ERROR_RETURN(p_ctrl->open == DTC_OPEN, FSP_ERR_NOT_OPEN);
#endif
/* Clear DTC enable bit in ICU. */
R_ICU->IELSR_b[p_ctrl->irq].DTCE = 0U;
/* Clear pointer in vector table. */
gp_dtc_vector_table[p_ctrl->irq] = NULL;
/* Mark instance as closed. */
p_ctrl->open = 0U;
return err;
}
/*******************************************************************************************************************//**
* @} (end addtogroup DTC)
**********************************************************************************************************************/
/*******************************************************************************************************************//**
* Verify that the source and destination pointers are valid then enable the DTC.
*
* @retval FSP_SUCCESS Successfully enabled
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
* @retval FSP_ERR_UNSUPPORTED Address Mode Offset is selected.
**********************************************************************************************************************/
static fsp_err_t r_dtc_prv_enable (dtc_instance_ctrl_t * p_ctrl)
{
#if DTC_CFG_PARAM_CHECKING_ENABLE
fsp_err_t err = r_dtc_source_destination_parameter_check(gp_dtc_vector_table[p_ctrl->irq]);
FSP_ERROR_RETURN(FSP_SUCCESS == err, err);
#endif
/* Enable transfers on this activation source. */
R_ICU->IELSR_b[p_ctrl->irq].DTCE = 1U;
return FSP_SUCCESS;
}
/*******************************************************************************************************************//**
* One time state initialization for all DTC instances.
**********************************************************************************************************************/
static void r_dtc_state_initialize (void)
{
/* Stores initialization state to skip initialization in ::R_DTC_Open after the first call. */
static bool g_dtc_state_initialized = false;
/* DTC requires a one time initialization. This will be handled only the first time this function
* is called. This initialization:
* -# Stores the register base addresses for DTC and ICU.
* -# Powers on the DTC block.
* -# Initializes the vector table to NULL pointers.
* -# Sets the vector table base address.
* -# Enables DTC transfers. */
if (!g_dtc_state_initialized)
{
g_dtc_state_initialized = true;
/** Power on DTC */
R_BSP_MODULE_START(FSP_IP_DTC, 0);
/* The DTC vector table must be cleared during initialization because it is located in
* its own section outside of the .BSS section which is cleared during startup. */
memset(&gp_dtc_vector_table, 0U, DTC_VECTOR_TABLE_ENTRIES * sizeof(transfer_info_t *));
/* Set DTC vector table. */
#if FSP_PRIV_TZ_USE_SECURE_REGS
R_DTC->DTCVBR_SEC = (uint32_t) gp_dtc_vector_table;
#else
R_DTC->DTCVBR = (uint32_t) gp_dtc_vector_table;
#endif
/* Enable the DTC Peripheral */
R_DTC->DTCST = 1U;
}
}
/*******************************************************************************************************************//**
* Configure the p_info state and write p_info to DTC vector table.
**********************************************************************************************************************/
static void r_dtc_set_info (dtc_instance_ctrl_t * p_ctrl, transfer_info_t * p_info)
{
/* Update internal variables. */
r_dtc_block_repeat_initialize(p_info);
/* Disable read skip prior to modifying settings. It will be enabled later
* (See DTC Section 18.4.1 of the RA6M3 manual R01UH0886EJ0100). */
#if FSP_PRIV_TZ_USE_SECURE_REGS
R_DTC->DTCCR_SEC = DTC_PRV_RRS_DISABLE;
#else
R_DTC->DTCCR = DTC_PRV_RRS_DISABLE;
#endif
/* Update the entry in the DTC Vector table. */
gp_dtc_vector_table[p_ctrl->irq] = p_info;
/* Enable read skip after all settings are written. */
#if DTC_PRV_USE_SECURE_REGS
R_DTC->DTCCR_SEC = DTC_PRV_RRS_ENABLE;
#else
R_DTC->DTCCR = DTC_PRV_RRS_ENABLE;
#endif
}
/*******************************************************************************************************************//**
* Configure the length setting for block and repeat mode.
**********************************************************************************************************************/
static void r_dtc_block_repeat_initialize (transfer_info_t * p_info)
{
uint32_t i = 0;
do
{
/* Update the CRA register to the desired settings */
if (TRANSFER_MODE_NORMAL != p_info[i].mode)
{
uint8_t CRAL = p_info[i].length & DTC_PRV_MASK_CRAL;
p_info[i].length = (uint16_t) ((CRAL << DTC_PRV_OFFSET_CRAH) | CRAL);
}
} while (TRANSFER_CHAIN_MODE_DISABLED != p_info[i++].chain_mode); /* Increment 'i' after checking. */
}
#if DTC_CFG_PARAM_CHECKING_ENABLE
#if BSP_CFG_ASSERT != 3
/*******************************************************************************************************************//**
* Check to make sure that the length is valid for block and repeat mode.
*
* @retval FSP_SUCCESS Parameters are valid.
* @retval FSP_ERR_ASSERTION Invalid length for block or repeat mode.
* @retval FSP_ERR_UNSUPPORTED Address Mode Offset is selected.
*
**********************************************************************************************************************/
static fsp_err_t r_dtc_length_assert (transfer_info_t * p_info)
{
uint32_t i = 0;
do
{
FSP_ERROR_RETURN(TRANSFER_ADDR_MODE_OFFSET != p_info[i].src_addr_mode, FSP_ERR_UNSUPPORTED);
FSP_ERROR_RETURN(TRANSFER_ADDR_MODE_OFFSET != p_info[i].dest_addr_mode, FSP_ERR_UNSUPPORTED);
if (TRANSFER_MODE_NORMAL != p_info[i].mode)
{
/* transfer_length_max is the same for Block and repeat mode. */
FSP_ASSERT(p_info[i].length <= DTC_MAX_REPEAT_TRANSFER_LENGTH);
}
} while (TRANSFER_CHAIN_MODE_DISABLED != p_info[i++].chain_mode); /* Increment 'i' after checking. */
return FSP_SUCCESS;
}
#endif
/*******************************************************************************************************************//**
* Check that the source and destination are not NULL and that they are aligned correctly.
*
* @retval FSP_SUCCESS Parameters are valid.
* @retval FSP_ERR_ASSERTION An input parameter is invalid.
* @retval FSP_ERR_UNSUPPORTED Address Mode Offset is selected.
*
**********************************************************************************************************************/
static fsp_err_t r_dtc_source_destination_parameter_check (transfer_info_t * p_info)
{
uint32_t i = 0;
do
{
FSP_ERROR_RETURN(TRANSFER_ADDR_MODE_OFFSET != p_info[i].src_addr_mode, FSP_ERR_UNSUPPORTED);
FSP_ERROR_RETURN(TRANSFER_ADDR_MODE_OFFSET != p_info[i].dest_addr_mode, FSP_ERR_UNSUPPORTED);
FSP_ASSERT(NULL != p_info[i].p_src);
FSP_ASSERT(NULL != p_info[i].p_dest);
FSP_ASSERT(0U == ((uint32_t) p_info[i].p_dest & DTC_PRV_MASK_ALIGN_N_BYTES(p_info[i].size)));
FSP_ASSERT(0U == ((uint32_t) p_info[i].p_src & DTC_PRV_MASK_ALIGN_N_BYTES(p_info[i].size)));
} while (TRANSFER_CHAIN_MODE_DISABLED != p_info[i++].chain_mode); /* Increment 'i' after checking. */
return FSP_SUCCESS;
}
#endif

File diff suppressed because it is too large Load Diff

View File

@ -76,7 +76,7 @@
(((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ | \
(((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* USBFS */ | \
(((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ | \
(((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | \
(((1 > 0) ? 0U : 1U) << 19) /* SPI0 */ | \
(((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \
(((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | \
(((1 > 0) ? 0U : 1U) << 24) /* SCI7 */ | \
@ -138,7 +138,7 @@
#ifndef BSP_TZ_CFG_MSSAR
#define BSP_TZ_CFG_MSSAR (\
(((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | \
(((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \
(((2 > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \
0xfffffffc) /* Unused */
#endif
@ -244,7 +244,7 @@
#endif
/* Set DTCSTSAR if the Secure program uses the DTC. */
#if RA_NOT_DEFINED == RA_NOT_DEFINED
#if 2 == RA_NOT_DEFINED
#define BSP_TZ_CFG_DTC_USED (0U)
#else
#define BSP_TZ_CFG_DTC_USED (1U)

View File

@ -0,0 +1,6 @@
/* generated configuration header file - do not edit */
#ifndef R_DTC_CFG_H_
#define R_DTC_CFG_H_
#define DTC_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define DTC_CFG_VECTOR_TABLE_SECTION_NAME ".fsp_dtc_vector_table"
#endif /* R_DTC_CFG_H_ */

View File

@ -0,0 +1,7 @@
/* generated configuration header file - do not edit */
#ifndef R_SPI_CFG_H_
#define R_SPI_CFG_H_
#define SPI_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define SPI_DTC_SUPPORT_ENABLE (1)
#define SPI_TRANSMIT_FROM_RXI_ISR (0)
#endif /* R_SPI_CFG_H_ */

View File

@ -1,5 +1,144 @@
/* generated HAL source file - do not edit */
#include "hal_data.h"
dtc_instance_ctrl_t g_transfer1_ctrl;
transfer_info_t g_transfer1_info =
{
.dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED,
.repeat_area = TRANSFER_REPEAT_AREA_DESTINATION,
.irq = TRANSFER_IRQ_END,
.chain_mode = TRANSFER_CHAIN_MODE_DISABLED,
.src_addr_mode = TRANSFER_ADDR_MODE_FIXED,
.size = TRANSFER_SIZE_2_BYTE,
.mode = TRANSFER_MODE_NORMAL,
.p_dest = (void *) NULL,
.p_src = (void const *) NULL,
.num_blocks = 0,
.length = 0,
};
const dtc_extended_cfg_t g_transfer1_cfg_extend =
{
.activation_source = VECTOR_NUMBER_SPI0_RXI,
};
const transfer_cfg_t g_transfer1_cfg =
{
.p_info = &g_transfer1_info,
.p_extend = &g_transfer1_cfg_extend,
};
/* Instance structure to use this module. */
const transfer_instance_t g_transfer1 =
{
.p_ctrl = &g_transfer1_ctrl,
.p_cfg = &g_transfer1_cfg,
.p_api = &g_transfer_on_dtc
};
dtc_instance_ctrl_t g_transfer0_ctrl;
transfer_info_t g_transfer0_info =
{
.dest_addr_mode = TRANSFER_ADDR_MODE_FIXED,
.repeat_area = TRANSFER_REPEAT_AREA_SOURCE,
.irq = TRANSFER_IRQ_END,
.chain_mode = TRANSFER_CHAIN_MODE_DISABLED,
.src_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED,
.size = TRANSFER_SIZE_2_BYTE,
.mode = TRANSFER_MODE_NORMAL,
.p_dest = (void *) NULL,
.p_src = (void const *) NULL,
.num_blocks = 0,
.length = 0,
};
const dtc_extended_cfg_t g_transfer0_cfg_extend =
{
.activation_source = VECTOR_NUMBER_SPI0_TXI,
};
const transfer_cfg_t g_transfer0_cfg =
{
.p_info = &g_transfer0_info,
.p_extend = &g_transfer0_cfg_extend,
};
/* Instance structure to use this module. */
const transfer_instance_t g_transfer0 =
{
.p_ctrl = &g_transfer0_ctrl,
.p_cfg = &g_transfer0_cfg,
.p_api = &g_transfer_on_dtc
};
spi_instance_ctrl_t g_spi0_ctrl;
/** SPI extended configuration for SPI HAL driver */
const spi_extended_cfg_t g_spi0_ext_cfg =
{
.spi_clksyn = SPI_SSL_MODE_CLK_SYN,
.spi_comm = SPI_COMMUNICATION_FULL_DUPLEX,
.ssl_polarity = SPI_SSLP_LOW,
.ssl_select = SPI_SSL_SELECT_SSL0,
.mosi_idle = SPI_MOSI_IDLE_VALUE_FIXING_DISABLE,
.parity = SPI_PARITY_MODE_DISABLE,
.byte_swap = SPI_BYTE_SWAP_DISABLE,
.spck_div = {
/* Actual calculated bitrate: 12500000. */ .spbr = 3, .brdv = 0
},
.spck_delay = SPI_DELAY_COUNT_1,
.ssl_negation_delay = SPI_DELAY_COUNT_1,
.next_access_delay = SPI_DELAY_COUNT_1
};
/** SPI configuration for SPI HAL driver */
const spi_cfg_t g_spi0_cfg =
{
.channel = 0,
#if defined(VECTOR_NUMBER_SPI0_RXI)
.rxi_irq = VECTOR_NUMBER_SPI0_RXI,
#else
.rxi_irq = FSP_INVALID_VECTOR,
#endif
#if defined(VECTOR_NUMBER_SPI0_TXI)
.txi_irq = VECTOR_NUMBER_SPI0_TXI,
#else
.txi_irq = FSP_INVALID_VECTOR,
#endif
#if defined(VECTOR_NUMBER_SPI0_TEI)
.tei_irq = VECTOR_NUMBER_SPI0_TEI,
#else
.tei_irq = FSP_INVALID_VECTOR,
#endif
#if defined(VECTOR_NUMBER_SPI0_ERI)
.eri_irq = VECTOR_NUMBER_SPI0_ERI,
#else
.eri_irq = FSP_INVALID_VECTOR,
#endif
.rxi_ipl = (12),
.txi_ipl = (12),
.tei_ipl = (12),
.eri_ipl = (12),
.operating_mode = SPI_MODE_MASTER,
.clk_phase = SPI_CLK_PHASE_EDGE_ODD,
.clk_polarity = SPI_CLK_POLARITY_LOW,
.mode_fault = SPI_MODE_FAULT_ERROR_DISABLE,
.bit_order = SPI_BIT_ORDER_MSB_FIRST,
.p_transfer_tx = g_spi0_P_TRANSFER_TX,
.p_transfer_rx = g_spi0_P_TRANSFER_RX,
.p_callback = spi0_callback,
.p_context = NULL,
.p_extend = (void *)&g_spi0_ext_cfg,
};
/* Instance structure to use this module. */
const spi_instance_t g_spi0 =
{
.p_ctrl = &g_spi0_ctrl,
.p_cfg = &g_spi0_cfg,
.p_api = &g_spi_on_spi
};
icu_instance_ctrl_t g_external_irq0_ctrl;
const external_irq_cfg_t g_external_irq0_cfg =
{

View File

@ -4,11 +4,51 @@
#include <stdint.h>
#include "bsp_api.h"
#include "common_data.h"
#include "r_dtc.h"
#include "r_transfer_api.h"
#include "r_spi.h"
#include "r_icu.h"
#include "r_external_irq_api.h"
#include "r_sci_uart.h"
#include "r_uart_api.h"
FSP_HEADER
/* Transfer on DTC Instance. */
extern const transfer_instance_t g_transfer1;
/** Access the DTC instance using these structures when calling API functions directly (::p_api is not used). */
extern dtc_instance_ctrl_t g_transfer1_ctrl;
extern const transfer_cfg_t g_transfer1_cfg;
/* Transfer on DTC Instance. */
extern const transfer_instance_t g_transfer0;
/** Access the DTC instance using these structures when calling API functions directly (::p_api is not used). */
extern dtc_instance_ctrl_t g_transfer0_ctrl;
extern const transfer_cfg_t g_transfer0_cfg;
/** SPI on SPI Instance. */
extern const spi_instance_t g_spi0;
/** Access the SPI instance using these structures when calling API functions directly (::p_api is not used). */
extern spi_instance_ctrl_t g_spi0_ctrl;
extern const spi_cfg_t g_spi0_cfg;
/** Callback used by SPI Instance. */
#ifndef spi0_callback
void spi0_callback(spi_callback_args_t * p_args);
#endif
#define RA_NOT_DEFINED (1)
#if (RA_NOT_DEFINED == g_transfer0)
#define g_spi0_P_TRANSFER_TX (NULL)
#else
#define g_spi0_P_TRANSFER_TX (&g_transfer0)
#endif
#if (RA_NOT_DEFINED == g_transfer1)
#define g_spi0_P_TRANSFER_RX (NULL)
#else
#define g_spi0_P_TRANSFER_RX (&g_transfer1)
#endif
#undef RA_NOT_DEFINED
/** External IRQ on ICU Instance. */
extern const external_irq_instance_t g_external_irq0;

View File

@ -9,6 +9,10 @@
[2] = sci_uart_tei_isr, /* SCI7 TEI (Transmit end) */
[3] = sci_uart_eri_isr, /* SCI7 ERI (Receive error) */
[4] = r_icu_isr, /* ICU IRQ0 (External pin interrupt 0) */
[5] = spi_rxi_isr, /* SPI0 RXI (Receive buffer full) */
[6] = spi_txi_isr, /* SPI0 TXI (Transmit buffer empty) */
[7] = spi_tei_isr, /* SPI0 TEI (Transmission complete event) */
[8] = spi_eri_isr, /* SPI0 ERI (Error) */
};
const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] =
{
@ -17,5 +21,9 @@
[2] = BSP_PRV_IELS_ENUM(EVENT_SCI7_TEI), /* SCI7 TEI (Transmit end) */
[3] = BSP_PRV_IELS_ENUM(EVENT_SCI7_ERI), /* SCI7 ERI (Receive error) */
[4] = BSP_PRV_IELS_ENUM(EVENT_ICU_IRQ0), /* ICU IRQ0 (External pin interrupt 0) */
[5] = BSP_PRV_IELS_ENUM(EVENT_SPI0_RXI), /* SPI0 RXI (Receive buffer full) */
[6] = BSP_PRV_IELS_ENUM(EVENT_SPI0_TXI), /* SPI0 TXI (Transmit buffer empty) */
[7] = BSP_PRV_IELS_ENUM(EVENT_SPI0_TEI), /* SPI0 TEI (Transmission complete event) */
[8] = BSP_PRV_IELS_ENUM(EVENT_SPI0_ERI), /* SPI0 ERI (Error) */
};
#endif

View File

@ -3,7 +3,7 @@
#define VECTOR_DATA_H
/* Number of interrupts allocated */
#ifndef VECTOR_DATA_IRQ_COUNT
#define VECTOR_DATA_IRQ_COUNT (5)
#define VECTOR_DATA_IRQ_COUNT (9)
#endif
/* ISR prototypes */
void sci_uart_rxi_isr(void);
@ -11,6 +11,10 @@
void sci_uart_tei_isr(void);
void sci_uart_eri_isr(void);
void r_icu_isr(void);
void spi_rxi_isr(void);
void spi_txi_isr(void);
void spi_tei_isr(void);
void spi_eri_isr(void);
/* Vector table allocations */
#define VECTOR_NUMBER_SCI7_RXI ((IRQn_Type) 0) /* SCI7 RXI (Received data full) */
@ -23,4 +27,12 @@
#define SCI7_ERI_IRQn ((IRQn_Type) 3) /* SCI7 ERI (Receive error) */
#define VECTOR_NUMBER_ICU_IRQ0 ((IRQn_Type) 4) /* ICU IRQ0 (External pin interrupt 0) */
#define ICU_IRQ0_IRQn ((IRQn_Type) 4) /* ICU IRQ0 (External pin interrupt 0) */
#define VECTOR_NUMBER_SPI0_RXI ((IRQn_Type) 5) /* SPI0 RXI (Receive buffer full) */
#define SPI0_RXI_IRQn ((IRQn_Type) 5) /* SPI0 RXI (Receive buffer full) */
#define VECTOR_NUMBER_SPI0_TXI ((IRQn_Type) 6) /* SPI0 TXI (Transmit buffer empty) */
#define SPI0_TXI_IRQn ((IRQn_Type) 6) /* SPI0 TXI (Transmit buffer empty) */
#define VECTOR_NUMBER_SPI0_TEI ((IRQn_Type) 7) /* SPI0 TEI (Transmission complete event) */
#define SPI0_TEI_IRQn ((IRQn_Type) 7) /* SPI0 TEI (Transmission complete event) */
#define VECTOR_NUMBER_SPI0_ERI ((IRQn_Type) 8) /* SPI0 ERI (Error) */
#define SPI0_ERI_IRQn ((IRQn_Type) 8) /* SPI0 ERI (Error) */
#endif /* VECTOR_DATA_H */

View File

@ -23,8 +23,10 @@
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */
@ -36,7 +38,6 @@
/* Memory Management */
#define RT_PAGE_MAX_ORDER 11
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
@ -47,7 +48,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart7"
#define RT_VER_NUM 0x50000
#define RT_VER_NUM 0x50001
#define RT_USING_HW_ATOMIC
#define RT_USING_CPU_FFS
#define ARCH_ARM
@ -74,6 +75,9 @@
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* DFS: device virtual file system */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
@ -82,6 +86,7 @@
#define RT_USING_SERIAL_V2
#define RT_SERIAL_USING_DMA
#define RT_USING_PIN
#define RT_USING_SPI
/* Using USB */
@ -190,7 +195,7 @@
/* Arduino libraries */
/* Projects */
/* Projects and Demos */
/* Sensors */
@ -238,6 +243,8 @@
#define BSP_USING_UART7
#define BSP_UART7_RX_BUFSIZE 256
#define BSP_UART7_TX_BUFSIZE 0
#define BSP_USING_SPI
#define BSP_USING_SPI0
/* Board extended module Drivers */

View File

@ -56,6 +56,7 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -Os'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
# POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

View File

@ -9,6 +9,7 @@
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMART is not set
# CONFIG_RT_USING_AMP is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=8
# CONFIG_RT_THREAD_PRIORITY_8 is not set
@ -33,18 +34,10 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
CONFIG_RT_USING_DEBUG=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
CONFIG_RT_DEBUGING_INIT=y
#
# Inter-Thread communication
@ -54,12 +47,12 @@ CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_PAGE_MAX_ORDER=11
# CONFIG_RT_USING_MEMPOOL is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
@ -83,7 +76,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart6"
CONFIG_RT_VER_NUM=0x50000
CONFIG_RT_VER_NUM=0x50001
# CONFIG_RT_USING_STDC_ATOMIC is not set
# CONFIG_RT_USING_CACHE is not set
CONFIG_RT_USING_HW_ATOMIC=y
@ -117,6 +110,10 @@ CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
#
# DFS: device virtual file system
#
# CONFIG_RT_USING_DFS is not set
# CONFIG_RT_USING_FAL is not set
@ -210,9 +207,11 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RESOURCE_ID is not set
# CONFIG_RT_USING_ADT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_VBUS is not set
# CONFIG_RT_USING_KTIME is not set
#
# RT-Thread Utestcases
@ -237,7 +236,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
@ -438,6 +436,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_HASH_MATCH is not set
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
# CONFIG_PKG_USING_VOFA_PLUS is not set
# CONFIG_PKG_USING_RT_TRACE is not set
#
# system packages
@ -509,6 +508,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_QPC is not set
# CONFIG_PKG_USING_AGILE_UPGRADE is not set
# CONFIG_PKG_USING_FLASH_BLOB is not set
# CONFIG_PKG_USING_MLIBC is not set
#
# peripheral libraries and drivers
@ -593,6 +593,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_FT5426 is not set
# CONFIG_PKG_USING_FT6236 is not set
# CONFIG_PKG_USING_XPT2046_TOUCH is not set
# CONFIG_PKG_USING_CST816X is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ESP_IDF is not set
@ -605,7 +606,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
#
# Kendryte SDK
@ -663,14 +663,17 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_RFM300 is not set
# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
# CONFIG_PKG_USING_AIP650 is not set
# CONFIG_PKG_USING_FINGERPRINT is not set
# CONFIG_PKG_USING_BT_ECB02C is not set
# CONFIG_PKG_USING_UAT is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
#
# AI packages
@ -689,7 +692,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# Signal Processing and Control Algorithm Packages
#
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_KISSFFT is not set
#
# miscellaneous packages
@ -736,7 +742,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
@ -761,8 +766,9 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_RTDUINO is not set
#
# Projects
# Projects and Demos
#
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
@ -909,14 +915,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# Display
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
# CONFIG_PKG_USING_ARDUINO_U8GLIB_ARDUINO is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
# CONFIG_PKG_USING_SEEED_TM1637 is not set
#
# Timing
#
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
# CONFIG_PKG_USING_ARDUINO_TICKER is not set
# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
#
# Data Processing

View File

@ -21,6 +21,7 @@ DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

View File

@ -170,11 +170,543 @@
</Target>
<Group>
<GroupName>Source Group 1</GroupName>
<GroupName>Compiler</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\libc\compilers\armlibc\syscall_mem.c</PathWithFileName>
<FilenameWithoutPath>syscall_mem.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\libc\compilers\armlibc\syscalls.c</PathWithFileName>
<FilenameWithoutPath>syscalls.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\libc\compilers\common\cctype.c</PathWithFileName>
<FilenameWithoutPath>cctype.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\libc\compilers\common\cstdio.c</PathWithFileName>
<FilenameWithoutPath>cstdio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\components\libc\compilers\common\cstdlib.c</PathWithFileName>
<FilenameWithoutPath>cstdlib.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
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View File

@ -1,12 +1,16 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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<Header>### uVision Project, (C) Keil Software</Header>
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@ -15,28 +19,28 @@
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@ -58,8 +62,8 @@
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@ -68,8 +72,8 @@
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@ -79,14 +83,14 @@
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<UserProg1Name>cmd /c "start "Renesas" /w cmd /c ""$Slauncher\rasc_launcher.bat" "3.5.0" --gensecurebundle --compiler ARMv6 "$Pconfiguration.xml" "$L%L" 2&gt; "%%TEMP%%\rasc_stderr.out"""</UserProg1Name>
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@ -100,8 +104,8 @@
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@ -133,12 +137,12 @@
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<Flash4 />
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<Undefine />
<IncludePath>..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\include;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\poll;..\..\..\libcpu\arm\cortex-m4;..\libraries\HAL_Drivers\config;..\..\..\components\libc\compilers\common\include;..\libraries\HAL_Drivers;..\..\..\components\drivers\include;..\..\..\components\libc\posix\ipc;..\..\..\components\finsh;..\..\..\libcpu\arm\common;.;board\ports;..\..\..\components\drivers\include;board</IncludePath>
<Define>RT_USING_LIBC, __STDC_LIMIT_MACROS, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, RT_USING_ARMLIBC</Define>
<Undefine></Undefine>
<IncludePath>.;..\..\..\include;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\stdio;board\ports;..\..\..\components\finsh;..\..\..\libcpu\arm\cortex-m4;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\drivers\include;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;board;..\..\..\libcpu\arm\common;..\..\..\components\drivers\include</IncludePath>
</VariousControls>
</Cads>
<Aads>
@ -350,10 +355,10 @@
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls />
<Define />
<Undefine />
<IncludePath />
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -363,14 +368,14 @@
<noStLib>0</noStLib>
<RepFail>0</RepFail>
<useFile>0</useFile>
<TextAddressRange />
<DataAddressRange />
<pXoBase />
<TextAddressRange></TextAddressRange>
<DataAddressRange></DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile>.\script\fsp.scat</ScatterFile>
<IncludeLibs />
<IncludeLibsPath />
<Misc />
<LinkerInputFile />
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings>6319,6314</DisabledWarnings>
</LDads>
</TargetArmAds>
@ -384,50 +389,36 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>syscalls.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cctype.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cctype.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstdio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstdio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstdlib.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstdlib.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cstring.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\cstring.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ctime.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\libc\compilers\common\ctime.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cwchar.c</FileName>
<FileType>1</FileType>
@ -443,29 +434,21 @@
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\atomic_arm.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
@ -476,62 +459,51 @@
<Group>
<GroupName>DeviceDrivers</GroupName>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\core\device.c</FilePath>
</File>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringblk_buf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>waitqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\ipc\workqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pin.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>serial_v2.c</FileName>
<FileType>1</FileType>
@ -547,51 +519,164 @@
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
</Files>
<Files>
<File>
<FileName>drv_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
</Files>
<Files>
<File>
<FileName>drv_usart_v2.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_usart_v2.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<uGnu>2</uGnu>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> -std=c99</MiscControls>
<Define> </Define>
<Undefine> </Undefine>
<IncludePath> </IncludePath>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
@ -602,31 +687,25 @@
<Group>
<GroupName>Finsh</GroupName>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh_parse.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
</Files>
</Group>
@ -638,78 +717,51 @@
<FileType>1</FileType>
<FilePath>..\..\..\src\clock.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\device.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\idle.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\ipc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\irq.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\kservice.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\object.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>scheduler_up.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\scheduler_up.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\thread.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
@ -717,26 +769,41 @@
</File>
</Files>
</Group>
<Group>
<GroupName>:Renesas RA Smart Configurator:Common Sources</GroupName>
<Files>
<File>
<FileName>hal_entry.c</FileName>
<FileType>1</FileType>
<FilePath>.\src\hal_entry.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::Flex Software</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<gpdscs>
<gpdsc name="buildinfo.gpdsc">
<targetInfos>
<targetInfo name="Target 1" />
<targetInfo name="Target 1"/>
</targetInfos>
</gpdsc>
</gpdscs>
<apis />
<apis/>
<components>
<component Cclass="Flex Software" Cgroup="RA Configuration" Cvendor="Renesas" Cversion="1.0.0" condition="RA Device" generator="Renesas RA Smart Configurator">
<package name="RA_DFP" schemaVersion="1.6.0" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="3.1.0" />
<package name="RA_DFP" schemaVersion="1.7.2" url="https://www2.renesas.eu/Keil_MDK_Packs/" vendor="Renesas" version="4.4.0"/>
<targetInfos>
<targetInfo name="Target 1" />
<targetInfo name="Target 1"/>
</targetInfos>
</component>
</components>
<files />
<files/>
</RTE>
</Project>

View File

@ -23,8 +23,10 @@
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_INIT
/* Inter-Thread communication */
@ -36,7 +38,6 @@
/* Memory Management */
#define RT_PAGE_MAX_ORDER 11
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
@ -47,7 +48,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart6"
#define RT_VER_NUM 0x50000
#define RT_VER_NUM 0x50001
#define RT_USING_HW_ATOMIC
#define RT_USING_CPU_FFS
#define ARCH_ARM
@ -74,6 +75,9 @@
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* DFS: device virtual file system */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
@ -190,7 +194,7 @@
/* Arduino libraries */
/* Projects */
/* Projects and Demos */
/* Sensors */

View File

@ -56,6 +56,7 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -Os'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
# POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'