bsp: enable KERNEL_REMAP for cvitek platform
Changes: - board.c: add static assert for KERNEL_VADDR_START to check if it's valid - board.h: updated deafult KERNEL_VADDR_START for standard version - config bsp for v5.2.0 smart requirements - kconfig: update bsp Kconfig for remap kernel Signed-off-by: Shell <smokewood@qq.com> Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9229 Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
This commit is contained in:
Shell
Bernard Xiong
parent
cfa3ecfa9e
commit
148e5774c9
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@ -17,7 +17,7 @@ CONFIG_RT_THREAD_PRIORITY_MAX=32
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CONFIG_RT_TICK_PER_SECOND=1000
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CONFIG_RT_USING_HOOK=y
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CONFIG_RT_HOOK_USING_FUNC_PTR=y
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# CONFIG_RT_USING_HOOKLIST is not set
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CONFIG_RT_USING_HOOKLIST=y
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CONFIG_RT_USING_IDLE_HOOK=y
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CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
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CONFIG_IDLE_THREAD_STACK_SIZE=8192
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@ -25,7 +25,7 @@ CONFIG_RT_USING_TIMER_SOFT=y
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CONFIG_RT_TIMER_THREAD_PRIO=4
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CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
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# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
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# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
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CONFIG_RT_USING_CPU_USAGE_TRACER=y
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#
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# kservice optimization
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@ -83,7 +83,7 @@ CONFIG_RT_USING_DEVICE=y
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CONFIG_RT_USING_DEVICE_OPS=y
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# CONFIG_RT_USING_INTERRUPT_INFO is not set
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# CONFIG_RT_USING_THREADSAFE_PRINTF is not set
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# CONFIG_RT_USING_SCHED_THREAD_CTX is not set
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CONFIG_RT_USING_SCHED_THREAD_CTX=y
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=256
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
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@ -771,6 +771,8 @@ CONFIG_RT_USING_ADT_REF=y
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#
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# STM32 HAL & SDK Drivers
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#
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# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
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# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
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# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
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# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
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# CONFIG_PKG_USING_STM32WB55_SDK is not set
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@ -1333,3 +1335,5 @@ CONFIG_SOC_TYPE_SG2002=y
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# CONFIG_BOARD_TYPE_MILKV_DUO_SPINOR is not set
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CONFIG_BOARD_TYPE_MILKV_DUO256M=y
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# CONFIG_BOARD_TYPE_MILKV_DUO256M_SPINOR is not set
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CONFIG_BSP_ROOTFS_TYPE_ROMFS=y
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# CONFIG_BSP_ROOTFS_TYPE_CROMFS is not set
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@ -20,6 +20,7 @@ config BSP_USING_CV18XX
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select RT_USING_CACHE
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select ARCH_MM_MMU
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select RT_USING_DEVICE_OPS
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select ARCH_REMAP_KERNEL if RT_USING_SMART
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default y
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config C906_PLIC_PHY_ADDR
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@ -34,6 +34,10 @@ else:
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
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if GetDepend('RT_USING_SMART'):
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# use smart link.lds
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env['LINKFLAGS'] = env['LINKFLAGS'].replace('link.lds', 'link_smart.lds')
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# include libraries
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objs.extend(SConscript(drivers_path_prefix + '/SConscript', variant_dir='build/drivers', duplicate=0))
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@ -20,13 +20,15 @@
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#include "page.h"
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#include "lwp_arch.h"
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/* respect to boot loader, must be 0xFFFFFFC000200000 */
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RT_STATIC_ASSERT(kmem_region, KERNEL_VADDR_START == 0xFFFFFFC000200000);
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rt_region_t init_page_region = {(rt_size_t)RT_HW_PAGE_START, (rt_size_t)RT_HW_PAGE_END};
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extern size_t MMUTable[];
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struct mem_desc platform_mem_desc[] = {
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{KERNEL_VADDR_START, (rt_size_t)RT_HW_PAGE_END - 1, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
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{0x1000, ((KERNEL_VADDR_START - 1) & 0xfffff000) - 1, (rt_size_t)ARCH_MAP_FAILED, DEVICE_MEM},
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};
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#define NUM_MEM_DESC (sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]))
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@ -19,11 +19,11 @@ extern unsigned int __bss_start;
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extern unsigned int __bss_end;
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#ifndef RT_USING_SMART
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#define KERNEL_VADDR_START 0x0
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#define KERNEL_VADDR_START 0x80200000
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#endif
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#define RT_HW_HEAP_BEGIN ((void *)&__bss_end)
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#define RT_HW_HEAP_END ((void *)(RT_HW_HEAP_BEGIN + 16 * 1024 * 1024))
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#define RT_HW_HEAP_END ((void *)(KERNEL_VADDR_START + 16 * 1024 * 1024))
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#define RT_HW_PAGE_START RT_HW_HEAP_END
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#define RT_HW_PAGE_END ((void *)(KERNEL_VADDR_START + 32 * 1024 * 1024))
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@ -0,0 +1,197 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020/12/12 bernard The first version
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*/
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INCLUDE "link_stacksize.lds"
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OUTPUT_ARCH( "riscv" )
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/*
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* Memory layout:
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* 0x10200000 - 0x10201000: Bootloader
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* 0x10201000 - 0x10A00000: Kernel
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* 0x10A00000 - 0x11200000: Heap
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*/
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MEMORY
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{
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SRAM : ORIGIN = 0xFFFFFFC000200000, LENGTH = 64M
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}
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ENTRY(_start)
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SECTIONS
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{
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. = 0xFFFFFFC000200000 ;
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/* __STACKSIZE__ = 4096; */
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__text_start = .;
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.start :
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{
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*(.start);
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} > SRAM
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. = ALIGN(8);
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.text :
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{
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*(.text) /* remaining code */
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*(.text.*) /* remaining code */
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*(.rodata) /* read-only data (constants) */
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*(.rodata*)
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*(.glue_7)
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*(.glue_7t)
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*(.gnu.linkonce.t*)
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/* section information for finsh shell */
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. = ALIGN(8);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(8);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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. = ALIGN(8);
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/* section information for initial. */
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. = ALIGN(8);
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__rt_init_start = .;
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KEEP(*(SORT(.rti_fn*)))
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__rt_init_end = .;
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. = ALIGN(8);
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__rt_utest_tc_tab_start = .;
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KEEP(*(UtestTcTab))
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__rt_utest_tc_tab_end = .;
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. = ALIGN(8);
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_etext = .;
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} > SRAM
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.eh_frame_hdr :
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{
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*(.eh_frame_hdr)
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*(.eh_frame_entry)
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} > SRAM
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.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
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. = ALIGN(8);
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__text_end = .;
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__text_size = __text_end - __text_start;
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.data :
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{
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*(.data)
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*(.data.*)
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*(.data1)
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*(.data1.*)
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. = ALIGN(8);
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PROVIDE( __global_pointer$ = . + 0x800 );
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*(.sdata)
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*(.sdata.*)
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} > SRAM
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. = ALIGN(8);
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.ctors :
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{
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PROVIDE(__ctors_start__ = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE(__ctors_end__ = .);
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} > SRAM
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.dtors :
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{
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PROVIDE(__dtors_start__ = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE(__dtors_end__ = .);
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} > SRAM
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/* stack for dual core */
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.stack :
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{
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. = ALIGN(64);
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__stack_start__ = .;
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. += __STACKSIZE__;
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__stack_cpu0 = .;
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. += __STACKSIZE__;
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__stack_cpu1 = .;
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} > SRAM
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. = ALIGN(8);
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.osdebug :
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{
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_osdebug_start = .;
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. += 87K;
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_osdebug_end = .;
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} > SRAM
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. = ALIGN(8);
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.sbss :
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{
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__bss_start = .;
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*(.sbss)
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*(.sbss.*)
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*(.dynsbss)
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*(.scommon)
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} > SRAM
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.bss :
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{
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*(.bss)
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*(.bss.*)
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*(.dynbss)
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*(COMMON)
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__bss_end = .;
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} > SRAM
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_end = .;
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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* Symbols in the DWARF debugging sections are relative to the beginning
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* of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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}
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@ -11,12 +11,14 @@
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#define RT_TICK_PER_SECOND 1000
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#define RT_USING_HOOK
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#define RT_HOOK_USING_FUNC_PTR
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#define RT_USING_HOOKLIST
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#define RT_USING_IDLE_HOOK
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#define RT_IDLE_HOOK_LIST_SIZE 4
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#define IDLE_THREAD_STACK_SIZE 8192
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#define RT_USING_TIMER_SOFT
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#define RT_TIMER_THREAD_PRIO 4
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#define RT_TIMER_THREAD_STACK_SIZE 8192
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#define RT_USING_CPU_USAGE_TRACER
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/* kservice optimization */
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@ -51,6 +53,7 @@
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/* end of Memory Management */
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#define RT_USING_DEVICE
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#define RT_USING_DEVICE_OPS
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#define RT_USING_SCHED_THREAD_CTX
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#define RT_USING_CONSOLE
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#define RT_CONSOLEBUF_SIZE 256
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#define RT_CONSOLE_DEVICE_NAME "uart0"
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@ -456,5 +459,6 @@
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#define __STACKSIZE__ 8192
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#define SOC_TYPE_SG2002
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#define BOARD_TYPE_MILKV_DUO256M
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#define BSP_ROOTFS_TYPE_ROMFS
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#endif
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