From 114e143d56e5aabaee93880b06767ef8ebb832c3 Mon Sep 17 00:00:00 2001 From: Chen Wang Date: Tue, 28 May 2024 16:12:24 +0800 Subject: [PATCH] bsp:cvitek: add pinmux for uart Board level UART pinmux summary, following capability should be controlled by pinname whitelist. Duo: NAME UART CV1800B/GPIO __ ---- --- ------------ --------------------- GP13 UART0_RX XGPIOA[17] UART0_RX__UART0_RX GP12 UART0_TX XGPIOA[16] UART0_TX__UART0_TX GP1 UART1_RX XGPIOA[29] IIC0_SDA__UART1_RX GP13 UART1_RX XGPIOA[17] UART0_RX__UART1_RX GP0 UART1_TX XGPIOA[28] IIC0_SCL__UART1_TX GP12 UART1_TX XGPIOA[16] UART0_TX__UART1_TX GP1 UART2_RX XGPIOA[29] IIC0_SDA__UART2_RX GP5 UART2_RX PWR_GPIO[20] SD1_D1__UART2_RX GP0 UART2_TX XGPIOA[28] IIC0_SCL__UART2_TX GP4 UART2_TX PWR_GPIO[19] SD1_D2__UART2_TX GP5 UART3_RX PWR_GPIO[20] SD1_D1__UART3_RX GP4 UART3_TX PWR_GPIO[19] SD1_D2__UART3_TX GP3 UART4_RX PWR_GPIO[25] SD1_GPIO0__UART4_RX GP2 UART4_TX PWR_GPIO[26] SD1_GPIO1__UART4_TX Duo 256m: NAME UART CV1800B/GPIO __ ---- --- ------------ --------------------- GP13 UART0_RX XGPIOA[17] UART0_RX__UART0_RX GP12 UART0_TX XGPIOA[16] UART0_TX__UART0_TX GP1 UART1_RX XGPIOA[29] IIC0_SDA__UART1_RX GP3 UART1_RX XGPIOA[18] JTAG_CPU_TCK__UART1_RX GP13 UART1_RX XGPIOA[17] UART0_RX__UART1_RX GP0 UART1_TX XGPIOA[28] IIC0_SCL__UART1_TX GP2 UART1_TX XGPIOA[19] JTAG_CPU_TMS__UART1_TX GP12 UART1_TX XGPIOA[16] UART0_TX__UART1_TX GP1 UART2_RX XGPIOA[29] IIC0_SDA__UART2_RX GP5 UART2_RX PWR_GPIO[20] SD1_D1__UART2_RX GP0 UART2_TX XGPIOA[28] IIC0_SCL__UART2_TX GP4 UART2_TX PWR_GPIO[19] SD1_D2__UART2_TX GP5 UART3_RX PWR_GPIO[20] SD1_D1__UART3_RX GP4 UART3_TX PWR_GPIO[19] SD1_D2__UART3_TX Note: this patch also update the .config and rtconfig.h because this patch modify some configuration items's name, for example: RT_USIMG_UART0 -> BSP_USING_UART0. FIXME: only handle RISC-V related, no ARM. Signed-off-by: Chen Wang --- bsp/cvitek/c906_little/.config | 59 ++++++--- bsp/cvitek/c906_little/board/Kconfig | 73 +++++++++-- bsp/cvitek/c906_little/rtconfig.h | 18 ++- bsp/cvitek/cv18xx_risc-v/.config | 62 +++++++--- bsp/cvitek/cv18xx_risc-v/board/Kconfig | 88 +++++++++---- bsp/cvitek/cv18xx_risc-v/rtconfig.h | 18 ++- bsp/cvitek/drivers/drv_uart.c | 165 ++++++++++++++++++++++--- 7 files changed, 391 insertions(+), 92 deletions(-) diff --git a/bsp/cvitek/c906_little/.config b/bsp/cvitek/c906_little/.config index cb930cd937..5fe52bcac9 100644 --- a/bsp/cvitek/c906_little/.config +++ b/bsp/cvitek/c906_little/.config @@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y # CONFIG_RT_THREAD_PRIORITY_256 is not set CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=1000 -CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_USING_HOOK=y CONFIG_RT_HOOK_USING_FUNC_PTR=y # CONFIG_RT_USING_HOOKLIST is not set @@ -25,6 +24,8 @@ CONFIG_IDLE_THREAD_STACK_SIZE=1024 CONFIG_RT_USING_TIMER_SOFT=y CONFIG_RT_TIMER_THREAD_PRIO=4 CONFIG_RT_TIMER_THREAD_STACK_SIZE=2048 +# CONFIG_RT_USING_TIMER_ALL_SOFT is not set +# CONFIG_RT_USING_CPU_USAGE_TRACER is not set # # kservice optimization @@ -45,6 +46,7 @@ CONFIG_RT_DEBUGING_ASSERT=y CONFIG_RT_DEBUGING_COLOR=y CONFIG_RT_DEBUGING_CONTEXT=y # CONFIG_RT_DEBUGING_AUTO_INIT is not set +CONFIG_RT_USING_OVERFLOW_CHECK=y # # Inter-Thread communication @@ -131,6 +133,7 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y # Device Drivers # # CONFIG_RT_USING_DM is not set +# CONFIG_RT_USING_DEV_BUS is not set CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_UNAMED_PIPE_NUMBER=64 # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set @@ -149,6 +152,8 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_ZERO is not set # CONFIG_RT_USING_RANDOM is not set # CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_PM is not set @@ -161,21 +166,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_TOUCH is not set # CONFIG_RT_USING_LCD is not set # CONFIG_RT_USING_HWCRYPTO is not set -# CONFIG_RT_USING_PULSE_ENCODER is not set -# CONFIG_RT_USING_INPUT_CAPTURE is not set -# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set # CONFIG_RT_USING_VIRTIO is not set CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_KTIME is not set # CONFIG_RT_USING_HWTIMER is not set - -# -# Using USB -# -# CONFIG_RT_USING_USB_HOST is not set -# CONFIG_RT_USING_USB_DEVICE is not set -# end of Using USB +# CONFIG_RT_USING_CHERRYUSB is not set # end of Device Drivers # @@ -252,6 +248,15 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # end of Utilities # CONFIG_RT_USING_VBUS is not set + +# +# Using USB legacy version +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set +# end of Using USB legacy version + +# CONFIG_RT_USING_FDT is not set # end of RT-Thread Components # @@ -279,6 +284,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_FREEMODBUS is not set # CONFIG_PKG_USING_NANOPB is not set +# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set # # Wi-Fi @@ -383,6 +389,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ZEPHYR_POLLING is not set # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set # CONFIG_PKG_USING_LHC_MODBUS is not set +# CONFIG_PKG_USING_QMODBUS is not set # end of IoT - internet of things # @@ -528,6 +535,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # end of enhanced kernel services +# CONFIG_PKG_USING_AUNITY is not set + # # acceleration: Assembly language or algorithmic acceleration packages # @@ -618,11 +627,27 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # STM32 HAL & SDK Drivers # -# CONFIG_PKG_USING_STM32L4XX_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32_SDIO is not set # end of STM32 HAL & SDK Drivers +# +# Infineon HAL Packages +# +# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set +# CONFIG_PKG_USING_INFINEON_CMSIS is not set +# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set +# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set +# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set +# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set +# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set +# CONFIG_PKG_USING_INFINEON_USBDEV is not set +# end of Infineon HAL Packages + # CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_ESP_IDF is not set @@ -817,6 +842,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # Signal Processing and Control Algorithm Packages # +# CONFIG_PKG_USING_APID is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_UKAL is not set @@ -1133,8 +1159,13 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # General Drivers Configuration # CONFIG_BSP_USING_UART=y -# CONFIG_RT_USING_UART0 is not set -CONFIG_RT_USING_UART1=y +# CONFIG_BSP_USING_UART0 is not set +CONFIG_BSP_USING_UART1=y +CONFIG_BSP_UART1_RX_PINNAME="IIC0_SDA" +CONFIG_BSP_UART1_TX_PINNAME="IIC0_SCL" +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_UART4 is not set CONFIG_UART_IRQ_BASE=30 # CONFIG_BSP_USING_I2C is not set # CONFIG_BSP_USING_ADC is not set diff --git a/bsp/cvitek/c906_little/board/Kconfig b/bsp/cvitek/c906_little/board/Kconfig index acb65707cc..6b7d6f91c5 100755 --- a/bsp/cvitek/c906_little/board/Kconfig +++ b/bsp/cvitek/c906_little/board/Kconfig @@ -6,17 +6,74 @@ menu "General Drivers Configuration" default y if BSP_USING_UART - config RT_USING_UART0 - bool "Enable UART 0" - default n + config BSP_USING_UART0 + bool "Enable UART 0" + default n - config RT_USING_UART1 - bool "Enable UART 1" - default y + if BSP_USING_UART0 + config BSP_UART0_RX_PINNAME + string "uart0 rx pin name" + default "" + config BSP_UART0_TX_PINNAME + string "uart0 tx pin name" + default "" + endif + + config BSP_USING_UART1 + bool "Enable UART 1" + default y + + if BSP_USING_UART1 + config BSP_UART1_RX_PINNAME + string "uart1 rx pin name" + default "IIC0_SDA" + config BSP_UART1_TX_PINNAME + string "uart1 tx pin name" + default "IIC0_SCL" + endif + + config BSP_USING_UART2 + bool "Enable UART 2" + default n + + if BSP_USING_UART2 + config BSP_UART2_RX_PINNAME + string "uart2 rx pin name" + default "" + config BSP_UART2_TX_PINNAME + string "uart2 tx pin name" + default "" + endif + + config BSP_USING_UART3 + bool "Enable UART 3" + default n + + if BSP_USING_UART3 + config BSP_UART3_RX_PINNAME + string "uart3 rx pin name" + default "" + config BSP_UART3_TX_PINNAME + string "uart3 tx pin name" + default "" + endif + + config BSP_USING_UART4 + bool "Enable UART 4" + default n + + if BSP_USING_UART4 + config BSP_UART4_RX_PINNAME + string "uart4 rx pin name" + default "" + config BSP_UART4_TX_PINNAME + string "uart4 tx pin name" + default "" + endif config UART_IRQ_BASE - int - default 30 + int + default 30 endif menuconfig BSP_USING_I2C diff --git a/bsp/cvitek/c906_little/rtconfig.h b/bsp/cvitek/c906_little/rtconfig.h index 70ef72f518..e86cf64339 100755 --- a/bsp/cvitek/c906_little/rtconfig.h +++ b/bsp/cvitek/c906_little/rtconfig.h @@ -9,7 +9,6 @@ #define RT_THREAD_PRIORITY_32 #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK #define RT_USING_HOOK #define RT_HOOK_USING_FUNC_PTR #define RT_USING_IDLE_HOOK @@ -31,6 +30,7 @@ #define RT_DEBUGING_ASSERT #define RT_DEBUGING_COLOR #define RT_DEBUGING_CONTEXT +#define RT_USING_OVERFLOW_CHECK /* Inter-Thread communication */ @@ -95,10 +95,6 @@ #define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN - -/* Using USB */ - -/* end of Using USB */ /* end of Device Drivers */ /* C/C++ and POSIX layer */ @@ -137,6 +133,10 @@ /* Utilities */ /* end of Utilities */ + +/* Using USB legacy version */ + +/* end of Using USB legacy version */ /* end of RT-Thread Components */ /* RT-Thread Utestcases */ @@ -233,6 +233,10 @@ /* end of STM32 HAL & SDK Drivers */ +/* Infineon HAL Packages */ + +/* end of Infineon HAL Packages */ + /* Kendryte SDK */ /* end of Kendryte SDK */ @@ -319,7 +323,9 @@ /* General Drivers Configuration */ #define BSP_USING_UART -#define RT_USING_UART1 +#define BSP_USING_UART1 +#define BSP_UART1_RX_PINNAME "IIC0_SDA" +#define BSP_UART1_TX_PINNAME "IIC0_SCL" #define UART_IRQ_BASE 30 /* end of General Drivers Configuration */ #define BSP_USING_C906_LITTLE diff --git a/bsp/cvitek/cv18xx_risc-v/.config b/bsp/cvitek/cv18xx_risc-v/.config index a5bec1c11e..7593b94de2 100644 --- a/bsp/cvitek/cv18xx_risc-v/.config +++ b/bsp/cvitek/cv18xx_risc-v/.config @@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y # CONFIG_RT_THREAD_PRIORITY_256 is not set CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=1000 -CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_USING_HOOK=y CONFIG_RT_HOOK_USING_FUNC_PTR=y # CONFIG_RT_USING_HOOKLIST is not set @@ -25,6 +24,8 @@ CONFIG_IDLE_THREAD_STACK_SIZE=8192 CONFIG_RT_USING_TIMER_SOFT=y CONFIG_RT_TIMER_THREAD_PRIO=4 CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192 +# CONFIG_RT_USING_TIMER_ALL_SOFT is not set +# CONFIG_RT_USING_CPU_USAGE_TRACER is not set # # kservice optimization @@ -46,6 +47,7 @@ CONFIG_RT_DEBUGING_COLOR=y CONFIG_RT_DEBUGING_CONTEXT=y # CONFIG_RT_DEBUGING_AUTO_INIT is not set # CONFIG_RT_DEBUGING_PAGE_LEAK is not set +CONFIG_RT_USING_OVERFLOW_CHECK=y # # Inter-Thread communication @@ -170,6 +172,7 @@ CONFIG_RT_USING_DFS_ROMFS=y # Device Drivers # # CONFIG_RT_USING_DM is not set +# CONFIG_RT_USING_DEV_BUS is not set CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_UNAMED_PIPE_NUMBER=64 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y @@ -190,6 +193,8 @@ CONFIG_RT_USING_NULL=y CONFIG_RT_USING_ZERO=y CONFIG_RT_USING_RANDOM=y # CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_PM is not set @@ -210,21 +215,12 @@ CONFIG_RT_MMCSD_MAX_PARTITION=16 # CONFIG_RT_USING_TOUCH is not set # CONFIG_RT_USING_LCD is not set # CONFIG_RT_USING_HWCRYPTO is not set -# CONFIG_RT_USING_PULSE_ENCODER is not set -# CONFIG_RT_USING_INPUT_CAPTURE is not set -# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set # CONFIG_RT_USING_VIRTIO is not set CONFIG_RT_USING_PIN=y CONFIG_RT_USING_KTIME=y # CONFIG_RT_USING_HWTIMER is not set - -# -# Using USB -# -# CONFIG_RT_USING_USB_HOST is not set -# CONFIG_RT_USING_USB_DEVICE is not set -# end of Using USB +# CONFIG_RT_USING_CHERRYUSB is not set # end of Device Drivers # @@ -393,6 +389,15 @@ CONFIG_RT_USING_ADT_REF=y # end of Utilities # CONFIG_RT_USING_VBUS is not set + +# +# Using USB legacy version +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set +# end of Using USB legacy version + +# CONFIG_RT_USING_FDT is not set # end of RT-Thread Components # @@ -420,6 +425,7 @@ CONFIG_RT_USING_ADT_REF=y # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_FREEMODBUS is not set # CONFIG_PKG_USING_NANOPB is not set +# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set # # Wi-Fi @@ -524,6 +530,7 @@ CONFIG_RT_USING_ADT_REF=y # CONFIG_PKG_USING_ZEPHYR_POLLING is not set # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set # CONFIG_PKG_USING_LHC_MODBUS is not set +# CONFIG_PKG_USING_QMODBUS is not set # end of IoT - internet of things # @@ -669,6 +676,8 @@ CONFIG_RT_USING_ADT_REF=y # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # end of enhanced kernel services +# CONFIG_PKG_USING_AUNITY is not set + # # acceleration: Assembly language or algorithmic acceleration packages # @@ -759,11 +768,27 @@ CONFIG_RT_USING_ADT_REF=y # # STM32 HAL & SDK Drivers # -# CONFIG_PKG_USING_STM32L4XX_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32_SDIO is not set # end of STM32 HAL & SDK Drivers +# +# Infineon HAL Packages +# +# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set +# CONFIG_PKG_USING_INFINEON_CMSIS is not set +# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set +# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set +# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set +# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set +# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set +# CONFIG_PKG_USING_INFINEON_USBDEV is not set +# end of Infineon HAL Packages + # CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_ESP_IDF is not set @@ -958,6 +983,7 @@ CONFIG_RT_USING_ADT_REF=y # # Signal Processing and Control Algorithm Packages # +# CONFIG_PKG_USING_APID is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_UKAL is not set @@ -1274,12 +1300,14 @@ CONFIG_RT_USING_ADT_REF=y # General Drivers Configuration # CONFIG_BSP_USING_UART=y -CONFIG_RT_USING_UART0=y +CONFIG_BSP_USING_UART0=y +CONFIG_BSP_UART0_RX_PINNAME="UART0_RX" +CONFIG_BSP_UART0_TX_PINNAME="UART0_TX" +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_UART4 is not set CONFIG_UART_IRQ_BASE=44 -# CONFIG_RT_USING_UART1 is not set -# CONFIG_RT_USING_UART2 is not set -# CONFIG_RT_USING_UART3 is not set -# CONFIG_RT_USING_UART4 is not set # CONFIG_BSP_USING_I2C is not set # CONFIG_BSP_USING_ADC is not set # CONFIG_BSP_USING_SPI is not set diff --git a/bsp/cvitek/cv18xx_risc-v/board/Kconfig b/bsp/cvitek/cv18xx_risc-v/board/Kconfig index 3c3b7daacb..6b3cf19fdd 100755 --- a/bsp/cvitek/cv18xx_risc-v/board/Kconfig +++ b/bsp/cvitek/cv18xx_risc-v/board/Kconfig @@ -6,30 +6,74 @@ menu "General Drivers Configuration" default y if BSP_USING_UART - config RT_USING_UART0 - bool "Enable UART 0" - default y + config BSP_USING_UART0 + bool "Enable UART 0" + default y + + if BSP_USING_UART0 + config BSP_UART0_RX_PINNAME + string "uart0 rx pin name" + default "UART0_RX" + config BSP_UART0_TX_PINNAME + string "uart0 tx pin name" + default "UART0_TX" + endif + + config BSP_USING_UART1 + bool "Enable UART 1" + default n + + if BSP_USING_UART1 + config BSP_UART1_RX_PINNAME + string "uart1 rx pin name" + default "" + config BSP_UART1_TX_PINNAME + string "uart1 tx pin name" + default "" + endif + + config BSP_USING_UART2 + bool "Enable UART 2" + default n + + if BSP_USING_UART2 + config BSP_UART2_RX_PINNAME + string "uart2 rx pin name" + default "" + config BSP_UART2_TX_PINNAME + string "uart2 tx pin name" + default "" + endif + + config BSP_USING_UART3 + bool "Enable UART 3" + default n + + if BSP_USING_UART3 + config BSP_UART3_RX_PINNAME + string "uart3 rx pin name" + default "" + config BSP_UART3_TX_PINNAME + string "uart3 tx pin name" + default "" + endif + + config BSP_USING_UART4 + bool "Enable UART 4" + default n + + if BSP_USING_UART4 + config BSP_UART4_RX_PINNAME + string "uart4 rx pin name" + default "" + config BSP_UART4_TX_PINNAME + string "uart4 tx pin name" + default "" + endif config UART_IRQ_BASE - int - default 44 - - config RT_USING_UART1 - bool "Enable UART 1" - default n - - config RT_USING_UART2 - bool "Enable UART 2" - default n - - config RT_USING_UART3 - bool "Enable UART 3" - default n - - config RT_USING_UART4 - bool "Enable UART 4" - default n - + int + default 44 endif menuconfig BSP_USING_I2C diff --git a/bsp/cvitek/cv18xx_risc-v/rtconfig.h b/bsp/cvitek/cv18xx_risc-v/rtconfig.h index 0574fefe54..d168377aa8 100755 --- a/bsp/cvitek/cv18xx_risc-v/rtconfig.h +++ b/bsp/cvitek/cv18xx_risc-v/rtconfig.h @@ -9,7 +9,6 @@ #define RT_THREAD_PRIORITY_32 #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK #define RT_USING_HOOK #define RT_HOOK_USING_FUNC_PTR #define RT_USING_IDLE_HOOK @@ -31,6 +30,7 @@ #define RT_DEBUGING_ASSERT #define RT_DEBUGING_COLOR #define RT_DEBUGING_CONTEXT +#define RT_USING_OVERFLOW_CHECK /* Inter-Thread communication */ @@ -135,10 +135,6 @@ #define RT_MMCSD_MAX_PARTITION 16 #define RT_USING_PIN #define RT_USING_KTIME - -/* Using USB */ - -/* end of Using USB */ /* end of Device Drivers */ /* C/C++ and POSIX layer */ @@ -252,6 +248,10 @@ #define RT_USING_ADT_HASHMAP #define RT_USING_ADT_REF /* end of Utilities */ + +/* Using USB legacy version */ + +/* end of Using USB legacy version */ /* end of RT-Thread Components */ /* RT-Thread Utestcases */ @@ -348,6 +348,10 @@ /* end of STM32 HAL & SDK Drivers */ +/* Infineon HAL Packages */ + +/* end of Infineon HAL Packages */ + /* Kendryte SDK */ /* end of Kendryte SDK */ @@ -434,7 +438,9 @@ /* General Drivers Configuration */ #define BSP_USING_UART -#define RT_USING_UART0 +#define BSP_USING_UART0 +#define BSP_UART0_RX_PINNAME "UART0_RX" +#define BSP_UART0_TX_PINNAME "UART0_TX" #define UART_IRQ_BASE 44 /* end of General Drivers Configuration */ #define BSP_USING_CV18XX diff --git a/bsp/cvitek/drivers/drv_uart.c b/bsp/cvitek/drivers/drv_uart.c index ed482b2142..7da298452f 100644 --- a/bsp/cvitek/drivers/drv_uart.c +++ b/bsp/cvitek/drivers/drv_uart.c @@ -13,6 +13,7 @@ #include "board.h" #include "drv_uart.h" +#include "drv_pinmux.h" #define DBG_TAG "DRV.UART" #define DBG_LVL DBG_WARNING @@ -50,19 +51,19 @@ static struct hw_uart_device _uart##no##_device = \ }; \ static struct rt_serial_device _serial##no; -#ifdef RT_USING_UART0 +#ifdef BSP_USING_UART0 BSP_DEFINE_UART_DEVICE(0); #endif -#ifdef RT_USING_UART1 +#ifdef BSP_USING_UART1 BSP_DEFINE_UART_DEVICE(1); #endif -#ifdef RT_USING_UART2 +#ifdef BSP_USING_UART2 BSP_DEFINE_UART_DEVICE(2); #endif -#ifdef RT_USING_UART3 +#ifdef BSP_USING_UART3 BSP_DEFINE_UART_DEVICE(3); #endif @@ -234,6 +235,132 @@ static void rt_hw_uart_isr(int irqno, void *param) } } +#if defined(BOARD_TYPE_MILKV_DUO) || defined(BOARD_TYPE_MILKV_DUO_SPINOR) + +#ifdef BSP_USING_UART0 +static const char *pinname_whitelist_uart0_rx[] = { + "UART0_RX", + NULL, +}; +static const char *pinname_whitelist_uart0_tx[] = { + "UART0_TX", + NULL, +}; +#endif + +#ifdef BSP_USING_UART1 +static const char *pinname_whitelist_uart1_rx[] = { + "IIC0_SDA", + "UART0_RX", + NULL, +}; +static const char *pinname_whitelist_uart1_tx[] = { + "IIC0_SCL", + "UART0_TX", + NULL, +}; +#endif + +#ifdef BSP_USING_UART2 +static const char *pinname_whitelist_uart2_rx[] = { + "IIC0_SDA", + "SD1_D1", + NULL, +}; +static const char *pinname_whitelist_uart2_tx[] = { + "IIC0_SCL", + "SD1_D2", + NULL, +}; +#endif + +#ifdef BSP_USING_UART3 +static const char *pinname_whitelist_uart3_rx[] = { + "SD1_D1", + NULL, +}; +static const char *pinname_whitelist_uart3_tx[] = { + "SD1_D2", + NULL, +}; +#endif + +#ifdef BSP_USING_UART4 +static const char *pinname_whitelist_uart4_rx[] = { + "SD1_GPIO0", + NULL, +}; +static const char *pinname_whitelist_uart4_tx[] = { + "SD1_GPIO1", + NULL, +}; +#endif + +#elif defined(BOARD_TYPE_MILKV_DUO256M) || defined(BOARD_TYPE_MILKV_DUO256M_SPINOR) + +#ifdef BSP_USING_UART0 +static const char *pinname_whitelist_uart0_rx[] = { + "UART0_RX", + NULL, +}; +static const char *pinname_whitelist_uart0_tx[] = { + "UART0_TX", + NULL, +}; +#endif + +#ifdef BSP_USING_UART1 +static const char *pinname_whitelist_uart1_rx[] = { + "IIC0_SDA", + "JTAG_CPU_TCK", + "UART0_RX", + NULL, +}; +static const char *pinname_whitelist_uart1_tx[] = { + "IIC0_SCL", + "JTAG_CPU_TMS", + "UART0_TX", + NULL, +}; +#endif + +#ifdef BSP_USING_UART2 +static const char *pinname_whitelist_uart2_rx[] = { + "IIC0_SDA", + "SD1_D1", + NULL, +}; +static const char *pinname_whitelist_uart2_tx[] = { + "IIC0_SCL", + "SD1_D2", + NULL, +}; +#endif + +#ifdef BSP_USING_UART3 +static const char *pinname_whitelist_uart3_rx[] = { + "SD1_D1", + NULL, +}; +static const char *pinname_whitelist_uart3_tx[] = { + "SD1_D2", + NULL, +}; +#endif + +#ifdef BSP_USING_UART4 +static const char *pinname_whitelist_uart4_rx[] = { + NULL, +}; +static const char *pinname_whitelist_uart4_tx[] = { + NULL, +}; +#endif + +#else + #error "Unsupported board type!" +#endif + int rt_hw_uart_init(void) { struct hw_uart_device* uart; @@ -248,45 +375,45 @@ int rt_hw_uart_init(void) rt_hw_serial_register(&_serial##no, "uart" #no, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); \ rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial##no, "uart" #no); -#ifdef RT_USING_UART0 - PINMUX_CONFIG(UART0_RX, UART0_RX); - PINMUX_CONFIG(UART0_TX, UART0_TX); +#ifdef BSP_USING_UART0 + pinmux_config(BSP_UART0_RX_PINNAME, UART0_RX, pinname_whitelist_uart0_rx); + pinmux_config(BSP_UART0_TX_PINNAME, UART0_TX, pinname_whitelist_uart0_tx); BSP_INSTALL_UART_DEVICE(0); #if defined(ARCH_ARM) uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000); #endif /* defined(ARCH_ARM) */ #endif -#ifdef RT_USING_UART1 - PINMUX_CONFIG(IIC0_SDA, UART1_RX); - PINMUX_CONFIG(IIC0_SCL, UART1_TX); +#ifdef BSP_USING_UART1 + pinmux_config(BSP_UART1_RX_PINNAME, UART1_RX, pinname_whitelist_uart1_rx); + pinmux_config(BSP_UART1_TX_PINNAME, UART1_TX, pinname_whitelist_uart1_tx); BSP_INSTALL_UART_DEVICE(1); #if defined(ARCH_ARM) uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000); #endif /* defined(ARCH_ARM) */ #endif -#ifdef RT_USING_UART2 - PINMUX_CONFIG(SD1_D1, UART2_RX); - PINMUX_CONFIG(SD1_D2, UART2_TX); +#ifdef BSP_USING_UART2 + pinmux_config(BSP_UART2_RX_PINNAME, UART2_RX, pinname_whitelist_uart2_rx); + pinmux_config(BSP_UART2_TX_PINNAME, UART2_TX, pinname_whitelist_uart2_tx); BSP_INSTALL_UART_DEVICE(2); #if defined(ARCH_ARM) uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000); #endif /* defined(ARCH_ARM) */ #endif -#ifdef RT_USING_UART3 - PINMUX_CONFIG(SD1_D1, UART3_RX); - PINMUX_CONFIG(SD1_D2, UART3_TX); +#ifdef BSP_USING_UART3 + pinmux_config(BSP_UART3_RX_PINNAME, UART3_RX, pinname_whitelist_uart3_rx); + pinmux_config(BSP_UART3_TX_PINNAME, UART3_TX, pinname_whitelist_uart3_tx); BSP_INSTALL_UART_DEVICE(3); #if defined(ARCH_ARM) uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000); #endif /* defined(ARCH_ARM) */ #endif -#ifdef RT_USING_UART4 - PINMUX_CONFIG(SD1_GP0, UART4_RX); - PINMUX_CONFIG(SD1_GP1, UART4_TX); +#ifdef BSP_USING_UART4 + pinmux_config(BSP_UART4_RX_PINNAME, UART4_RX, pinname_whitelist_uart4_rx); + pinmux_config(BSP_UART4_TX_PINNAME, UART4_TX, pinname_whitelist_uart4_tx); BSP_INSTALL_UART_DEVICE(4); #if defined(ARCH_ARM) uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);