update stm32f107 eth driver
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1726 bbd45198-f89e-11dd-88c7-29a3b14d5316
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wuyangyong
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@ -2,8 +2,8 @@
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******************************************************************************
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* @file stm32_eth.h
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* @author MCD Application Team
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* @version V1.0.0
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* @date 06/19/2009
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* @version V1.1.0
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* @date 11/20/2009
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* @brief This file contains all the functions prototypes for the Ethernet
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* firmware library.
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******************************************************************************
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@ -40,62 +40,170 @@
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/**
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* @brief ETH MAC Init structure definition
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* @note The user should not configure all the ETH_InitTypeDef structure's fields.
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* By calling the ETH_StructInit function the structure¡¯s fields are set to their default values.
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* Only the parameters that will be set to a non-default value should be configured.
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*/
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typedef struct {
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/**
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* @brief / * MAC
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*/
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uint32_t ETH_AutoNegotiation; /*!< Selects or not the AutoNegotiation with the external PHY */
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uint32_t ETH_Watchdog; /*!< Enable/disable Watchdog timer */
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uint32_t ETH_Jabber; /*!< Enable/disable Jabber timer */
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uint32_t ETH_InterFrameGap; /*!< Selects minimum IFG between frames during transmission */
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uint32_t ETH_CarrierSense; /*!< Enable/disable Carrier Sense */
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uint32_t ETH_Speed; /*!< Indicates the Ethernet speed: 10/100 Mbps */
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uint32_t ETH_ReceiveOwn; /*!< Enable/disable the reception of frames when the TX_EN signal is asserted in Half-Duplex mode */
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uint32_t ETH_LoopbackMode; /*!< Enable/disable internal MAC MII Loopback mode */
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uint32_t ETH_Mode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode */
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uint32_t ETH_ChecksumOffload; /*!< Enable/disable the calculation of complement sum of all received Ethernet frame payloads */
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uint32_t ETH_RetryTransmission; /*!< Enable/disable the MAC attempt retries transmission, based on the settings of BL, when a colision occurs (Half-Duplex mode) */
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uint32_t ETH_AutomaticPadCRCStrip; /*!< Enable/disable Automatic MAC Pad/CRC Stripping */
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uint32_t ETH_BackOffLimit; /*!< Selects the BackOff limit value */
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uint32_t ETH_DeferralCheck; /*!< Enable/disable deferral check function (Half-Duplex mode) */
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uint32_t ETH_ReceiveAll; /*!< Enable/disable all frames reception by the MAC (No fitering)*/
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uint32_t ETH_SourceAddrFilter; /*!< Selects EnableNormal/EnableInverse/disable Source Address Filter comparison */
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uint32_t ETH_PassControlFrames; /*!< Selects None/All/FilterPass of all control frames (including unicast and multicast PAUSE frames) */
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uint32_t ETH_BroadcastFramesReception; /*!< Enable/disable reception of Broadcast Frames */
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uint32_t ETH_DestinationAddrFilter; /*!< Selects EnableNormal/EnableInverse destination filter for both unicast and multicast frames */
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uint32_t ETH_PromiscuousMode; /*!< Enable/disable Promiscuous Mode */
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uint32_t ETH_MulticastFramesFilter; /*!< Selects the Multicast Frames filter: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter */
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uint32_t ETH_UnicastFramesFilter; /*!< Selects the Unicast Frames filter: HashTableFilter/PerfectFilter/PerfectHashTableFilter */
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uint32_t ETH_HashTableHigh; /*!< This field contains the higher 32 bits of Hash table. */
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uint32_t ETH_HashTableLow; /*!< This field contains the lower 32 bits of Hash table. */
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uint32_t ETH_PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame */
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uint32_t ETH_ZeroQuantaPause; /*!< Enable/disable the automatic generation of Zero-Quanta Pause Control frames */
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uint32_t ETH_PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for automatic retransmission of PAUSE Frame */
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uint32_t ETH_UnicastPauseFrameDetect; /*!< Enable/disable MAC to detect the Pause frames (with MAC Address0 unicast address and unique multicast address) */
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uint32_t ETH_ReceiveFlowControl; /*!< Enable/disable the MAC to decode the received Pause frame and disable its transmitter for a specified (Pause Time) time */
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uint32_t ETH_TransmitFlowControl; /*!< Enable/disable the MAC to transmit Pause frames (Full-Duplex mode) or the MAC back-pressure operation (Half-Duplex mode) */
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uint32_t ETH_VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for comparison and filtering */
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uint32_t ETH_VLANTagIdentifier; /*!< VLAN tag identifier for receive frames */
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uint32_t ETH_AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY
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The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps)
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and the mode (half/full-duplex).
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This parameter can be a value of @ref ETH_AutoNegotiation */
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uint32_t ETH_Watchdog; /*!< Selects or not the Watchdog timer
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When enabled, the MAC allows no more then 2048 bytes to be received.
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When disabled, the MAC can receive up to 16384 bytes.
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This parameter can be a value of @ref ETH_watchdog */
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uint32_t ETH_Jabber; /*!< Selects or not Jabber timer
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When enabled, the MAC allows no more then 2048 bytes to be sent.
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When disabled, the MAC can send up to 16384 bytes.
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This parameter can be a value of @ref ETH_Jabber */
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uint32_t ETH_InterFrameGap; /*!< Selects the minimum IFG between frames during transmission
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This parameter can be a value of @ref ETH_Inter_Frame_Gap */
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uint32_t ETH_CarrierSense; /*!< Selects or not the Carrier Sense
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This parameter can be a value of @ref ETH_Carrier_Sense */
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uint32_t ETH_Speed; /*!< Sets the Ethernet speed: 10/100 Mbps
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This parameter can be a value of @ref ETH_Speed */
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uint32_t ETH_ReceiveOwn; /*!< Selects or not the ReceiveOwn
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ReceiveOwn allows the reception of frames when the TX_EN signal is asserted
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in Half-Duplex mode
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This parameter can be a value of @ref ETH_Receive_Own */
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uint32_t ETH_LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode
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This parameter can be a value of @ref ETH_Loop_Back_Mode */
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uint32_t ETH_Mode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode
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This parameter can be a value of @ref ETH_Duplex_Mode */
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uint32_t ETH_ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers.
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This parameter can be a value of @ref ETH_Checksum_Offload */
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uint32_t ETH_RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL,
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when a colision occurs (Half-Duplex mode)
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This parameter can be a value of @ref ETH_Retry_Transmission */
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uint32_t ETH_AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping
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This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */
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uint32_t ETH_BackOffLimit; /*!< Selects the BackOff limit value
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This parameter can be a value of @ref ETH_Back_Off_Limit */
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uint32_t ETH_DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode)
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This parameter can be a value of @ref ETH_Deferral_Check */
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uint32_t ETH_ReceiveAll; /*!< Selects or not all frames reception by the MAC (No fitering)
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This parameter can be a value of @ref ETH_Receive_All */
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uint32_t ETH_SourceAddrFilter; /*!< Selects the Source Address Filter mode
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This parameter can be a value of @ref ETH_Source_Addr_Filter */
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uint32_t ETH_PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames)
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This parameter can be a value of @ref ETH_Pass_Control_Frames */
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uint32_t ETH_BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames
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This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */
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uint32_t ETH_DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames
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This parameter can be a value of @ref ETH_Destination_Addr_Filter */
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uint32_t ETH_PromiscuousMode; /*!< Selects or not the Promiscuous Mode
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This parameter can be a value of @ref ETH_Promiscuous_Mode */
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uint32_t ETH_MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter
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This parameter can be a value of @ref ETH_Multicast_Frames_Filter */
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uint32_t ETH_UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter
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This parameter can be a value of @ref ETH_Unicast_Frames_Filter */
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uint32_t ETH_HashTableHigh; /*!< This field holds the higher 32 bits of Hash table. */
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uint32_t ETH_HashTableLow; /*!< This field holds the lower 32 bits of Hash table. */
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uint32_t ETH_PauseTime; /*!< This field holds the value to be used in the Pause Time field in the
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transmit control frame */
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uint32_t ETH_ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames
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This parameter can be a value of @ref ETH_Zero_Quanta_Pause */
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uint32_t ETH_PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for
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automatic retransmission of PAUSE Frame
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This parameter can be a value of @ref ETH_Pause_Low_Threshold */
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uint32_t ETH_UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0
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unicast address and unique multicast address)
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This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */
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uint32_t ETH_ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and
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disable its transmitter for a specified time (Pause Time)
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This parameter can be a value of @ref ETH_Receive_Flow_Control */
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uint32_t ETH_TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode)
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or the MAC back-pressure operation (Half-Duplex mode)
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This parameter can be a value of @ref ETH_Transmit_Flow_Control */
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uint32_t ETH_VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for
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comparison and filtering
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This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */
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uint32_t ETH_VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */
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/**
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* @brief / * DMA
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*/
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uint32_t ETH_DropTCPIPChecksumErrorFrame; /*!< Enable/disable Dropping of TCP/IP Checksum Error Frames */
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uint32_t ETH_ReceiveStoreForward; /*!< Enable/disable Receive store and forward */
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uint32_t ETH_FlushReceivedFrame; /*!< Enable/disable flushing of received frames */
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uint32_t ETH_TransmitStoreForward; /*!< Enable/disable Transmit store and forward */
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uint32_t ETH_TransmitThresholdControl; /*!< Selects the Transmit Threshold Control */
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uint32_t ETH_ForwardErrorFrames; /*!< Enable/disable forward to DMA of all frames except runt error frames */
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uint32_t ETH_ForwardUndersizedGoodFrames; /*!< Enable/disable Rx FIFO to forward Undersized frames (frames with no Error and length less than 64 bytes) including pad-bytes and CRC) */
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uint32_t ETH_ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO */
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uint32_t ETH_SecondFrameOperate; /*!< Enable/disable the DMA process of a second frame of Transmit data even before status for first frame is obtained */
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uint32_t ETH_AddressAlignedBeats; /*!< Enable/disable Address Aligned Beats */
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uint32_t ETH_FixedBurst; /*!< Enable/disable the AHB Master interface fixed burst transfers */
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uint32_t ETH_RxDMABurstLength; /*!< Indicate the maximum number of beats to be transferred in one Rx DMA transaction */
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uint32_t ETH_TxDMABurstLength; /*!< Indicate the maximum number of beats to be transferred in one Tx DMA transaction */
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uint32_t ETH_DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames
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This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */
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uint32_t ETH_ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode
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This parameter can be a value of @ref ETH_Receive_Store_Forward */
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uint32_t ETH_FlushReceivedFrame; /*!< Enables or disables the flushing of received frames
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This parameter can be a value of @ref ETH_Flush_Received_Frame */
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uint32_t ETH_TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode
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This parameter can be a value of @ref ETH_Transmit_Store_Forward */
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uint32_t ETH_TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control
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This parameter can be a value of @ref ETH_Transmit_Threshold_Control */
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uint32_t ETH_ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames
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This parameter can be a value of @ref ETH_Forward_Error_Frames */
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uint32_t ETH_ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error
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and length less than 64 bytes) including pad-bytes and CRC)
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This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */
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uint32_t ETH_ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO
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This parameter can be a value of @ref ETH_Receive_Threshold_Control */
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uint32_t ETH_SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second
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frame of Transmit data even before obtaining the status for the first frame.
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This parameter can be a value of @ref ETH_Second_Frame_Operate */
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uint32_t ETH_AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats
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This parameter can be a value of @ref ETH_Address_Aligned_Beats */
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uint32_t ETH_FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers
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This parameter can be a value of @ref ETH_Fixed_Burst */
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uint32_t ETH_RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction
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This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */
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uint32_t ETH_TxDMABurstLength; /*!< Indicates sthe maximum number of beats to be transferred in one Tx DMA transaction
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This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */
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uint32_t ETH_DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode) */
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uint32_t ETH_DMAArbitration; /*!< Selects DMA Tx/Rx arbitration */
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uint32_t ETH_DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration
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This parameter can be a value of @ref ETH_DMA_Arbitration */
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}ETH_InitTypeDef;
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/**--------------------------------------------------------------------------**/
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@ -145,8 +253,10 @@ typedef struct {
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*/
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/**--------------------------------------------------------------------------**/
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/* DMA Tx Desciptor -----------------------------------------------------------*/
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/**----------------------------------------------------------------------------------------------
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/**
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@code
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DMA Tx Desciptor
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-----------------------------------------------------------------------------------------------
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TDES0 | OWN(31) | CTRL[30:26] | Reserved[25:24] | CTRL[23:20] | Reserved[19:17] | Status[16:0] |
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-----------------------------------------------------------------------------------------------
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TDES1 | Reserved[31:29] | Buffer2 ByteCount[28:16] | Reserved[15:13] | Buffer1 ByteCount[12:0] |
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@ -154,7 +264,9 @@ typedef struct {
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TDES2 | Buffer1 Address [31:0] |
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-----------------------------------------------------------------------------------------------
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TDES3 | Buffer2 Address [31:0] / Next Desciptor Address [31:0] |
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---------------------------------------------------------------------------------------------**/
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-----------------------------------------------------------------------------------------------
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@endcode
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*/
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/**
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* @brief Bit definition of TDES0 register: DMA Tx descriptor status register
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@ -214,7 +326,10 @@ typedef struct {
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* @{
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*/
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/**--------------------------------------------------------------------------------------------------------------------
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/**
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@code
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DMA Rx Desciptor
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--------------------------------------------------------------------------------------------------------------------
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RDES0 | OWN(31) | Status [30:0] |
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---------------------------------------------------------------------------------------------------------------------
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RDES1 | CTRL(31) | Reserved[30:29] | Buffer2 ByteCount[28:16] | CTRL[15:14] | Reserved(13) | Buffer1 ByteCount[12:0] |
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@ -222,7 +337,9 @@ typedef struct {
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RDES2 | Buffer1 Address [31:0] |
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---------------------------------------------------------------------------------------------------------------------
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RDES3 | Buffer2 Address [31:0] / Next Desciptor Address [31:0] |
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-------------------------------------------------------------------------------------------------------------------**/
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---------------------------------------------------------------------------------------------------------------------
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@endcode
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*/
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/**
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* @brief Bit definition of RDES0 register: DMA Rx descriptor status register
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@ -371,9 +488,7 @@ typedef struct {
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#define PHY_Speed_Status ((u16)0x0002) /*!< Configured information of Speed: 10Mbps */
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#define PHY_Duplex_Status ((u16)0x0004) /*!< Configured information of Duplex: Full-duplex */
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#define IS_ETH_PHY_ADDRESS(ADDRESS) ((ADDRESS) <= 0x20)
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#define IS_ETH_PHY_REG(REG) (((REG) == PHY_BCR) || \
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((REG) == PHY_BSR) || \
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((REG) == PHY_SR))
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#define IS_ETH_PHY_REG(REG) (REG <= 0x1F)
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/**--------------------------------------------------------------------------**/
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/**
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@ -481,7 +596,7 @@ typedef struct {
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* @}
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*/
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/** @defgroup ETH_Loop_back_Mode
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/** @defgroup ETH_Loop_Back_Mode
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* @{
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*/
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#define ETH_LoopbackMode_Enable ((uint32_t)0x00001000)
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@ -493,7 +608,7 @@ typedef struct {
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* @}
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*/
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/** @defgroup ETH_Duplex_mode
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/** @defgroup ETH_Duplex_Mode
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* @{
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*/
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#define ETH_Mode_FullDuplex ((uint32_t)0x00000800)
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@ -541,7 +656,7 @@ typedef struct {
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* @}
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*/
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/** @defgroup ETH_Back-Off_limit
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/** @defgroup ETH_Back_Off_Limit
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* @{
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*/
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#define ETH_BackOffLimit_10 ((uint32_t)0x00000000)
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* @}
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*/
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/** @defgroup ETH_multicast_frames_filter
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/** @defgroup ETH_Multicast_Frames_Filter
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* @{
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*/
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#define ETH_MulticastFramesFilter_PerfectHashTable ((uint32_t)0x00000404)
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* @}
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*/
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/** @defgroup ETH_unicast_frames_filter
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/** @defgroup ETH_Unicast_Frames_Filter
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* @{
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*/
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#define ETH_UnicastFramesFilter_PerfectHashTable ((uint32_t)0x00000402)
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@ -810,7 +925,7 @@ typedef struct {
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* @}
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*/
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/** @defgroup ETH_MAC_addresses_filter:_SA_DA_filed_of_received_frames
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/** @defgroup ETH_MAC_addresses_filter_SA_DA_filed_of_received_frames
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* @{
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*/
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#define ETH_MAC_AddressFilter_SA ((uint32_t)0x00000000)
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@ -821,7 +936,7 @@ typedef struct {
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* @}
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*/
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/** @defgroup ETH_MAC_addresses_filter:_Mask_bytes
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/** @defgroup ETH_MAC_addresses_filter_Mask_bytes
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* @{
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*/
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#define ETH_MAC_AddressMask_Byte6 ((uint32_t)0x20000000) /*!< Mask MAC Address high reg bits [15:8] */
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