Merge pull request #307 from ArdaFu/master
[BSP] tm4c129x Add EMAC/PHY driver
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commit
0fafa355f3
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@ -16,6 +16,9 @@
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#include <board.h>
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#include <components.h>
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#ifdef RT_USING_LWIP
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#include "drv_eth.h"
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#endif
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/* thread phase init */
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void rt_init_thread_entry(void *parameter)
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{
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@ -24,6 +27,9 @@ void rt_init_thread_entry(void *parameter)
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#ifdef RT_USING_FINSH
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finsh_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef RT_USING_LWIP
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rt_hw_tiva_eth_init();
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#endif
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}
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int rt_application_init(void)
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@ -92,7 +92,7 @@ void rt_hw_board_init()
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/*init uart device*/
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rt_hw_uart_init();
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//redirect RTT stdio to CONSOLE device
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//redirect RTT stdio to CONSOLE device
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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//
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// Enable interrupts to the processor.
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,20 @@
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/*
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* File : drv_eth.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2014-07-25 ArdaFu Port to TM4C129X
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*/
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#ifndef __TIVA_ETH_H__
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#define __TIVA_ETH_H__
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rt_err_t rt_hw_tiva_eth_init(void);
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#endif
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@ -2917,6 +2917,7 @@ EMACPHYRead(uint32_t ui32Base, uint8_t ui8PhyAddr, uint8_t ui8RegAddr)
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//
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HWREG(ui32Base + EMAC_O_MIIADDR) =
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((HWREG(ui32Base + EMAC_O_MIIADDR) & EMAC_MIIADDR_CR_M) |
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EMAC_MIIADDR_CR_100_150 |
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(ui8RegAddr << EMAC_MIIADDR_MII_S) |
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(ui8PhyAddr << EMAC_MIIADDR_PLA_S) | EMAC_MIIADDR_MIIB);
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@ -166,7 +166,7 @@
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// </section>
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// <section name="RT_USING_LWIP" description="lwip, a lightweight TCP/IP protocol stack" default="true" >
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//#define RT_USING_LWIP
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#define RT_USING_LWIP
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// <bool name="RT_USING_LWIP141" description="Using lwIP 1.4.1 version" default="true" />
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#define RT_USING_LWIP141
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// <bool name="RT_LWIP_ICMP" description="Enable ICMP protocol" default="true" />
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@ -192,7 +192,7 @@
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// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
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// #define RT_LWIP_DHCP
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// <integer name="RT_LWIP_TCP_SEG_NUM" description="the number of simultaneously queued TCP" default="4" />
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#define RT_LWIP_TCP_SEG_NUM 8
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#define RT_LWIP_TCP_SEG_NUM 12
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// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
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#define RT_LWIP_TCPTHREAD_PRIORITY 12
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// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
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@ -45,7 +45,7 @@ if PLATFORM == 'gcc':
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OBJCPY = PREFIX + 'objcopy'
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DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections'
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CFLAGS = DEVICE + ' -std=gnu11 -Dgcc'
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CFLAGS = DEVICE + ' -std=c99 -Dgcc'
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AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
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LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-tm4c129x.map,-cref,-u,Reset_Handler -T tm4c_rom.ld'
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