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rt-thread-official
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[BSP/Phytium]适配最新裸机驱动

This commit is contained in:
张衍 2024-07-22 02:33:39 +00:00
parent ca4645000a
commit 0e3c4bd26b
52 changed files with 718 additions and 746 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

64
bsp/phytium/aarch32/.config
View File

@ -8,14 +8,13 @@ CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_NANO is not set
# CONFIG_RT_USING_AMP is not set
CONFIG_RT_USING_SMP=y
CONFIG_RT_CPUS_NR=2
CONFIG_RT_CPUS_NR=4
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
# CONFIG_RT_DEBUGING_CRITICAL is not set
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -184,6 +186,7 @@ CONFIG_RT_USING_DFS_MQUEUE=y
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -210,6 +213,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -236,21 +241,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -422,6 +418,15 @@ CONFIG_RT_USING_ADT_REF=y
# end of Utilities
# CONFIG_RT_USING_VBUS is not set
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1317,9 +1322,9 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
# CONFIG_RT_USING_SPIM2 is not set
CONFIG_RT_USING_SPIM2=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
@ -1344,8 +1349,8 @@ CONFIG_RT_USING_PWM2=y
# CONFIG_RT_USING_PWM7 is not set
CONFIG_BSP_USING_I2C=y
CONFIG_I2C_USE_MIO=y
CONFIG_RT_USING_MIO0=y
CONFIG_RT_USING_MIO1=y
# CONFIG_RT_USING_MIO0 is not set
# CONFIG_RT_USING_MIO1 is not set
# CONFIG_RT_USING_MIO2 is not set
# CONFIG_RT_USING_MIO3 is not set
# CONFIG_RT_USING_MIO4 is not set
@ -1359,7 +1364,7 @@ CONFIG_RT_USING_MIO1=y
# CONFIG_RT_USING_MIO12 is not set
# CONFIG_RT_USING_MIO13 is not set
# CONFIG_RT_USING_MIO14 is not set
# CONFIG_RT_USING_MIO15 is not set
CONFIG_RT_USING_MIO15=y
# CONFIG_I2C_USE_CONTROLLER is not set
CONFIG_BSP_USING_SDIF=y
CONFIG_BSP_USING_SDCARD_FATFS=y
@ -1393,15 +1398,15 @@ CONFIG_USE_AARCH64_L1_TO_AARCH32=y
# Soc configuration
#
# CONFIG_TARGET_PHYTIUMPI is not set
# CONFIG_TARGET_E2000Q is not set
CONFIG_TARGET_E2000D=y
CONFIG_TARGET_E2000Q=y
# CONFIG_TARGET_E2000D is not set
# CONFIG_TARGET_E2000S is not set
# CONFIG_TARGET_FT2004 is not set
# CONFIG_TARGET_D2000 is not set
# CONFIG_TARGET_PD2308 is not set
CONFIG_SOC_NAME="e2000"
CONFIG_TARGET_TYPE_NAME="d"
CONFIG_SOC_CORE_NUM=2
CONFIG_TARGET_TYPE_NAME="q"
CONFIG_SOC_CORE_NUM=4
CONFIG_F32BIT_MEMORY_ADDRESS=0x80000000
CONFIG_F32BIT_MEMORY_LENGTH=0x80000000
CONFIG_F64BIT_MEMORY_ADDRESS=0x2000000000
@ -1415,22 +1420,21 @@ CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
#
# Board Configuration
#
CONFIG_E2000D_DEMO_BOARD=y
CONFIG_BOARD_NAME="demo"
#
# IO mux configuration when board start up
#
# CONFIG_USE_SPI_IOPAD is not set
# CONFIG_USE_GPIO_IOPAD is not set
# CONFIG_USE_CAN_IOPAD is not set
# CONFIG_USE_QSPI_IOPAD is not set
# CONFIG_USE_PWM_IOPAD is not set
# CONFIG_USE_ADC_IOPAD is not set
# CONFIG_USE_MIO_IOPAD is not set
# CONFIG_USE_TACHO_IOPAD is not set
# CONFIG_USE_UART_IOPAD is not set
# CONFIG_USE_THIRD_PARTY_IOPAD is not set
CONFIG_E2000Q_DEMO_BOARD=y
#
# IO mux configuration when board start up
#
# end of IO mux configuration when board start up
# CONFIG_CUS_DEMO_BOARD is not set
@ -1453,10 +1457,4 @@ CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y
CONFIG_INTERRUPT_ROLE_MASTER=y
# CONFIG_INTERRUPT_ROLE_SLAVE is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

2
bsp/phytium/aarch32/Kconfig
View File

@ -2,8 +2,6 @@ mainmenu "RT-Thread Project Configuration"
RTT_DIR := ../../..
BSP_DIR := ../.
SDK_DIR := .././libraries/phytium_standalone_sdk
PKGS_DIR := packages

4
bsp/phytium/aarch32/applications/main.c
View File

@ -58,7 +58,7 @@ static void demo_core_thread(void *parameter)
level = rt_cpus_lock();
rt_kprintf("Hi, core%d \r\n", rt_hw_cpu_id());
rt_cpus_unlock(level);
rt_thread_mdelay(200000);
rt_thread_mdelay(20000);
}
}
@ -80,6 +80,7 @@ void demo_core(void)
rt_thread_control(&test_core[i], RT_THREAD_CTRL_BIND_CPU, (void *)cpu_id);
rt_thread_startup(&test_core[i]);
rt_thread_mdelay(500);
}
}
#endif
@ -91,4 +92,3 @@ int main(void)
#endif
return RT_EOK;
}

43
bsp/phytium/aarch32/configs/e2000d_demo_rtsmart
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
CONFIG_RT_USING_CPU_USAGE_TRACER=y
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
CONFIG_RT_DEBUGING_CRITICAL=y
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -193,6 +195,7 @@ CONFIG_RT_PAGECACHE_GC_STOP_LEVEL=70
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -219,6 +222,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -245,21 +250,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -454,6 +450,15 @@ CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
#
# CONFIG_RT_USING_MEMBLOCK is not set
# end of Memory management
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1349,9 +1354,9 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
# CONFIG_RT_USING_SPIM2 is not set
CONFIG_RT_USING_SPIM2=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
@ -1376,8 +1381,8 @@ CONFIG_RT_USING_PWM2=y
# CONFIG_RT_USING_PWM7 is not set
CONFIG_BSP_USING_I2C=y
CONFIG_I2C_USE_MIO=y
CONFIG_RT_USING_MIO0=y
CONFIG_RT_USING_MIO1=y
# CONFIG_RT_USING_MIO0 is not set
# CONFIG_RT_USING_MIO1 is not set
# CONFIG_RT_USING_MIO2 is not set
# CONFIG_RT_USING_MIO3 is not set
# CONFIG_RT_USING_MIO4 is not set
@ -1391,7 +1396,7 @@ CONFIG_RT_USING_MIO1=y
# CONFIG_RT_USING_MIO12 is not set
# CONFIG_RT_USING_MIO13 is not set
# CONFIG_RT_USING_MIO14 is not set
# CONFIG_RT_USING_MIO15 is not set
CONFIG_RT_USING_MIO15=y
# CONFIG_I2C_USE_CONTROLLER is not set
CONFIG_BSP_USING_SDIF=y
CONFIG_BSP_USING_SDCARD_FATFS=y
@ -1485,10 +1490,4 @@ CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y
CONFIG_INTERRUPT_ROLE_MASTER=y
# CONFIG_INTERRUPT_ROLE_SLAVE is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

22
bsp/phytium/aarch32/configs/e2000d_demo_rtsmart.h
View File

@ -11,7 +11,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -21,6 +20,7 @@
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 4096
#define RT_USING_CPU_USAGE_TRACER
/* kservice optimization */
@ -34,6 +34,7 @@
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_CRITICAL
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -138,6 +139,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -164,13 +166,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -309,6 +306,10 @@
/* Memory management */
/* end of Memory management */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -498,7 +499,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM2
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -513,8 +514,7 @@
#define RT_USING_PWM2
#define BSP_USING_I2C
#define I2C_USE_MIO
#define RT_USING_MIO0
#define RT_USING_MIO1
#define RT_USING_MIO15
#define BSP_USING_SDIF
#define BSP_USING_SDCARD_FATFS
#define USING_SDIF0
@ -566,10 +566,6 @@
#define USE_DEFAULT_INTERRUPT_CONFIG
#define INTERRUPT_ROLE_MASTER
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

37
bsp/phytium/aarch32/configs/e2000d_demo_rtthread
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
# CONFIG_RT_DEBUGING_CRITICAL is not set
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -184,6 +186,7 @@ CONFIG_RT_USING_DFS_MQUEUE=y
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -210,6 +213,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -236,21 +241,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -422,6 +418,15 @@ CONFIG_RT_USING_ADT_REF=y
# end of Utilities
# CONFIG_RT_USING_VBUS is not set
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1317,9 +1322,9 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
# CONFIG_RT_USING_SPIM2 is not set
CONFIG_RT_USING_SPIM2=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
@ -1453,10 +1458,4 @@ CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y
CONFIG_INTERRUPT_ROLE_MASTER=y
# CONFIG_INTERRUPT_ROLE_SLAVE is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

18
bsp/phytium/aarch32/configs/e2000d_demo_rtthread.h
View File

@ -10,7 +10,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -32,6 +31,7 @@
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -124,6 +124,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -150,13 +151,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -277,6 +273,10 @@
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
/* end of Utilities */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -466,7 +466,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM2
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -535,10 +535,6 @@
#define USE_DEFAULT_INTERRUPT_CONFIG
#define INTERRUPT_ROLE_MASTER
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

45
bsp/phytium/aarch32/configs/e2000q_demo_rtsmart
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
CONFIG_RT_USING_CPU_USAGE_TRACER=y
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
CONFIG_RT_DEBUGING_CRITICAL=y
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -193,6 +195,7 @@ CONFIG_RT_PAGECACHE_GC_STOP_LEVEL=70
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -219,6 +222,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -245,21 +250,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -454,6 +450,15 @@ CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
#
# CONFIG_RT_USING_MEMBLOCK is not set
# end of Memory management
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1349,9 +1354,9 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
# CONFIG_RT_USING_SPIM2 is not set
CONFIG_RT_USING_SPIM2=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
@ -1376,8 +1381,8 @@ CONFIG_RT_USING_PWM2=y
# CONFIG_RT_USING_PWM7 is not set
CONFIG_BSP_USING_I2C=y
CONFIG_I2C_USE_MIO=y
CONFIG_RT_USING_MIO0=y
CONFIG_RT_USING_MIO1=y
# CONFIG_RT_USING_MIO0 is not set
# CONFIG_RT_USING_MIO1 is not set
# CONFIG_RT_USING_MIO2 is not set
# CONFIG_RT_USING_MIO3 is not set
# CONFIG_RT_USING_MIO4 is not set
@ -1391,7 +1396,7 @@ CONFIG_RT_USING_MIO1=y
# CONFIG_RT_USING_MIO12 is not set
# CONFIG_RT_USING_MIO13 is not set
# CONFIG_RT_USING_MIO14 is not set
# CONFIG_RT_USING_MIO15 is not set
CONFIG_RT_USING_MIO15=y
# CONFIG_I2C_USE_CONTROLLER is not set
CONFIG_BSP_USING_SDIF=y
CONFIG_BSP_USING_SDCARD_FATFS=y
@ -1403,7 +1408,7 @@ CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y
# CONFIG_RT_USING_DC_CHANNEL1 is not set
CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers
@ -1484,10 +1489,4 @@ CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y
CONFIG_INTERRUPT_ROLE_MASTER=y
# CONFIG_INTERRUPT_ROLE_SLAVE is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

23
bsp/phytium/aarch32/configs/e2000q_demo_rtsmart.h
View File

@ -11,7 +11,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -21,6 +20,7 @@
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 4096
#define RT_USING_CPU_USAGE_TRACER
/* kservice optimization */
@ -34,6 +34,7 @@
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_CRITICAL
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -138,6 +139,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -164,13 +166,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -309,6 +306,10 @@
/* Memory management */
/* end of Memory management */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -498,7 +499,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM2
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -513,8 +514,7 @@
#define RT_USING_PWM2
#define BSP_USING_I2C
#define I2C_USE_MIO
#define RT_USING_MIO0
#define RT_USING_MIO1
#define RT_USING_MIO15
#define BSP_USING_SDIF
#define BSP_USING_SDCARD_FATFS
#define USING_SDIF0
@ -523,6 +523,7 @@
#define USE_SDIF1_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1
/* end of On-chip Peripheral Drivers */
/* Board extended module Drivers */
@ -566,10 +567,6 @@
#define USE_DEFAULT_INTERRUPT_CONFIG
#define INTERRUPT_ROLE_MASTER
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

43
bsp/phytium/aarch32/configs/e2000q_demo_rtthread
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
# CONFIG_RT_DEBUGING_CRITICAL is not set
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -184,6 +186,7 @@ CONFIG_RT_USING_DFS_MQUEUE=y
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -210,6 +213,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -236,21 +241,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -422,6 +418,15 @@ CONFIG_RT_USING_ADT_REF=y
# end of Utilities
# CONFIG_RT_USING_VBUS is not set
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1317,9 +1322,9 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
# CONFIG_RT_USING_SPIM2 is not set
CONFIG_RT_USING_SPIM2=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
@ -1344,8 +1349,8 @@ CONFIG_RT_USING_PWM2=y
# CONFIG_RT_USING_PWM7 is not set
CONFIG_BSP_USING_I2C=y
CONFIG_I2C_USE_MIO=y
CONFIG_RT_USING_MIO0=y
CONFIG_RT_USING_MIO1=y
# CONFIG_RT_USING_MIO0 is not set
# CONFIG_RT_USING_MIO1 is not set
# CONFIG_RT_USING_MIO2 is not set
# CONFIG_RT_USING_MIO3 is not set
# CONFIG_RT_USING_MIO4 is not set
@ -1359,7 +1364,7 @@ CONFIG_RT_USING_MIO1=y
# CONFIG_RT_USING_MIO12 is not set
# CONFIG_RT_USING_MIO13 is not set
# CONFIG_RT_USING_MIO14 is not set
# CONFIG_RT_USING_MIO15 is not set
CONFIG_RT_USING_MIO15=y
# CONFIG_I2C_USE_CONTROLLER is not set
CONFIG_BSP_USING_SDIF=y
CONFIG_BSP_USING_SDCARD_FATFS=y
@ -1452,10 +1457,4 @@ CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y
CONFIG_INTERRUPT_ROLE_MASTER=y
# CONFIG_INTERRUPT_ROLE_SLAVE is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

21
bsp/phytium/aarch32/configs/e2000q_demo_rtthread.h
View File

@ -10,7 +10,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -32,6 +31,7 @@
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -124,6 +124,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -150,13 +151,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -277,6 +273,10 @@
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
/* end of Utilities */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -466,7 +466,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM2
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -481,8 +481,7 @@
#define RT_USING_PWM2
#define BSP_USING_I2C
#define I2C_USE_MIO
#define RT_USING_MIO0
#define RT_USING_MIO1
#define RT_USING_MIO15
#define BSP_USING_SDIF
#define BSP_USING_SDCARD_FATFS
#define USING_SDIF0
@ -535,10 +534,6 @@
#define USE_DEFAULT_INTERRUPT_CONFIG
#define INTERRUPT_ROLE_MASTER
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

41
bsp/phytium/aarch32/configs/phytium_pi_rtsmart
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
CONFIG_RT_USING_CPU_USAGE_TRACER=y
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
CONFIG_RT_DEBUGING_CRITICAL=y
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -193,6 +195,7 @@ CONFIG_RT_PAGECACHE_GC_STOP_LEVEL=70
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -219,6 +222,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -245,21 +250,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -454,6 +450,15 @@ CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
#
# CONFIG_RT_USING_MEMBLOCK is not set
# end of Memory management
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1391,10 +1396,10 @@ CONFIG_RT_USING_MIO1=y
# CONFIG_I2C_USE_CONTROLLER is not set
CONFIG_BSP_USING_SDIF=y
CONFIG_BSP_USING_SDCARD_FATFS=y
# CONFIG_USING_SDIF0 is not set
CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_USING_SDIF0=y
CONFIG_USE_SDIF0_TF=y
# CONFIG_USE_SDIF0_EMMC is not set
# CONFIG_USING_SDIF1 is not set
CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y
# CONFIG_RT_USING_DC_CHANNEL1 is not set
@ -1477,10 +1482,4 @@ CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y
CONFIG_INTERRUPT_ROLE_MASTER=y
# CONFIG_INTERRUPT_ROLE_SLAVE is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

21
bsp/phytium/aarch32/configs/phytium_pi_rtsmart.h
View File

@ -11,7 +11,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -21,6 +20,7 @@
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 4096
#define RT_USING_CPU_USAGE_TRACER
/* kservice optimization */
@ -34,6 +34,7 @@
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_CRITICAL
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -138,6 +139,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -164,13 +166,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -309,6 +306,10 @@
/* Memory management */
/* end of Memory management */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -513,8 +514,8 @@
#define RT_USING_MIO1
#define BSP_USING_SDIF
#define BSP_USING_SDCARD_FATFS
#define USING_SDIF1
#define USE_SDIF1_TF
#define USING_SDIF0
#define USE_SDIF0_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
/* end of On-chip Peripheral Drivers */
@ -559,10 +560,6 @@
#define USE_DEFAULT_INTERRUPT_CONFIG
#define INTERRUPT_ROLE_MASTER
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

41
bsp/phytium/aarch32/configs/phytium_pi_rtthread
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
# CONFIG_RT_DEBUGING_CRITICAL is not set
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -184,6 +186,7 @@ CONFIG_RT_USING_DFS_MQUEUE=y
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -210,6 +213,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -236,21 +241,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -422,6 +418,15 @@ CONFIG_RT_USING_ADT_REF=y
# end of Utilities
# CONFIG_RT_USING_VBUS is not set
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1359,10 +1364,10 @@ CONFIG_RT_USING_MIO1=y
# CONFIG_I2C_USE_CONTROLLER is not set
CONFIG_BSP_USING_SDIF=y
CONFIG_BSP_USING_SDCARD_FATFS=y
# CONFIG_USING_SDIF0 is not set
CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_USING_SDIF0=y
CONFIG_USE_SDIF0_TF=y
# CONFIG_USE_SDIF0_EMMC is not set
# CONFIG_USING_SDIF1 is not set
CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y
@ -1445,10 +1450,4 @@ CONFIG_USE_DEFAULT_INTERRUPT_CONFIG=y
CONFIG_INTERRUPT_ROLE_MASTER=y
# CONFIG_INTERRUPT_ROLE_SLAVE is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

20
bsp/phytium/aarch32/configs/phytium_pi_rtthread.h
View File

@ -10,7 +10,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -32,6 +31,7 @@
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -124,6 +124,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -150,13 +151,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -277,6 +273,10 @@
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
/* end of Utilities */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -481,8 +481,8 @@
#define RT_USING_MIO1
#define BSP_USING_SDIF
#define BSP_USING_SDCARD_FATFS
#define USING_SDIF1
#define USE_SDIF1_TF
#define USING_SDIF0
#define USE_SDIF0_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1
@ -528,10 +528,6 @@
#define USE_DEFAULT_INTERRUPT_CONFIG
#define INTERRUPT_ROLE_MASTER
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

4
bsp/phytium/aarch32/makefile
View File

@ -37,8 +37,8 @@ endif
boot:
make all
cp rtthread_a32.elf /mnt/d/tftboot
cp rtthread_a32.bin /mnt/d/tftboot
cp rtthread_a32.elf /mnt/d/tftpboot
cp rtthread_a32.bin /mnt/d/tftpboot
debug:
@$(OD) -D rtthread_a32.elf > rtthread_a32.asm

31
bsp/phytium/aarch32/rtconfig.h
View File

@ -5,12 +5,11 @@
#define RT_NAME_MAX 16
#define RT_USING_SMP
#define RT_CPUS_NR 2
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -32,6 +31,7 @@
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -124,6 +124,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -150,13 +151,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -277,6 +273,10 @@
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
/* end of Utilities */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -466,7 +466,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM2
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -481,8 +481,7 @@
#define RT_USING_PWM2
#define BSP_USING_I2C
#define I2C_USE_MIO
#define RT_USING_MIO0
#define RT_USING_MIO1
#define RT_USING_MIO15
#define BSP_USING_SDIF
#define BSP_USING_SDCARD_FATFS
#define USING_SDIF0
@ -506,10 +505,10 @@
/* Soc configuration */
#define TARGET_E2000D
#define TARGET_E2000Q
#define SOC_NAME "e2000"
#define TARGET_TYPE_NAME "d"
#define SOC_CORE_NUM 2
#define TARGET_TYPE_NAME "q"
#define SOC_CORE_NUM 4
#define F32BIT_MEMORY_ADDRESS 0x80000000
#define F32BIT_MEMORY_LENGTH 0x80000000
#define F64BIT_MEMORY_ADDRESS 0x2000000000
@ -520,8 +519,8 @@
/* Board Configuration */
#define E2000D_DEMO_BOARD
#define BOARD_NAME "demo"
#define E2000Q_DEMO_BOARD
/* IO mux configuration when board start up */
@ -535,10 +534,6 @@
#define USE_DEFAULT_INTERRUPT_CONFIG
#define INTERRUPT_ROLE_MASTER
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

66
bsp/phytium/aarch64/.config
View File

@ -8,14 +8,13 @@ CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_NANO is not set
# CONFIG_RT_USING_AMP is not set
CONFIG_RT_USING_SMP=y
CONFIG_RT_CPUS_NR=2
CONFIG_RT_CPUS_NR=4
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=8192
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_COLOR=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
# CONFIG_RT_DEBUGING_CRITICAL is not set
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -103,6 +105,8 @@ CONFIG_ARCH_RAM_OFFSET=0x80000000
CONFIG_ARCH_SECONDARY_CPU_STACK_SIZE=4096
CONFIG_ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
# CONFIG_ARCH_USING_GENERIC_CPUID is not set
CONFIG_ARCH_HEAP_SIZE=0x4000000
CONFIG_ARCH_INIT_PAGE_SIZE=0x200000
# end of AArch64 Architecture Configuration
CONFIG_ARCH_CPU_64BIT=y
@ -193,6 +197,7 @@ CONFIG_RT_USING_DFS_RAMFS=y
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -219,6 +224,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -245,21 +252,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -428,6 +426,15 @@ CONFIG_RT_USING_ADT_REF=y
# end of Utilities
# CONFIG_RT_USING_VBUS is not set
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1347,10 +1354,10 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
CONFIG_RT_USING_SPIM1=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
CONFIG_RT_USING_SPIM2=y
CONFIG_RT_USING_SPIM3=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
# CONFIG_RT_USING_FILTER is not set
@ -1400,7 +1407,7 @@ CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_BSP_USING_DC=y
# CONFIG_RT_USING_DC_CHANNEL0 is not set
CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
@ -1414,7 +1421,7 @@ CONFIG_RT_USING_DC_CHANNEL1=y
CONFIG_BSP_USING_GIC=y
CONFIG_BSP_USING_GICV3=y
CONFIG_PHYTIUM_ARCH_AARCH64=y
CONFIG_ARM_SPI_BIND_CPU_ID=0
CONFIG_ARM_SPI_BIND_CPU_ID=2
#
# Standalone Setting
@ -1425,15 +1432,15 @@ CONFIG_TARGET_ARMV8_AARCH64=y
# Soc configuration
#
# CONFIG_TARGET_PHYTIUMPI is not set
# CONFIG_TARGET_E2000Q is not set
CONFIG_TARGET_E2000D=y
CONFIG_TARGET_E2000Q=y
# CONFIG_TARGET_E2000D is not set
# CONFIG_TARGET_E2000S is not set
# CONFIG_TARGET_FT2004 is not set
# CONFIG_TARGET_D2000 is not set
# CONFIG_TARGET_PD2308 is not set
CONFIG_SOC_NAME="e2000"
CONFIG_TARGET_TYPE_NAME="d"
CONFIG_SOC_CORE_NUM=2
CONFIG_TARGET_TYPE_NAME="q"
CONFIG_SOC_CORE_NUM=4
CONFIG_F32BIT_MEMORY_ADDRESS=0x80000000
CONFIG_F32BIT_MEMORY_LENGTH=0x80000000
CONFIG_F64BIT_MEMORY_ADDRESS=0x2000000000
@ -1447,22 +1454,21 @@ CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
#
# Board Configuration
#
CONFIG_E2000D_DEMO_BOARD=y
CONFIG_BOARD_NAME="demo"
#
# IO mux configuration when board start up
#
# CONFIG_USE_SPI_IOPAD is not set
# CONFIG_USE_GPIO_IOPAD is not set
# CONFIG_USE_CAN_IOPAD is not set
# CONFIG_USE_QSPI_IOPAD is not set
# CONFIG_USE_PWM_IOPAD is not set
# CONFIG_USE_ADC_IOPAD is not set
# CONFIG_USE_MIO_IOPAD is not set
# CONFIG_USE_TACHO_IOPAD is not set
# CONFIG_USE_UART_IOPAD is not set
# CONFIG_USE_THIRD_PARTY_IOPAD is not set
CONFIG_E2000Q_DEMO_BOARD=y
#
# IO mux configuration when board start up
#
# end of IO mux configuration when board start up
# CONFIG_CUS_DEMO_BOARD is not set
@ -1483,10 +1489,4 @@ CONFIG_LOG_DEBUG=y
# CONFIG_BOOTUP_DEBUG_PRINTS is not set
# CONFIG_USE_DEFAULT_INTERRUPT_CONFIG is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

2
bsp/phytium/aarch64/Kconfig
View File

@ -2,8 +2,6 @@ mainmenu "RT-Thread Project Configuration"
RTT_DIR := ../../..
BSP_DIR := ../.
SDK_DIR:= .././libraries/phytium_standalone_sdk
PKGS_DIR := packages

4
bsp/phytium/aarch64/applications/main.c
View File

@ -55,7 +55,7 @@ static void demo_core_thread(void *parameter)
level = rt_cpus_lock();
rt_kprintf("Hi, core%d \r\n", rt_hw_cpu_id());
rt_cpus_unlock(level);
rt_thread_mdelay(200000);
rt_thread_mdelay(20000);
}
}
@ -71,7 +71,7 @@ void demo_core(void)
demo_core_thread,
RT_NULL,
&core_stack[i],
4096,
2048,
20,
32);

43
bsp/phytium/aarch64/configs/e2000d_demo_rtsmart
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=8192
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
CONFIG_RT_USING_CPU_USAGE_TRACER=y
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
CONFIG_RT_DEBUGING_CRITICAL=y
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -103,6 +105,8 @@ CONFIG_ARCH_RAM_OFFSET=0x80000000
CONFIG_ARCH_SECONDARY_CPU_STACK_SIZE=4096
CONFIG_ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
# CONFIG_ARCH_USING_GENERIC_CPUID is not set
CONFIG_ARCH_HEAP_SIZE=0x4000000
CONFIG_ARCH_INIT_PAGE_SIZE=0x200000
# end of AArch64 Architecture Configuration
CONFIG_ARCH_CPU_64BIT=y
@ -201,6 +205,7 @@ CONFIG_RT_PAGECACHE_GC_STOP_LEVEL=70
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -227,6 +232,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -253,21 +260,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -486,6 +484,15 @@ CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
#
# CONFIG_RT_USING_MEMBLOCK is not set
# end of Memory management
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1405,10 +1412,10 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
CONFIG_RT_USING_SPIM1=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
CONFIG_RT_USING_SPIM2=y
CONFIG_RT_USING_SPIM3=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
# CONFIG_RT_USING_FILTER is not set
@ -1458,7 +1465,7 @@ CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_BSP_USING_DC=y
# CONFIG_RT_USING_DC_CHANNEL0 is not set
CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
@ -1541,10 +1548,4 @@ CONFIG_LOG_DEBUG=y
# CONFIG_BOOTUP_DEBUG_PRINTS is not set
# CONFIG_USE_DEFAULT_INTERRUPT_CONFIG is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

23
bsp/phytium/aarch64/configs/e2000d_demo_rtsmart.h
View File

@ -11,7 +11,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -21,6 +20,7 @@
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 8192
#define RT_USING_CPU_USAGE_TRACER
/* kservice optimization */
@ -35,6 +35,7 @@
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_CRITICAL
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -73,6 +74,8 @@
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
#define ARCH_HEAP_SIZE 0x4000000
#define ARCH_INIT_PAGE_SIZE 0x200000
/* end of AArch64 Architecture Configuration */
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
@ -146,6 +149,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -173,13 +177,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -310,6 +309,10 @@
/* Memory management */
/* end of Memory management */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -502,10 +505,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM1
#define RT_USING_SPIM2
#define RT_USING_SPIM3
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -528,6 +528,7 @@
#define USING_SDIF1
#define USE_SDIF1_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1
/* end of On-chip Peripheral Drivers */
@ -572,10 +573,6 @@
#define ELOG_LINE_BUF_SIZE 0x100
#define LOG_DEBUG
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

43
bsp/phytium/aarch64/configs/e2000d_demo_rtthread
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=8192
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_COLOR=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
# CONFIG_RT_DEBUGING_CRITICAL is not set
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -103,6 +105,8 @@ CONFIG_ARCH_RAM_OFFSET=0x80000000
CONFIG_ARCH_SECONDARY_CPU_STACK_SIZE=4096
CONFIG_ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
# CONFIG_ARCH_USING_GENERIC_CPUID is not set
CONFIG_ARCH_HEAP_SIZE=0x4000000
CONFIG_ARCH_INIT_PAGE_SIZE=0x200000
# end of AArch64 Architecture Configuration
CONFIG_ARCH_CPU_64BIT=y
@ -193,6 +197,7 @@ CONFIG_RT_USING_DFS_RAMFS=y
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -219,6 +224,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -245,21 +252,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -428,6 +426,15 @@ CONFIG_RT_USING_ADT_REF=y
# end of Utilities
# CONFIG_RT_USING_VBUS is not set
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1347,10 +1354,10 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
CONFIG_RT_USING_SPIM1=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
CONFIG_RT_USING_SPIM2=y
CONFIG_RT_USING_SPIM3=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
# CONFIG_RT_USING_FILTER is not set
@ -1400,7 +1407,7 @@ CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_BSP_USING_DC=y
# CONFIG_RT_USING_DC_CHANNEL0 is not set
CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
@ -1483,10 +1490,4 @@ CONFIG_LOG_DEBUG=y
# CONFIG_BOOTUP_DEBUG_PRINTS is not set
# CONFIG_USE_DEFAULT_INTERRUPT_CONFIG is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

22
bsp/phytium/aarch64/configs/e2000d_demo_rtthread.h
View File

@ -10,7 +10,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -32,6 +31,7 @@
#define RT_USING_DEBUG
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -68,6 +68,8 @@
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
#define ARCH_HEAP_SIZE 0x4000000
#define ARCH_INIT_PAGE_SIZE 0x200000
/* end of AArch64 Architecture Configuration */
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
@ -131,6 +133,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -158,13 +161,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -275,6 +273,10 @@
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
/* end of Utilities */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -467,10 +469,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM1
#define RT_USING_SPIM2
#define RT_USING_SPIM3
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -493,6 +492,7 @@
#define USING_SDIF1
#define USE_SDIF1_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1
/* end of On-chip Peripheral Drivers */
@ -537,10 +537,6 @@
#define ELOG_LINE_BUF_SIZE 0x100
#define LOG_DEBUG
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

43
bsp/phytium/aarch64/configs/e2000q_demo_rtsmart
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=8192
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
CONFIG_RT_USING_CPU_USAGE_TRACER=y
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
CONFIG_RT_DEBUGING_CRITICAL=y
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -103,6 +105,8 @@ CONFIG_ARCH_RAM_OFFSET=0x80000000
CONFIG_ARCH_SECONDARY_CPU_STACK_SIZE=4096
CONFIG_ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
# CONFIG_ARCH_USING_GENERIC_CPUID is not set
CONFIG_ARCH_HEAP_SIZE=0x4000000
CONFIG_ARCH_INIT_PAGE_SIZE=0x200000
# end of AArch64 Architecture Configuration
CONFIG_ARCH_CPU_64BIT=y
@ -201,6 +205,7 @@ CONFIG_RT_PAGECACHE_GC_STOP_LEVEL=70
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -227,6 +232,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -253,21 +260,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -486,6 +484,15 @@ CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
#
# CONFIG_RT_USING_MEMBLOCK is not set
# end of Memory management
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1405,10 +1412,10 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
CONFIG_RT_USING_SPIM1=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
CONFIG_RT_USING_SPIM2=y
CONFIG_RT_USING_SPIM3=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
# CONFIG_RT_USING_FILTER is not set
@ -1458,7 +1465,7 @@ CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_BSP_USING_DC=y
# CONFIG_RT_USING_DC_CHANNEL0 is not set
CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
@ -1540,10 +1547,4 @@ CONFIG_LOG_DEBUG=y
# CONFIG_BOOTUP_DEBUG_PRINTS is not set
# CONFIG_USE_DEFAULT_INTERRUPT_CONFIG is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

23
bsp/phytium/aarch64/configs/e2000q_demo_rtsmart.h
View File

@ -11,7 +11,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -21,6 +20,7 @@
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 8192
#define RT_USING_CPU_USAGE_TRACER
/* kservice optimization */
@ -35,6 +35,7 @@
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_CRITICAL
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -73,6 +74,8 @@
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
#define ARCH_HEAP_SIZE 0x4000000
#define ARCH_INIT_PAGE_SIZE 0x200000
/* end of AArch64 Architecture Configuration */
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
@ -146,6 +149,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -173,13 +177,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -310,6 +309,10 @@
/* Memory management */
/* end of Memory management */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -502,10 +505,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM1
#define RT_USING_SPIM2
#define RT_USING_SPIM3
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -528,6 +528,7 @@
#define USING_SDIF1
#define USE_SDIF1_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1
/* end of On-chip Peripheral Drivers */
@ -572,10 +573,6 @@
#define ELOG_LINE_BUF_SIZE 0x100
#define LOG_DEBUG
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

43
bsp/phytium/aarch64/configs/e2000q_demo_rtthread
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=8192
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_COLOR=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
# CONFIG_RT_DEBUGING_CRITICAL is not set
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -103,6 +105,8 @@ CONFIG_ARCH_RAM_OFFSET=0x80000000
CONFIG_ARCH_SECONDARY_CPU_STACK_SIZE=4096
CONFIG_ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
# CONFIG_ARCH_USING_GENERIC_CPUID is not set
CONFIG_ARCH_HEAP_SIZE=0x4000000
CONFIG_ARCH_INIT_PAGE_SIZE=0x200000
# end of AArch64 Architecture Configuration
CONFIG_ARCH_CPU_64BIT=y
@ -193,6 +197,7 @@ CONFIG_RT_USING_DFS_RAMFS=y
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -219,6 +224,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -245,21 +252,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -428,6 +426,15 @@ CONFIG_RT_USING_ADT_REF=y
# end of Utilities
# CONFIG_RT_USING_VBUS is not set
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1347,10 +1354,10 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
CONFIG_RT_USING_SPIM1=y
# CONFIG_RT_USING_SPIM0 is not set
# CONFIG_RT_USING_SPIM1 is not set
CONFIG_RT_USING_SPIM2=y
CONFIG_RT_USING_SPIM3=y
# CONFIG_RT_USING_SPIM3 is not set
CONFIG_BSP_USING_CAN=y
CONFIG_RT_USING_CANFD=y
# CONFIG_RT_USING_FILTER is not set
@ -1400,7 +1407,7 @@ CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_BSP_USING_DC=y
# CONFIG_RT_USING_DC_CHANNEL0 is not set
CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
@ -1482,10 +1489,4 @@ CONFIG_LOG_DEBUG=y
# CONFIG_BOOTUP_DEBUG_PRINTS is not set
# CONFIG_USE_DEFAULT_INTERRUPT_CONFIG is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

22
bsp/phytium/aarch64/configs/e2000q_demo_rtthread.h
View File

@ -10,7 +10,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -32,6 +31,7 @@
#define RT_USING_DEBUG
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -68,6 +68,8 @@
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
#define ARCH_HEAP_SIZE 0x4000000
#define ARCH_INIT_PAGE_SIZE 0x200000
/* end of AArch64 Architecture Configuration */
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
@ -131,6 +133,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -158,13 +161,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -275,6 +273,10 @@
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
/* end of Utilities */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -467,10 +469,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM1
#define RT_USING_SPIM2
#define RT_USING_SPIM3
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -493,6 +492,7 @@
#define USING_SDIF1
#define USE_SDIF1_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1
/* end of On-chip Peripheral Drivers */
@ -537,10 +537,6 @@
#define ELOG_LINE_BUF_SIZE 0x100
#define LOG_DEBUG
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

49
bsp/phytium/aarch64/configs/phytium_pi_rtsmart
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=8192
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
CONFIG_RT_USING_CPU_USAGE_TRACER=y
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
CONFIG_RT_DEBUGING_CRITICAL=y
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -103,6 +105,8 @@ CONFIG_ARCH_RAM_OFFSET=0x80000000
CONFIG_ARCH_SECONDARY_CPU_STACK_SIZE=4096
CONFIG_ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
# CONFIG_ARCH_USING_GENERIC_CPUID is not set
CONFIG_ARCH_HEAP_SIZE=0x4000000
CONFIG_ARCH_INIT_PAGE_SIZE=0x200000
# end of AArch64 Architecture Configuration
CONFIG_ARCH_CPU_64BIT=y
@ -201,6 +205,7 @@ CONFIG_RT_PAGECACHE_GC_STOP_LEVEL=70
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -227,6 +232,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -253,21 +260,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -458,6 +456,15 @@ CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
#
# CONFIG_RT_USING_MEMBLOCK is not set
# end of Memory management
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1378,9 +1385,9 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
CONFIG_RT_USING_SPIM1=y
CONFIG_RT_USING_SPIM2=y
CONFIG_RT_USING_SPIM3=y
# CONFIG_RT_USING_SPIM1 is not set
# CONFIG_RT_USING_SPIM2 is not set
# CONFIG_RT_USING_SPIM3 is not set
# CONFIG_BSP_USING_CAN is not set
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_QSPI=y
@ -1419,10 +1426,10 @@ CONFIG_RT_USING_MIO10=y
# CONFIG_I2C_USE_CONTROLLER is not set
CONFIG_BSP_USING_SDIF=y
CONFIG_BSP_USING_SDCARD_FATFS=y
# CONFIG_USING_SDIF0 is not set
CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_USING_SDIF0=y
CONFIG_USE_SDIF0_TF=y
# CONFIG_USE_SDIF0_EMMC is not set
# CONFIG_USING_SDIF1 is not set
CONFIG_BSP_USING_DC=y
CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y
@ -1505,10 +1512,4 @@ CONFIG_LOG_DEBUG=y
# CONFIG_BOOTUP_DEBUG_PRINTS is not set
# CONFIG_USE_DEFAULT_INTERRUPT_CONFIG is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

26
bsp/phytium/aarch64/configs/phytium_pi_rtsmart.h
View File

@ -11,7 +11,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -21,6 +20,7 @@
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 8192
#define RT_USING_CPU_USAGE_TRACER
/* kservice optimization */
@ -35,6 +35,7 @@
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_CRITICAL
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -73,6 +74,8 @@
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
#define ARCH_HEAP_SIZE 0x4000000
#define ARCH_INIT_PAGE_SIZE 0x200000
/* end of AArch64 Architecture Configuration */
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
@ -146,6 +149,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -172,13 +176,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -307,6 +306,10 @@
/* Memory management */
/* end of Memory management */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -500,9 +503,6 @@
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM1
#define RT_USING_SPIM2
#define RT_USING_SPIM3
#define BSP_USING_GPIO
#define BSP_USING_QSPI
#define RT_USING_QSPI0
@ -519,8 +519,8 @@
#define RT_USING_MIO10
#define BSP_USING_SDIF
#define BSP_USING_SDCARD_FATFS
#define USING_SDIF1
#define USE_SDIF1_TF
#define USING_SDIF0
#define USE_SDIF0_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1
@ -566,10 +566,6 @@
#define ELOG_LINE_BUF_SIZE 0x100
#define LOG_DEBUG
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

45
bsp/phytium/aarch64/configs/phytium_pi_rtthread
View File

@ -15,7 +15,6 @@ CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
# CONFIG_RT_USING_HOOKLIST is not set
@ -26,6 +25,8 @@ CONFIG_SYSTEM_THREAD_STACK_SIZE=8192
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
#
# kservice optimization
@ -49,6 +50,7 @@ CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
# CONFIG_RT_DEBUGING_CRITICAL is not set
CONFIG_RT_USING_OVERFLOW_CHECK=y
#
# Inter-Thread communication
@ -103,6 +105,8 @@ CONFIG_ARCH_RAM_OFFSET=0x80000000
CONFIG_ARCH_SECONDARY_CPU_STACK_SIZE=4096
CONFIG_ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
# CONFIG_ARCH_USING_GENERIC_CPUID is not set
CONFIG_ARCH_HEAP_SIZE=0x4000000
CONFIG_ARCH_INIT_PAGE_SIZE=0x200000
# end of AArch64 Architecture Configuration
CONFIG_ARCH_CPU_64BIT=y
@ -193,6 +197,7 @@ CONFIG_RT_USING_DFS_RAMFS=y
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@ -219,6 +224,8 @@ CONFIG_RT_USING_NULL=y
CONFIG_RT_USING_ZERO=y
CONFIG_RT_USING_RANDOM=y
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
@ -245,21 +252,12 @@ CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
CONFIG_RT_USING_DEV_BUS=y
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_VIRTIO is not set
CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_KTIME=y
# CONFIG_RT_USING_HWTIMER is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# CONFIG_RT_USING_CHERRYUSB is not set
# end of Device Drivers
#
@ -428,6 +426,15 @@ CONFIG_RT_USING_ADT_REF=y
# end of Utilities
# CONFIG_RT_USING_VBUS is not set
#
# Using USB legacy version
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB legacy version
# CONFIG_RT_USING_FDT is not set
# end of RT-Thread Components
#
@ -1348,9 +1355,9 @@ CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART3 is not set
CONFIG_BSP_USING_SPI=y
CONFIG_RT_USING_SPIM0=y
CONFIG_RT_USING_SPIM1=y
CONFIG_RT_USING_SPIM2=y
CONFIG_RT_USING_SPIM3=y
# CONFIG_RT_USING_SPIM1 is not set
# CONFIG_RT_USING_SPIM2 is not set
# CONFIG_RT_USING_SPIM3 is not set
# CONFIG_BSP_USING_CAN is not set
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_QSPI=y
@ -1394,8 +1401,8 @@ CONFIG_USING_SDIF1=y
CONFIG_USE_SDIF1_TF=y
# CONFIG_USE_SDIF1_EMMC is not set
CONFIG_BSP_USING_DC=y
# CONFIG_RT_USING_DC_CHANNEL0 is not set
# CONFIG_RT_USING_DC_CHANNEL1 is not set
CONFIG_RT_USING_DC_CHANNEL0=y
CONFIG_RT_USING_DC_CHANNEL1=y
# CONFIG_BSP_USING_XHCI is not set
# CONFIG_BSP_USING_PUSB2 is not set
# end of On-chip Peripheral Drivers
@ -1475,10 +1482,4 @@ CONFIG_LOG_DEBUG=y
# CONFIG_BOOTUP_DEBUG_PRINTS is not set
# CONFIG_USE_DEFAULT_INTERRUPT_CONFIG is not set
# end of Sdk common configuration
#
# Image information configuration
#
# CONFIG_IMAGE_INFO is not set
# end of Image information configuration
# end of Standalone Setting

23
bsp/phytium/aarch64/configs/phytium_pi_rtthread.h
View File

@ -10,7 +10,6 @@
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -33,6 +32,7 @@
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -69,6 +69,8 @@
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
#define ARCH_HEAP_SIZE 0x4000000
#define ARCH_INIT_PAGE_SIZE 0x200000
/* end of AArch64 Architecture Configuration */
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
@ -132,6 +134,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -158,13 +161,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -275,6 +273,10 @@
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
/* end of Utilities */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -468,9 +470,6 @@
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM1
#define RT_USING_SPIM2
#define RT_USING_SPIM3
#define BSP_USING_GPIO
#define BSP_USING_QSPI
#define RT_USING_QSPI0
@ -490,6 +489,8 @@
#define USING_SDIF1
#define USE_SDIF1_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1
/* end of On-chip Peripheral Drivers */
/* Board extended module Drivers */
@ -532,10 +533,6 @@
#define ELOG_LINE_BUF_SIZE 0x100
#define LOG_DEBUG
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

4
bsp/phytium/aarch64/makefile
View File

@ -38,8 +38,8 @@ endif
boot:
make all
cp rtthread_a64.elf /mnt/d/tftboot
cp rtthread_a64.bin /mnt/d/tftboot
cp rtthread_a64.elf /mnt/d/tftpboot
cp rtthread_a64.bin /mnt/d/tftpboot
debug:
@$(OD) -D rtthread_a64.elf > rtthread_a64.asm

34
bsp/phytium/aarch64/rtconfig.h
View File

@ -5,12 +5,11 @@
#define RT_NAME_MAX 16
#define RT_USING_SMP
#define RT_CPUS_NR 2
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
@ -32,6 +31,7 @@
#define RT_USING_DEBUG
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_USING_OVERFLOW_CHECK
/* Inter-Thread communication */
@ -68,6 +68,8 @@
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
#define ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
#define ARCH_HEAP_SIZE 0x4000000
#define ARCH_INIT_PAGE_SIZE 0x200000
/* end of AArch64 Architecture Configuration */
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
@ -131,6 +133,7 @@
/* Device Drivers */
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SYSTEM_WORKQUEUE
@ -158,13 +161,8 @@
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
#define RT_USING_PIN
#define RT_USING_KTIME
/* Using USB */
/* end of Using USB */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@ -275,6 +273,10 @@
#define RT_USING_ADT_HASHMAP
#define RT_USING_ADT_REF
/* end of Utilities */
/* Using USB legacy version */
/* end of Using USB legacy version */
/* end of RT-Thread Components */
/* RT-Thread Utestcases */
@ -467,10 +469,7 @@
#define RT_USING_UART0
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM0
#define RT_USING_SPIM1
#define RT_USING_SPIM2
#define RT_USING_SPIM3
#define BSP_USING_CAN
#define RT_USING_CANFD
#define RT_USING_CAN0
@ -493,6 +492,7 @@
#define USING_SDIF1
#define USE_SDIF1_TF
#define BSP_USING_DC
#define RT_USING_DC_CHANNEL0
#define RT_USING_DC_CHANNEL1
/* end of On-chip Peripheral Drivers */
@ -502,7 +502,7 @@
#define BSP_USING_GIC
#define BSP_USING_GICV3
#define PHYTIUM_ARCH_AARCH64
#define ARM_SPI_BIND_CPU_ID 0
#define ARM_SPI_BIND_CPU_ID 2
/* Standalone Setting */
@ -510,10 +510,10 @@
/* Soc configuration */
#define TARGET_E2000D
#define TARGET_E2000Q
#define SOC_NAME "e2000"
#define TARGET_TYPE_NAME "d"
#define SOC_CORE_NUM 2
#define TARGET_TYPE_NAME "q"
#define SOC_CORE_NUM 4
#define F32BIT_MEMORY_ADDRESS 0x80000000
#define F32BIT_MEMORY_LENGTH 0x80000000
#define F64BIT_MEMORY_ADDRESS 0x2000000000
@ -524,8 +524,8 @@
/* Board Configuration */
#define E2000D_DEMO_BOARD
#define BOARD_NAME "demo"
#define E2000Q_DEMO_BOARD
/* IO mux configuration when board start up */
@ -537,10 +537,6 @@
#define ELOG_LINE_BUF_SIZE 0x100
#define LOG_DEBUG
/* end of Sdk common configuration */
/* Image information configuration */
/* end of Image information configuration */
/* end of Standalone Setting */
#endif

43
bsp/phytium/board/board.c
View File

@ -17,6 +17,7 @@
#include "rtconfig.h"
#include <rthw.h>
#include <rtthread.h>
#include <phytium_cpu.h>
#include <mmu.h>
#include <mm_aspace.h> /* TODO: why need application space when RT_SMART off */
@ -203,7 +204,7 @@ void rt_hw_board_aarch32_init(void)
rt_hw_mmu_map_init(&rt_kernel_space, (void *)0xf0000000, 0x10000000, MMUTable, PV_OFFSET);
rt_hw_init_mmu_table(platform_mem_desc,platform_mem_desc_size) ;
mmutable_p = (rt_uint32_t)MMUTable + (rt_uint32_t)PV_OFFSET ;
rt_hw_mmu_switch(mmutable_p) ;
rt_hw_mmu_switch((void*)mmutable_p) ;
rt_page_init(init_page_region);
/* rt_kernel_space 在start_gcc.S 中被初始化，此函数将iomap 空间放置在kernel space 上 */
rt_hw_mmu_ioremap_init(&rt_kernel_space, (void *)0xf0000000, 0x10000000);
@ -229,51 +230,13 @@ void rt_hw_board_aarch32_init(void)
#if defined(FT_GIC_REDISTRUBUTIOR_OFFSET)
cpu_offset = FT_GIC_REDISTRUBUTIOR_OFFSET ;
#endif
rt_uint32_t redist_addr = 0;
FEarlyUartProbe();
FIOMuxInit();
#if defined(RT_USING_SMART)
redist_addr = (uint32_t)rt_ioremap(GICV3_RD_BASE_ADDR, 4 * 128 * 1024);
#else
redist_addr = GICV3_RD_BASE_ADDR;
#endif
arm_gic_redist_address_set(0, redist_addr + (cpu_id + cpu_offset) * GICV3_RD_OFFSET, rt_hw_cpu_id());
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
#if RT_CPUS_NR == 2
arm_gic_redist_address_set(0, redist_addr + 3 * GICV3_RD_OFFSET, 1);
#elif RT_CPUS_NR == 3
arm_gic_redist_address_set(0, redist_addr + 3 * GICV3_RD_OFFSET, 1);
arm_gic_redist_address_set(0, redist_addr, 2);
#elif RT_CPUS_NR == 4
arm_gic_redist_address_set(0, redist_addr + 3 * GICV3_RD_OFFSET, 1);
arm_gic_redist_address_set(0, redist_addr, 2);
arm_gic_redist_address_set(0, redist_addr + GICV3_RD_OFFSET, 3);
#endif
#else
#if RT_CPUS_NR == 2
arm_gic_redist_address_set(0, redist_addr + (1 + cpu_offset) * GICV3_RD_OFFSET, 1);
#elif RT_CPUS_NR == 3
arm_gic_redist_address_set(0, redist_addr + (1 + cpu_offset) * GICV3_RD_OFFSET, 1);
arm_gic_redist_address_set(0, redist_addr + (2 + cpu_offset) * GICV3_RD_OFFSET, 2);
#elif RT_CPUS_NR == 4
arm_gic_redist_address_set(0, redist_addr + (1 + cpu_offset) * GICV3_RD_OFFSET, 1);
arm_gic_redist_address_set(0, redist_addr + (2 + cpu_offset) * GICV3_RD_OFFSET, 2);
arm_gic_redist_address_set(0, redist_addr + (3 + cpu_offset) * GICV3_RD_OFFSET, 3);
#endif
#endif
arm_gic_redist_address_set(0, platform_get_gic_redist_base(), rt_hw_cpu_id());
rt_hw_interrupt_init();
/* compoent init */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();

4
bsp/phytium/board/phytium_cpu.c
View File

@ -50,6 +50,8 @@ int phytium_cpu_id_mapping(int cpu_id)
#endif
}
#if defined(TARGET_ARMV8_AARCH32)
int rt_hw_cpu_id(void)
{
FError ret;
@ -63,8 +65,6 @@ int rt_hw_cpu_id(void)
return phytium_cpu_id_mapping(cpu_id);
}
#if defined(TARGET_ARMV8_AARCH32)
rt_uint64_t get_main_cpu_affval(void)
{
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)

47
bsp/phytium/board/phytium_cpu.h
View File

@ -16,8 +16,11 @@
#include <rthw.h>
#include <rtthread.h>
#include <gicv3.h>
#include "fparameters.h"
#include "fio.h"
#include "faarch.h"
#ifdef RT_USING_SMART
#include"ioremap.h"
#endif
@ -43,14 +46,52 @@ rt_inline rt_uint32_t platform_get_gic_dist_base(void)
return GICV3_DISTRIBUTOR_BASE_ADDR;
}
#if defined(TARGET_ARMV8_AARCH64)
/* the basic constants and interfaces needed by gic */
rt_inline rt_uint32_t platform_get_gic_redist_base(void)
rt_inline uintptr_t platform_get_gic_redist_base(void)
{
uintptr_t redis_base, mpidr_aff, gicr_typer_aff;
mpidr_aff = (uintptr_t)(GetAffinity() & 0xfff);
for (redis_base = GICV3_RD_BASE_ADDR; redis_base < GICV3_RD_BASE_ADDR + GICV3_RD_SIZE; redis_base += GICV3_RD_OFFSET)
{
#ifdef RT_USING_SMART
uintptr_t redis_base_virtual = (uintptr_t)rt_ioremap((void *)redis_base, GICV3_RD_OFFSET);
if (redis_base_virtual == 0)
{
continue;
}
#if defined(TARGET_ARMV8_AARCH64)
gicr_typer_aff = GIC_RDIST_TYPER(redis_base_virtual) >> 32;
#else
gicr_typer_aff = GIC_RDIST_TYPER(redis_base_virtual + 0x4);
#endif
if (mpidr_aff == gicr_typer_aff)
{
return redis_base_virtual;
}
else
{
rt_iounmap(redis_base_virtual);
}
#else
#if defined(TARGET_ARMV8_AARCH64)
gicr_typer_aff = GIC_RDIST_TYPER(redis_base) >> 32;
#else
gicr_typer_aff = GIC_RDIST_TYPER(redis_base + 0x4);
#endif
if (mpidr_aff == gicr_typer_aff)
{
return redis_base;
}
#endif
}
return 0;
}
#if defined(TARGET_ARMV8_AARCH64)
rt_inline rt_uint32_t platform_get_gic_cpu_base(void)
{
return 0; /* unused in gicv3 */

51
bsp/phytium/board/phytium_cpu_id.S
View File

@ -8,6 +8,7 @@
* Change Logs:
* Date Author Notes
* 2023-07-26 huanghe first commit
* 2024-07-02 zhangyan modify
*
*/
@ -93,29 +94,11 @@ core3:
mov r0, #3
b return
core4:
mov r0, #4
b return
core5:
mov r0, #5
b return
core6:
mov r0, #6
b return
core8:
mov r0, #8
b return
default:
and r0, r0, #15
return:
bl cpu_id_mapping
mov pc, r9
#else
@ -152,14 +135,18 @@ map_cpu_id_3:
mov x0, #1
RET
.globl rt_hw_cpu_id_set
rt_hw_cpu_id_set:
mov x9, lr
mrs x0,MPIDR_EL1
and x1, x0, #15
msr tpidr_el1, x1
mov lr, x9
RET
.globl rt_hw_cpu_id
rt_hw_cpu_id:
mrs x0,MPIDR_EL1
ubfx x0, x0, #0, #12
ldr x1,= CORE0_AFF
cmp x0, x1
@ -183,8 +170,6 @@ rt_hw_cpu_id_set:
beq core3
#endif
b default
core0:
mov x0, #0
b return
@ -201,31 +186,9 @@ core3:
mov x0, #3
b return
core4:
mov x0, #4
b return
core5:
mov x0, #5
b return
core6:
mov x0, #6
b return
core8:
mov x0, #8
b return
default:
and x0, x0, #15
return:
b cpu_id_mapping
//bl cpu_id_mapping
mov lr, x9
RET
#endif

28
bsp/phytium/board/secondary_cpu.c
View File

@ -46,21 +46,10 @@ rt_uint64_t rt_cpu_mpidr_early[] =
[0] = 0x80000200,
[1] = 0x80000201,
#elif defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
[0] = 0x80000000,
[1] = 0x80000100,
[2] = 0x80000200,
[3] = 0x80000201,
#elif defined(TARGET_F2000_4) || defined(TARGET_D2000)
[0] = 0x80000000,
[1] = 0x80000001,
[2] = 0x80000100,
[3] = 0x80000101,
#if defined(TARGET_D2000)
[4] = 0x80000200,
[5] = 0x80000201,
[6] = 0x80000300,
[7] = 0x80000301,
#endif
[0] = 0x80000200,
[1] = 0x80000201,
[2] = 0x80000000,
[3] = 0x80000100,
#endif
};
@ -117,23 +106,23 @@ void rt_hw_secondary_cpu_bsp_start(void)
#else
rt_uint32_t mmutable_p;
mmutable_p = (rt_uint32_t)MMUTable + (rt_uint32_t)PV_OFFSET ;
rt_hw_mmu_switch(mmutable_p) ;
rt_hw_mmu_switch((void*)mmutable_p) ;
#endif
/* vector init */
rt_hw_vector_init();
/* interrupt init */
#if defined(TARGET_ARMV8_AARCH64)
arm_gic_cpu_init(0, 0);
arm_gic_redist_address_set(0, platform_get_gic_redist_base(), rt_hw_cpu_id());
phytium_aarch64_arm_gic_redist_init();
rt_kprintf("arm_gic_redist_init is over rt_hw_cpu_id() is %d \r\n", rt_hw_cpu_id());
#else
arm_gic_cpu_init(0);
arm_gic_redist_address_set(0, platform_get_gic_redist_base(), rt_hw_cpu_id());
arm_gic_redist_init(0);
#endif
/* gtimer init */
#if defined(TARGET_ARMV8_AARCH64)
rt_hw_gtimer_init();
@ -143,7 +132,6 @@ void rt_hw_secondary_cpu_bsp_start(void)
rt_hw_interrupt_umask(RT_SCHEDULE_IPI);
/* start scheduler */
rt_kprintf("\rcall cpu %d on success\n", rt_hw_cpu_id());
rt_hw_secondary_cpu_idle_exec();
rt_system_scheduler_start();

106
bsp/phytium/board/smp_sgi_test.c Normal file
View File

@ -0,0 +1,106 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2024/07/15 zhangyan first commit
*/
#include "rtconfig.h"
#ifdef RT_USING_SMP
#include <rtthread.h>
#include <rtdevice.h>
#include <string.h>
#include "fparameters.h"
#include "ftypes.h"
#include "board.h"
#include <rtdbg.h>
#include "interrupt.h"
#include <rtdef.h>
#include "rtatomic.h"
#define RT_TEST_IPI 3
struct rt_thread core_test_thread[RT_CPUS_NR];
static char *core_thread_name[4] =
{
"core0_sgi_test",
"core1_sgi_test",
"core2_sgi_test",
"core3_sgi_test",
};
static rt_uint8_t core_stack[RT_CPUS_NR][4096];
static rt_isr_handler_t smp_test_ipi_handle(int vector, void *param)
{
rt_int32_t cpu_id = rt_hw_cpu_id();
rt_kprintf("smp_test_ipi_handle, cpu_id = %d\n", cpu_id);
}
static void core_thread(void *parameter)
{
rt_base_t level;
rt_int32_t cpu_id = rt_hw_cpu_id();
/* code */
level = rt_cpus_lock();
rt_hw_ipi_handler_install(RT_TEST_IPI, smp_test_ipi_handle);
rt_hw_interrupt_umask(RT_TEST_IPI);
rt_kprintf("core%d, rt_hw_interrupt_umask(RT_TEST_IPI) successfully.\n", cpu_id);
rt_cpus_unlock(level);
}
void demo_core_test(void)
{
rt_ubase_t i;
rt_ubase_t cpu_id = 0;
rt_kprintf("demo_core%d \n", rt_hw_cpu_id());
for (i = 0; i < RT_CPUS_NR; i++)
{
cpu_id = i;
rt_thread_init(&core_test_thread[i],
core_thread_name[i],
core_thread,
RT_NULL,
&core_stack[i],
2048,
20,
32);
rt_thread_control(&core_test_thread[i], RT_THREAD_CTRL_BIND_CPU, (void *)cpu_id);
rt_thread_startup(&core_test_thread[i]);
rt_thread_mdelay(100);
}
}
/* this function will toggle output pin and test intr of input pin */
static void smp_sgi_test_thread(void *parameter)
{
rt_uint32_t cpu_mask = 0;
for (int i = 0; i < RT_CPUS_NR; i++)
{
cpu_mask = (1 << i);
rt_hw_ipi_send(RT_TEST_IPI, cpu_mask);
rt_thread_mdelay(10);
}
}
void smp_sgi_sample(int argc, char *argv[])
{
rt_thread_t thread;
rt_err_t res;
demo_core_test();
rt_thread_mdelay(1000);
thread = rt_thread_create("smp_test_thread", smp_sgi_test_thread, RT_NULL, 4096, 25, 10);
res = rt_thread_startup(thread);
RT_ASSERT(res == RT_EOK);
}
MSH_CMD_EXPORT(smp_sgi_sample, smp toggle sgi sample.);
#endif

32
bsp/phytium/libraries/common/phytium_interrupt.c
View File

@ -94,7 +94,6 @@ void phytium_interrupt_init(void)
rt_uint64_t gic_cpu_base;
rt_uint64_t gic_dist_base;
rt_uint64_t gic_irq_start;
rt_uint64_t redist_addr;
phytium_gic_table = (struct arm_gic *)arm_gic_get_gic_table_addr();
/* initialize vector table */
@ -106,44 +105,15 @@ void phytium_interrupt_init(void)
#if defined(RT_USING_SMART)
gic_dist_base = (rt_uint64_t)rt_ioremap((void *)platform_get_gic_dist_base(), 0x40000);
gic_cpu_base = (rt_uint64_t)rt_ioremap((void*)platform_get_gic_cpu_base(), 0x1000);
redist_addr = (rt_uint64_t)rt_ioremap(GICV3_RD_BASE_ADDR, 4 * GICV3_RD_OFFSET);
#else
gic_dist_base = platform_get_gic_dist_base();
gic_cpu_base = platform_get_gic_cpu_base();
redist_addr = GICV3_RD_BASE_ADDR;
#endif
gic_irq_start = 0;
arm_gic_dist_init(0, gic_dist_base, gic_irq_start);
arm_gic_cpu_init(0, gic_cpu_base);
arm_gic_redist_address_set(0, redist_addr + 2 * GICV3_RD_OFFSET, 0);
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
#if RT_CPUS_NR == 2
arm_gic_redist_address_set(0, redist_addr + 3 * GICV3_RD_OFFSET, 1);
#elif RT_CPUS_NR == 3
arm_gic_redist_address_set(0, redist_addr + 3 * GICV3_RD_OFFSET, 1);
arm_gic_redist_address_set(0, redist_addr, 2);
#elif RT_CPUS_NR == 4
arm_gic_redist_address_set(0, redist_addr + 3 * GICV3_RD_OFFSET, 1);
arm_gic_redist_address_set(0, redist_addr, 2);
arm_gic_redist_address_set(0, redist_addr + GICV3_RD_OFFSET, 3);
#endif
#else
#if defined(TARGET_E2000D)
rt_uint32_t cpu_offset = 2;
#endif
#if RT_CPUS_NR == 2
arm_gic_redist_address_set(0, redist_addr + (1 + cpu_offset) * GICV3_RD_OFFSET, 1);
#elif RT_CPUS_NR == 3
arm_gic_redist_address_set(0, redist_addr + (1 + cpu_offset) * GICV3_RD_OFFSET, 1);
arm_gic_redist_address_set(0, redist_addr + (2 + cpu_offset) * GICV3_RD_OFFSET, 2);
#elif RT_CPUS_NR == 4
arm_gic_redist_address_set(0, redist_addr + (1 + cpu_offset) * GICV3_RD_OFFSET, 1);
arm_gic_redist_address_set(0, redist_addr + (2 + cpu_offset) * GICV3_RD_OFFSET, 2);
arm_gic_redist_address_set(0, redist_addr + (3 + cpu_offset) * GICV3_RD_OFFSET, 3);
#endif
#endif
arm_gic_redist_address_set(0, platform_get_gic_redist_base(), 0);
phytium_aarch64_arm_gic_redist_init();
}

12
bsp/phytium/libraries/drivers/drv_can.c
View File

@ -93,8 +93,8 @@ static rt_err_t _can_config(struct rt_can_device *can, struct can_configure *cfg
/*Set the baudrate*/
FCanBaudrateConfig arb_segment_config;
FCanBaudrateConfig data_segment_config;
memset(&arb_segment_config, 0, sizeof(arb_segment_config));
memset(&data_segment_config, 0, sizeof(data_segment_config));
rt_memset(&arb_segment_config, 0, sizeof(arb_segment_config));
rt_memset(&data_segment_config, 0, sizeof(data_segment_config));
#if defined(RT_CAN_USING_CANFD)
FCanFdEnable(&(drv_can->can_handle), TRUE);
arb_segment_config.auto_calc = TRUE;
@ -243,8 +243,8 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
{
FCanBaudrateConfig arb_segment_config;
FCanBaudrateConfig data_segment_config;
memset(&arb_segment_config, 0, sizeof(arb_segment_config));
memset(&data_segment_config, 0, sizeof(data_segment_config));
rt_memset(&arb_segment_config, 0, sizeof(arb_segment_config));
rt_memset(&data_segment_config, 0, sizeof(data_segment_config));
drv_can->device.config.baud_rate = argval;
FCanEnable(&(drv_can->can_handle), RT_FALSE);
arb_segment_config.auto_calc = TRUE;
@ -276,8 +276,8 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
{
FCanBaudrateConfig arb_segment_config;
FCanBaudrateConfig data_segment_config;
memset(&arb_segment_config, 0, sizeof(arb_segment_config));
memset(&data_segment_config, 0, sizeof(data_segment_config));
rt_memset(&arb_segment_config, 0, sizeof(arb_segment_config));
rt_memset(&data_segment_config, 0, sizeof(data_segment_config));
drv_can->device.config.baud_rate = argval;
FCanEnable(&(drv_can->can_handle), RT_FALSE);
arb_segment_config.auto_calc = TRUE;

2
bsp/phytium/libraries/drivers/drv_dc.c
View File

@ -31,6 +31,8 @@ static rt_uint16_t _rt_framebuffer[1024 * 768 * 4] __aligned(128);
static struct rt_device_graphic_info _dc_info;
void rt_hw_dc_register(struct phytium_dc_bus *dc_control_bus, const char *name, rt_uint32_t flag, void *data);
static rt_err_t dc_config(struct phytium_dc_bus *dc_control_bus)
{
RT_ASSERT(dc_control_bus);

22
bsp/phytium/libraries/drivers/drv_gpio.c
View File

@ -22,8 +22,6 @@
#include "ioremap.h"
#endif
#include <string.h>
#if defined(TARGET_E2000)
#include "fparameters.h"
#endif
@ -37,12 +35,6 @@
#include "fgpio.h"
#include "drv_gpio.h"
/**************************** Type Definitions *******************************/
typedef void (*FGpioOpsIrqHandler)(s32 vector, void *param);
typedef struct
{
FGpioOpsIrqHandler irq_handler;
void *irq_args;
} FGpioOpsPinConfig;
/***************** Macros (Inline Functions) Definitions *********************/
@ -78,7 +70,7 @@ static void drv_pin_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mod
}
FGpioConfig input_cfg = *FGpioLookupConfig(index);
memset(&instance[index], 0, sizeof(FGpio));
rt_memset(&instance[index], 0, sizeof(FGpio));
#ifdef RT_USING_SMART
input_cfg.base_addr = (uintptr)rt_ioremap((void *)input_cfg.base_addr, 0x1000);
#endif
@ -108,7 +100,6 @@ static void drv_pin_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mod
void drv_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value)
{
FGpio *instance = (FGpio *)device->user_data;
FError err = FGPIO_SUCCESS;
u32 index = (u32)pin;
FGpioSetOutputValue(&instance[index], (value == PIN_HIGH) ? FGPIO_PIN_HIGH : FGPIO_PIN_LOW);
@ -117,7 +108,6 @@ void drv_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value)
rt_ssize_t drv_pin_read(struct rt_device *device, rt_base_t pin)
{
FGpio *instance = (FGpio *)device->user_data;
FError err = FGPIO_SUCCESS;
u32 index = (u32)pin;
return FGpioGetInputValue(&instance[index]) == FGPIO_PIN_HIGH ? PIN_HIGH : PIN_LOW;
@ -127,10 +117,14 @@ rt_err_t drv_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
FGpio *instance = (FGpio *)device->user_data;
FError err = FGPIO_SUCCESS;
u32 index = (u32)pin;
rt_base_t level;
#ifdef RT_USING_SMART
FGpioIntrMap *map = &fgpio_intr_map[instance[index].config.ctrl];
map->base_addr = (uintptr)rt_ioremap((void *)map->base_addr, 0x1000);
#endif
level = rt_hw_interrupt_disable();
FGpioOpsSetupIRQ(&instance[index]);
@ -154,7 +148,7 @@ rt_err_t drv_pin_attach_irq(struct rt_device *device, rt_base_t pin,
break;
}
FGpioRegisterInterruptCB(&instance[index], hdr, args); /* register intr callback */
FGpioRegisterInterruptCB(&instance[index], (FGpioInterruptCallback)hdr, args); /* register intr callback */
rt_hw_interrupt_enable(level);
return RT_EOK;
@ -163,7 +157,6 @@ rt_err_t drv_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_err_t drv_pin_detach_irq(struct rt_device *device, rt_base_t pin)
{
FGpio *instance = (FGpio *)device->user_data;
FError err = FGPIO_SUCCESS;
u32 index = (u32)pin;
FGpioIntrMap *map = &fgpio_intr_map[instance[index].config.ctrl];
rt_base_t level;
@ -182,7 +175,6 @@ rt_err_t drv_pin_detach_irq(struct rt_device *device, rt_base_t pin)
rt_err_t drv_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
{
FGpio *instance = (FGpio *)device->user_data;
FError err = FGPIO_SUCCESS;
u32 index = (u32)pin;
FGpioSetInterruptMask(&instance[index], enabled);

3
bsp/phytium/libraries/drivers/drv_i2c.c
View File

@ -12,6 +12,7 @@
*/
#include "rtconfig.h"
#include <rtdevice.h>
#include <string.h>
#define LOG_TAG "i2c_drv"
#include "drv_log.h"
#include "drv_i2c.h"
@ -118,7 +119,7 @@ static rt_err_t i2c_mio_config(struct phytium_i2c_bus *i2c_bus)
return -RT_ERROR;
}
mio_handle.is_ready = 0;
memset(&mio_handle, 0, sizeof(mio_handle));
rt_memset(&mio_handle, 0, sizeof(mio_handle));
return RT_EOK;
}

15
bsp/phytium/libraries/drivers/drv_pwm.c
View File

@ -78,7 +78,7 @@ static rt_err_t drv_pwm_set(struct phytium_pwm *pwm_dev, int cmd, struct rt_pwm_
FPwmVariableConfig pwm_cfg;
u32 channel = configuration->channel;
memset(&pwm_cfg, 0, sizeof(pwm_cfg));
rt_memset(&pwm_cfg, 0, sizeof(pwm_cfg));
pwm_cfg.tim_ctrl_mode = FPWM_MODULO;
pwm_cfg.tim_ctrl_div = 50 - 1;
/* Precision set to microseconds */
@ -119,18 +119,11 @@ static rt_err_t drv_pwm_get(struct phytium_pwm *pwm_dev, struct rt_pwm_configura
{
RT_ASSERT(pwm_dev);
RT_ASSERT(configuration);
u32 ret;
FPwmVariableConfig pwm_cfg;
u32 channel = configuration->channel;
memset(&pwm_cfg, 0, sizeof(pwm_cfg));
ret = FPwmVariableGet(&pwm_dev->pwm_handle, channel, &pwm_cfg);
if (ret != FPWM_SUCCESS)
{
LOG_E("Pwm variable get failed.\n");
return -RT_ERROR;
}
rt_memset(&pwm_cfg, 0, sizeof(pwm_cfg));
FPwmVariableGet(&pwm_dev->pwm_handle, channel, &pwm_cfg);
configuration->period = pwm_cfg.pwm_period * 1000;
configuration->pulse = pwm_cfg.pwm_pulse * 1000;
@ -148,7 +141,7 @@ static rt_err_t drv_pwm_set_dead_time(struct phytium_pwm *pwm_dev, struct rt_pwm
FPwmDbVariableConfig db_cfg;
u32 channel = configuration->channel;
memset(&db_cfg, 0, sizeof(db_cfg));
rt_memset(&db_cfg, 0, sizeof(db_cfg));
db_cfg.db_rise_cycle = configuration->dead_time / 1000;
db_cfg.db_fall_cycle = configuration->dead_time / 1000;
db_cfg.db_polarity_sel = FPWM_DB_AH;

18
bsp/phytium/libraries/drivers/drv_qspi.c
View File

@ -61,7 +61,7 @@ rt_err_t FQspiInit(phytium_qspi_bus *phytium_qspi_bus)
}
else
{
rt_kprintf("Qspi init successfully.\n");
LOG_D("Qspi init successfully.\n");
}
/* Detect connected flash infomation */
@ -73,7 +73,7 @@ rt_err_t FQspiInit(phytium_qspi_bus *phytium_qspi_bus)
}
else
{
rt_kprintf("Qspi flash detect successfully.\n");
LOG_D("Qspi flash detect successfully.\n");
}
#ifdef USING_QSPI_CHANNEL0
@ -131,7 +131,7 @@ static rt_err_t phytium_qspi_configure(struct rt_spi_device *device, struct rt_s
if (RT_EOK != ret)
{
qspi_bus->init = RT_FALSE;
rt_kprintf("Qspi init failed!!!\n");
LOG_E("Qspi init failed!!!\n");
return -RT_ERROR;
}
qspi_bus->init = RT_EOK;
@ -175,7 +175,7 @@ static rt_ssize_t phytium_qspi_xfer(struct rt_spi_device *device, struct rt_spi_
}
else
{
rt_kprintf("Write successfully!!!\r\n");
LOG_D("Write successfully!!!\r\n");
}
return RT_EOK;
@ -188,19 +188,19 @@ static rt_ssize_t phytium_qspi_xfer(struct rt_spi_device *device, struct rt_spi_
ret |= FQspiFlashReadDataConfig(&(qspi_bus->fqspi), cmd);
if (FT_SUCCESS != ret)
{
rt_kprintf("Failed to config read, test result 0x%x.\r\n", ret);
LOG_D("Failed to config read, test result 0x%x.\r\n", ret);
return -RT_ERROR;
}
/* read norflash data */
size_t read_len = FQspiFlashReadData(&(qspi_bus->fqspi), flash_addr, (u8 *)message->recv_buf, len);
if (read_len != len)
{
rt_kprintf("Failed to read mem, read len = %d.\r\n", read_len);
LOG_E("Failed to read mem, read len = %d.\r\n", read_len);
return -RT_ERROR;
}
else
{
rt_kprintf("Read successfully!!!, read_len = %d\r\n", read_len);
LOG_D("Read successfully!!!, read_len = %d\r\n", read_len);
}
FtDumpHexByte(message->recv_buf, read_len);
@ -241,7 +241,7 @@ static rt_ssize_t phytium_qspi_xfer(struct rt_spi_device *device, struct rt_spi_
return 1;
}
rt_kprintf("cmd not found!!!\r\n");
LOG_E("cmd not found!!!\r\n");
return ret;
}
@ -286,7 +286,7 @@ static int rt_qspi_init(phytium_qspi_bus *phytium_qspi)
if (rt_qspi_bus_register(&phytium_qspi->qspi_bus, phytium_qspi->name, &phytium_qspi_ops) == RT_EOK)
{
rt_kprintf("Qspi bus register successfully!!!\n");
LOG_D("Qspi bus register successfully!!!\n");
}
else
{

4
bsp/phytium/libraries/drivers/drv_sdif.c
View File

@ -398,11 +398,11 @@ static void sdif_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *r
return;
}
memset(req_cmd, 0, sizeof(*req_cmd));
rt_memset(req_cmd, 0, sizeof(FSdifCmdData));
if (req->data)
{
memset(req_data, 0, sizeof(*req_data));
rt_memset(req_data, 0, sizeof(FSdifData));
req_cmd->data_p = req_data;
}
else

2
bsp/phytium/libraries/phytium_standalone_sdk_install.py
View File

@ -19,6 +19,6 @@ def clone_repository(branch, commit_hash):
if __name__ == "__main__":
branch_to_clone = "master"
commit_to_clone = "57e28e517e45d9d36b832cbdf038970e2ece600e"
commit_to_clone = "3a353d48ee1db27acf77241a62fb7e35c779e110"
clone_repository(branch_to_clone, commit_to_clone)

3
components/utilities/ymodem/ry_sy.c
View File

@ -46,7 +46,6 @@ static enum rym_code _rym_recv_begin(
rt_size_t len)
{
struct custom_ctx *cctx = (struct custom_ctx *)ctx;
struct stat file_buf;
char insert_0 = '\0';
char *ret;
rt_err_t err;
@ -64,7 +63,7 @@ static enum rym_code _rym_recv_begin(
cctx->fd = open(cctx->fpath, O_CREAT | O_WRONLY | O_TRUNC, 0);
if (cctx->fd < 0)
{
rt_err_t err = rt_get_errno();
err = rt_get_errno();
rt_kprintf("error creating file: %d\n", err);
return RYM_CODE_CAN;
}

43
libcpu/aarch64/common/cpuport.c Normal file
View File

@ -0,0 +1,43 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-06-21 Zhangyan first version
*/
#include <rthw.h>
#include <rtthread.h>
#include <board.h>
#ifdef RT_USING_CPU_FFS
/**
* This function finds the first bit set (beginning with the least significant bit)
* in value and return the index of that bit.
*
* Bits are numbered starting at 1 (the least significant bit). A return value of
* zero from any of these functions means that the argument was zero.
*
* @return return the index of the first bit set. If value is 0, then this function
* shall return 0.
*/
int __rt_ffs(int value)
{
#ifdef __GNUC__
return __builtin_ffs(value);
#else
__asm__ volatile (
"rbit w1, %w0\n"
"cmp %w0, 0\n"
"clz w1, w1\n"
"csinc %w0, wzr, w1, eq\n"
: "=r"(value)
: "0"(value)
);
return value;
#endif
}
#endif /* RT_USING_CPU_FFS */

30
libcpu/aarch64/common/include/cpuport.h
View File

@ -53,36 +53,6 @@ typedef struct
void _thread_start(void);
#ifdef RT_USING_CPU_FFS
/**
* This function finds the first bit set (beginning with the least significant bit)
* in value and return the index of that bit.
*
* Bits are numbered starting at 1 (the least significant bit). A return value of
* zero from any of these functions means that the argument was zero.
*
* @return return the index of the first bit set. If value is 0, then this function
* shall return 0.
*/
rt_inline int __rt_ffs(int value)
{
#ifdef __GNUC__
return __builtin_ffs(value);
#else
__asm__ volatile (
"rbit w1, %w0\n"
"cmp %w0, 0\n"
"clz w1, w1\n"
"csinc %w0, wzr, w1, eq\n"
: "=r"(value)
: "0"(value)
);
return value;
#endif
}
#endif /* RT_USING_CPU_FFS */
#ifdef ARCH_USING_HW_THREAD_SELF
rt_inline struct rt_thread *rt_hw_thread_self(void)
{