diff --git a/bsp/ls1bdev/board.c b/bsp/ls1bdev/board.c
index dbfe6038e0..cea1fb5b56 100644
--- a/bsp/ls1bdev/board.c
+++ b/bsp/ls1bdev/board.c
@@ -23,12 +23,13 @@
 /**
  * @addtogroup Loongson LS1B
  */
+ 
 /*@{*/
 
 /**
  * This is the timer interrupt service routine.
  */
-void rt_hw_timer_handler()
+void rt_hw_timer_handler(void)
 {
     unsigned int count;
 
@@ -43,7 +44,7 @@ void rt_hw_timer_handler()
 /**
  * This function will initial OS timer
  */
-void rt_hw_timer_init()
+void rt_hw_timer_init(void)
 {
     write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
     write_c0_count(0);
@@ -52,7 +53,7 @@ void rt_hw_timer_init()
 /**
  * This function will initial sam7s64 board.
  */
-void rt_hw_board_init()
+void rt_hw_board_init(void)
 {
 #ifdef RT_USING_UART
 	/* init hardware UART device */
diff --git a/bsp/mb9bf506r/libraries/CMSIS/RTOS/cmsis_os.h b/bsp/mb9bf506r/libraries/CMSIS/RTOS/cmsis_os.h
index 6c9c78bb89..f9373152c0 100644
--- a/bsp/mb9bf506r/libraries/CMSIS/RTOS/cmsis_os.h
+++ b/bsp/mb9bf506r/libraries/CMSIS/RTOS/cmsis_os.h
@@ -96,7 +96,7 @@ used throughout the whole project.
 #ifndef _CMSIS_OS_H
 #define _CMSIS_OS_H
 
-#include "rtthread.h"
+#include <rtthread.h>
 
 /// \note MUST REMAIN UNCHANGED: \b osCMSIS identifies the CMSIS-RTOS API version
 #define osCMSIS           0x00003      ///< API version (main [31:16] .sub [15:0])
@@ -214,103 +214,60 @@ typedef struct rt_mailbox *osMailQId;
 /// Thread Definition structure contains startup information of a thread.
 /// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_thread_def  {
-    /* rt object */
-    char        name[RT_NAME_MAX];                      /**< the name of thread                     */
-    rt_uint8_t  type;                                   /**< type of object                         */
-    rt_uint8_t  flags;                                  /**< thread's flags                         */
-    
-#ifdef RT_USING_MODULE
-    void        *module_id;                             /**< id of application module               */
-#endif
-
-    rt_list_t   list;                                   /**< the object list                        */
-    rt_list_t   tlist;                                  /**< the thread list                        */
-
-    /* stack point and entry */
-    void        *sp;                                    /**< stack point                            */
-    void        *entry;                                 /**< entry                                  */
-    void        *parameter;                             /**< parameter                              */
-    void        *stack_addr;                            /**< stack address                          */
-    rt_uint16_t stack_size;                             /**< stack size                             */
-
-    /* error code */
-    rt_err_t    error;                                  /**< error code                             */
-
-    rt_uint8_t  stat;                                   /**< thread stat                            */
-
-    /* priority */
-    osPriority  current_priority;                       /**< current priority                       */
-    osPriority  init_priority;                          /**< initialized priority                   */
-#if RT_THREAD_PRIORITY_MAX > 32
-    rt_uint8_t  number;
-    rt_uint8_t  high_mask;
-#endif
-    rt_uint32_t number_mask;
-
-#if defined(RT_USING_EVENT)
-    /* thread event */
-    rt_uint32_t event_set;
-    rt_uint8_t  event_info;
-#endif
-
-    rt_ubase_t  init_tick;                              /**< thread's initialized tick              */
-    rt_ubase_t  remaining_tick;                         /**< remaining tick                         */
-
-    struct rt_timer thread_timer;                       /**< built-in thread timer                   */
-
-    void (*cleanup)(struct rt_thread *tid);             /**< cleanup function when thread exit      */
-
-    rt_uint32_t user_data;                              /**< private user data beyond this thread  */
+	const char *name;
+	void (*entry)(void *parameter);
+	rt_uint32_t stack_size;
+	rt_uint8_t priority;
+	rt_uint32_t tick;
 } osThreadDef_t;
 
 /// Timer Definition structure contains timer parameters.
 /// \note CAN BE CHANGED: \b os_timer_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_timer_def  {
-    struct rt_object parent;                            /**< inherit from rt_object                 */
-
-    rt_list_t list;                                     /**< the node of timer list                 */
-
-    void (*timeout_func)(void *parameter);              /**< timeout function                       */
-    void *parameter;                                    /**< timeout function's parameter           */
-
-    rt_tick_t init_tick;                                /**< timer timeout tick                     */
-    rt_tick_t timeout_tick;                             /**< timeout tick                           */
+	const char *name;
+	void (*timeout)(void *parameter);
+	void *parameter;
+	rt_tick_t time;
+	rt_uint8_t flag;
 } osTimerDef_t;
 
 /// Mutex Definition structure contains setup information for a mutex.
 /// \note CAN BE CHANGED: \b os_mutex_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_mutex_def  {
-  uint32_t                   dummy;    ///< dummy value.
+	const char *name;
+	rt_uint8_t flag;	
 } osMutexDef_t;
 
 /// Semaphore Definition structure contains setup information for a semaphore.
 /// \note CAN BE CHANGED: \b os_semaphore_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_semaphore_def  {
-  uint32_t                   dummy;    ///< dummy value.
+	const char *name;
+	rt_uint8_t flag;
 } osSemaphoreDef_t;
 
 /// Definition structure for memory block allocation
 /// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_pool_def  {
-  uint32_t                 pool_sz;    ///< number of items (elements) in the pool
-  uint32_t                 item_sz;    ///< size of an item 
-  void                       *pool;    ///< pointer to memory for pool
+	const char *name;
+	rt_size_t block_count;
+	rt_size_t block_size;
 } osPoolDef_t;
 
 /// Definition structure for message queue
 /// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_messageQ_def  {
-  uint32_t                queue_sz;    ///< number of elements in the queue
-  uint32_t                 item_sz;    ///< size of an item 
-  void                       *pool;    ///< memory array for messages
+	const char *name;
+	rt_size_t msg_size;
+	rt_size_t max_msgs;
+	rt_uint8_t flag;
 } osMessageQDef_t;
 
 /// Definition structure for mail queue
 /// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS.
 typedef const struct os_mailQ_def  {
-  uint32_t                queue_sz;    ///< number of elements in the queue
-  uint32_t                 item_sz;    ///< size of an item 
-  void                       *pool;    ///< memory array for mail
+	const char *name;
+	rt_size_t size;
+	rt_uint8_t flag;
 } osMailQDef_t;
 
 /// Event structure contains detailed information about an event. 
@@ -360,7 +317,7 @@ extern osThreadDef_t os_thread_def_##name
 #else                            // define the object
 #define osThreadDef(name, priority, instances, stacksz)  \
 osThreadDef_t os_thread_def_##name = \
-{ (name), (priority), (instances), (stacksz)  }
+{("cmsis"), (name), (stacksz), ((rt_uint8_t)(priority - osPriorityIdle) + 1), 50}
 #endif
 
 /// Access a Thread defintion.
@@ -439,7 +396,7 @@ extern osTimerDef_t os_timer_def_##name
 #else                            // define the object
 #define osTimerDef(name, function)  \
 osTimerDef_t os_timer_def_##name = \
-{ (function) }
+{("timer"), (function), (RT_NULL) }
 #endif
 
 /// Access a Timer definition.
diff --git a/bsp/mb9bf506r/libraries/CMSIS/RTOS/rtt_cmsis.c b/bsp/mb9bf506r/libraries/CMSIS/RTOS/rtt_cmsis.c
new file mode 100644
index 0000000000..0f7ada987a
--- /dev/null
+++ b/bsp/mb9bf506r/libraries/CMSIS/RTOS/rtt_cmsis.c
@@ -0,0 +1,310 @@
+#include "cmsis_os.h"
+
+// Kernel Control Public API
+
+/// Start the RTOS Kernel with executing the specified thread
+osStatus osKernelStart(osThreadDef_t *thread_def, void *argument)
+{
+	osThreadCreate(thread_def, argument);
+
+	rt_system_scheduler_start();
+
+	return osOK;
+}
+
+/// Check if the RTOS kernel is already started
+int32_t osKernelRunning(void)
+{
+	return (rt_thread_self() != RT_NULL) ?  1 : 0;
+}
+
+// Thread Public API
+
+/// Create a thread and add it to Active Threads and set it to state READY
+osThreadId osThreadCreate(osThreadDef_t *thread_def, void *argument)
+{
+	osThreadId thread;
+	
+	thread = rt_thread_create(thread_def->name, thread_def->entry, argument, thread_def->stack_size, thread_def->priority, thread_def->tick);	
+	if (thread != RT_NULL)
+        rt_thread_startup(thread); 	
+
+	return thread;
+}
+
+/// Return the thread ID of the current running thread
+osThreadId osThreadGetId(void)
+{
+	return rt_thread_self();
+}
+
+/// Terminate execution of a thread and remove it from ActiveThreads
+osStatus osThreadTerminate(osThreadId thread_id)
+{
+	rt_err_t result;
+
+	result = rt_thread_suspend(thread_id);
+
+	if (result == RT_EOK)
+		return osOK;
+	else
+		return osErrorOS;
+}
+
+/// Pass control to next thread that is in state READY
+osStatus osThreadYield(void)
+{
+	rt_err_t result;
+
+	result = rt_thread_yield();
+
+	if (result == RT_EOK)
+		return osOK;
+	else
+		return osErrorOS;
+}
+
+/// Change prority of an active thread
+osStatus osThreadSetPriority(osThreadId thread_id, osPriority priority)
+{
+	if (thread_id == RT_NULL)
+		return osErrorOS;
+
+	if (priority < osPriorityIdle || priority > osPriorityRealtime)
+		return osErrorOS;
+	
+	thread_id->current_priority = priority;
+
+	return osOK;
+}
+
+/// Get current prority of an active thread
+osPriority osThreadGetPriority(osThreadId thread_id)
+{
+	if (thread_id == RT_NULL)
+		return osPriorityError;
+
+	if (thread_id->current_priority < osPriorityIdle || thread_id->current_priority > osPriorityRealtime)
+		return osPriorityError;
+		
+	return thread_id->current_priority;
+}
+
+// Generic Wait API
+
+/// Wait for Timeout (Time Delay)
+osStatus osDelay(uint32_t millisec)
+{
+	rt_err_t result;
+	rt_tick_t ticks;
+
+	ticks = rt_tick_from_millisecond(millisec);
+	result = rt_thread_delay(ticks);
+
+	if (result == RT_EOK)
+		return osOK;
+	else
+		return osErrorOS;
+}
+
+/// Wait for Signal, Message, Mail, or Timeout
+osEvent osWait(uint32_t millisec)
+{
+}
+
+// Timer Management Public API
+
+/// Create timer
+osTimerId osTimerCreate(osTimerDef_t *timer_def, os_timer_type type, void *argument)
+{
+	return rt_timer_create(timer_def->name, timer_def->timeout, timer_def->parameter, timer_def->time, timer_def->flag);
+}
+
+/// Start or restart timer
+osStatus osTimerStart(osTimerId timer_id, uint32_t millisec)
+{
+	rt_err_t result;
+	
+	result = rt_timer_start(timer_id);
+	if (result == RT_EOK)
+		return osOK;
+	else
+		return osErrorOS;
+}
+
+/// Stop timer
+osStatus osTimerStop(osTimerId timer_id)
+{
+	rt_err_t result;
+	
+	result = rt_timer_stop(timer_id);
+	if (result == RT_EOK)
+		return osOK;
+	else
+		return osErrorOS;
+}
+
+// Mutex Public API
+
+/// Create and Initialize a Mutex object
+osMutexId osMutexCreate(osMutexDef_t *mutex_def)
+{
+	return rt_mutex_create(mutex_def->name, mutex_def->flag);
+}
+
+/// Wait until a Mutex becomes available
+osStatus osMutexWait(osMutexId mutex_id, uint32_t millisec)
+{
+	rt_err_t result;
+	rt_tick_t ticks;
+
+	ticks = rt_tick_from_millisecond(millisec);
+	result = rt_mutex_take(mutex_id, ticks);
+
+	if (result == RT_EOK)
+		return osOK;
+	else
+		return osErrorOS;
+}
+
+/// Release a Mutex that was obtained with osMutexWait
+osStatus osMutexRelease(osMutexId mutex_id)
+{
+	rt_err_t result;
+
+	result = rt_mutex_release(mutex_id);
+
+	if (result == RT_EOK)
+		return osOK;
+	else
+		return osErrorOS;
+}
+
+// Semaphore Public API
+
+/// Create and Initialize a Semaphore object
+osSemaphoreId osSemaphoreCreate(osSemaphoreDef_t *semaphore_def, int32_t count)
+{
+	return rt_sem_create(semaphore_def->name, count, semaphore_def->flag);
+}
+
+/// Wait until a Semaphore becomes available
+int32_t osSemaphoreWait(osSemaphoreId semaphore_id, uint32_t millisec)
+{
+	rt_tick_t ticks;
+
+	ticks = rt_tick_from_millisecond(millisec);
+	rt_sem_take(semaphore_id, ticks);
+}
+
+/// Release a Semaphore
+osStatus osSemaphoreRelease(osSemaphoreId semaphore_id)
+{
+	rt_err_t result;
+
+	result = rt_sem_release(semaphore_id);
+
+	if (result == RT_EOK)
+		return osOK;
+	else
+		return osErrorOS;
+}
+
+// Memory Management Public API
+
+/// Create and Initialize memory pool
+osPoolId osPoolCreate(osPoolDef_t *pool_def)
+{
+	return rt_mp_create(pool_def->name, pool_def->block_count, pool_def->block_size);
+}
+
+/// Allocate a memory block from a memory pool
+void *osPoolAlloc(osPoolId pool_id)
+{
+	return rt_mp_alloc(pool_id, 0);
+}
+
+/// Allocate a memory block from a memory pool and set memory block to zero
+void *osPoolCAlloc(osPoolId pool_id)
+{
+}
+
+/// Return an allocated memory block back to a specific memory pool
+osStatus osPoolFree(osPoolId pool_id, void *block)
+{
+	rt_mp_free(block);
+
+	return osOK;
+}
+
+// Message Queue Management Public API
+
+/// Create and Initialize Message Queue
+osMessageQId osMessageCreate(osMessageQDef_t *queue_def, osThreadId thread_id)
+{
+	return rt_mq_create(queue_def->name, queue_def->msg_size, queue_def->max_msgs, queue_def->flag);
+}
+
+/// Put a Message to a Queue
+osStatus osMessagePut(osMessageQId queue_id, uint32_t info, uint32_t millisec)
+{
+	rt_err_t result;
+
+	result = rt_mq_send(queue_id, &info, 1);
+
+	if (result == RT_EOK)
+		return osOK;
+	else
+		return osErrorOS;	
+}
+
+/// Get a Message or Wait for a Message from a Queue
+osEvent osMessageGet(osMessageQId queue_id, uint32_t millisec)
+{
+	
+}
+
+// Mail Queue Management Public API
+
+/// Create and Initialize mail queue
+osMailQId osMailCreate(osMailQDef_t *queue_def, osThreadId thread_id)
+{
+}
+
+/// Allocate a memory block from a mail
+void *osMailAlloc(osMailQId queue_id, uint32_t millisec)
+{
+}
+
+/// Allocate a memory block from a mail and set memory block to zero
+void *osMailCAlloc(osMailQId queue_id, uint32_t millisec)
+{
+}
+
+/// Free a memory block from a mail
+osStatus osMailFree(osMailQId queue_id, void *mail)
+{
+}
+
+/// Put a mail to a queue
+osStatus osMailPut(osMailQId queue_id, void *mail)
+{
+}
+
+/// Get a mail from a queue
+osEvent osMailGet(osMailQId queue_id, uint32_t millisec)
+{
+  osEvent ret;
+
+  if (queue_id == NULL) {
+    ret.status = osErrorParameter;
+    return ret;
+  }
+
+  ret = osMessageGet(*((void **)queue_id), millisec);
+  if (ret.status == osEventMessage) ret.status = osEventMail;
+
+  return ret;
+}
+
+
diff --git a/bsp/mb9bf506r/libraries/SConscript b/bsp/mb9bf506r/libraries/SConscript
index 267f8334ab..1938e7fa42 100644
--- a/bsp/mb9bf506r/libraries/SConscript
+++ b/bsp/mb9bf506r/libraries/SConscript
@@ -3,7 +3,7 @@ from building import *
 
 cwd = GetCurrentDir()
 src = Glob('*.c')
-src = ['Device/FUJISTU/MB9BF50x/Source/system_mb9bf50x.c']
+src = ['Device/FUJISTU/MB9BF50x/Source/system_mb9bf50x.c', 'CMSIS/RTOS/rtt_cmsis.c']
 
 # add for startup script 
 if rtconfig.CROSS_TOOL == 'gcc':
diff --git a/libcpu/mips/loongson/cpu.c b/libcpu/mips/loongson/cpu.c
index 06673bcbb9..49b310d01c 100644
--- a/libcpu/mips/loongson/cpu.c
+++ b/libcpu/mips/loongson/cpu.c
@@ -16,15 +16,16 @@
 #include <soc3210.h>
 
 /**
- * @addtogroup Loogonson SoC3210
+ * @addtogroup Loongson SoC3210
  */
+
 /*@{*/
 
 /**
  * this function will reset CPU
  *
  */
-void rt_hw_cpu_reset()
+void rt_hw_cpu_reset(void)
 {
 	/* open the watch-dog */
 	WD_TIMER = 0x01; /* watch dog will be timeout after 1 tick */
@@ -38,7 +39,7 @@ void rt_hw_cpu_reset()
  * this function will shutdown CPU
  *
  */
-void rt_hw_cpu_shutdown()
+void rt_hw_cpu_shutdown(void)
 {
 	rt_kprintf("shutdown...\n");
 
diff --git a/libcpu/mips/loongson/interrupt.c b/libcpu/mips/loongson/interrupt.c
index 20cc2f8b9b..d70b58da97 100644
--- a/libcpu/mips/loongson/interrupt.c
+++ b/libcpu/mips/loongson/interrupt.c
@@ -25,8 +25,9 @@ void rt_interrupt_dispatch(void *ptreg);
 void rt_hw_timer_handler();
 
 /**
- * @addtogroup Loogonson SoC3210
+ * @addtogroup Loongson SoC3210
  */
+ 
 /*@{*/
 
 void rt_hw_interrupt_handler(int vector)
@@ -37,7 +38,7 @@ void rt_hw_interrupt_handler(int vector)
 /**
  * This function will initialize hardware interrupt
  */
-void rt_hw_interrupt_init()
+void rt_hw_interrupt_init(void)
 {
 	rt_int32_t index;
 
diff --git a/libcpu/mips/loongson/stack.c b/libcpu/mips/loongson/stack.c
index 187845da58..60e9aa4fb4 100644
--- a/libcpu/mips/loongson/stack.c
+++ b/libcpu/mips/loongson/stack.c
@@ -12,11 +12,13 @@
  * 2010-05-17     swkyer       first version
  * 2010-07-07     Bernard      porting to Jz47xx
  */
+ 
 #include <rtthread.h>
 
 /**
- * @addtogroup Loogonson SoC3210
+ * @addtogroup Loongson SoC3210
  */
+
 /*@{*/
 
 extern rt_uint32_t cp0_get_cause(void);
diff --git a/libcpu/mips/loongson_1b/cache.c b/libcpu/mips/loongson_1b/cache.c
index 5782156380..550d4160ff 100644
--- a/libcpu/mips/loongson_1b/cache.c
+++ b/libcpu/mips/loongson_1b/cache.c
@@ -12,6 +12,7 @@
  * 2010-07-09     Bernard      first version
  * 2011-08-08     lgnq         modified for LS1B
  */
+ 
 #include "../common/mipsregs.h"
 
 #define K0BASE			0x80000000
@@ -43,10 +44,9 @@ typedef struct cacheop_t
 static cacheop_t cacheop, *pcacheop;
 static cacheinfo_t cacheinfo, *pcacheinfo;
 
-int identify_cpu (void)
+int identify_cpu(void)
 {
     unsigned int cpu_id;
-    void invalidate_cache (void);
 
     pcacheop = &cacheop;
     pcacheinfo = &cacheinfo;
@@ -112,8 +112,7 @@ void invalidate_writeback_dcache_all(void)
 	unsigned int start = K0BASE;
 	unsigned int end = (start + pcacheinfo->dcache_size);
 
-	start = K0BASE;
-	while(start < end) 
+	while (start < end) 
 	{
 		Writeback_Invalidate_Dcache(start);  //hit writeback invalidate 
 		start += pcacheinfo->dcacheline_size;
@@ -127,7 +126,7 @@ void invalidate_writeback_dcache(unsigned long addr, int size)
 	start = (addr +pcacheinfo->dcacheline_size -1) & (- pcacheinfo->dcacheline_size);
 	end = (end + size + pcacheinfo->dcacheline_size -1) & ( -pcacheinfo->dcacheline_size);
 	
-	while(start <end)
+	while (start <end)
 	{
 		Writeback_Invalidate_Dcache(start);
 		start += pcacheinfo->dcacheline_size;
@@ -139,18 +138,18 @@ void invalidate_icache_all(void)
 	unsigned int start = K0BASE;
 	unsigned int end = (start + pcacheinfo->icache_size);
 
-	while(start < end) 
+	while (start < end) 
 	{
 		pcacheop->Invalidate_Icache(start); 
 		start += pcacheinfo->icacheline_size;
 	}
 }
 
-void invalidate_dcache_all()
+void invalidate_dcache_all(void)
 { 
 	unsigned int start = K0BASE;
 	unsigned int end  = (start + pcacheinfo->dcache_size);
-	while(start <end)
+	while (start <end)
 	{
 		Invalidate_Dcache_Fill_Gc3210I(start);
 		start += pcacheinfo->icacheline_size;
@@ -163,7 +162,7 @@ void init_dcache(void)
 	unsigned int start = K0BASE;
 	unsigned int end = (start + pcacheinfo->dcache_size);
 
-	while(start < end)
+	while (start < end)
 	{
 		pcacheop->Invalidate_Dcache_ClearTag(start);
 		start += pcacheinfo->dcacheline_size;
@@ -190,7 +189,7 @@ void rt_hw_cache_init(void)
 	/*
      *	3. invalidate instruction cache;
      */
-    while(start < end) 
+    while (start < end) 
     {
 		pcacheop->Invalidate_Icache(start); //index invalidate icache 
 		start += pcacheinfo->icacheline_size;
diff --git a/libcpu/mips/loongson_1b/context_gcc.S b/libcpu/mips/loongson_1b/context_gcc.S
index e6f710e048..ec8e0b1258 100644
--- a/libcpu/mips/loongson_1b/context_gcc.S
+++ b/libcpu/mips/loongson_1b/context_gcc.S
@@ -13,6 +13,7 @@
  * 2010-09-11     bernard      port to Loongson SoC3210
  * 2011-08-08     lgnq         port to Loongson LS1B
  */
+
 #include "../common/mips.inc"
 #include "../common/stackframe.h"
 
diff --git a/libcpu/mips/loongson_1b/cpuport.c b/libcpu/mips/loongson_1b/cpuport.c
index 6182d39901..9917b0cce0 100644
--- a/libcpu/mips/loongson_1b/cpuport.c
+++ b/libcpu/mips/loongson_1b/cpuport.c
@@ -12,19 +12,21 @@
  * 2010-07-09     Bernard      first version
  * 2010-09-11     Bernard      add CPU reset implementation
  */
+
 #include <rtthread.h>
 #include "ls1b.h"
 
 /**
- * @addtogroup Loogonson LS1B
+ * @addtogroup Loongson LS1B
  */
+
 /*@{*/
 
 /**
  * this function will reset CPU
  *
  */
-void rt_hw_cpu_reset()
+void rt_hw_cpu_reset(void)
 {
 	/* open the watch-dog */
 	WDT_EN = 0x01; 		/* watch dog enable */
@@ -39,7 +41,7 @@ void rt_hw_cpu_reset()
  * this function will shutdown CPU
  *
  */
-void rt_hw_cpu_shutdown()
+void rt_hw_cpu_shutdown(void)
 {
 	rt_kprintf("shutdown...\n");
 
diff --git a/libcpu/mips/loongson_1b/exception.c b/libcpu/mips/loongson_1b/exception.c
index fcc768fb85..f46ddfa14a 100644
--- a/libcpu/mips/loongson_1b/exception.c
+++ b/libcpu/mips/loongson_1b/exception.c
@@ -19,6 +19,7 @@
 /**
  * @addtogroup Loongson
  */
+
 /*@{*/
 
 /**
diff --git a/libcpu/mips/loongson_1b/interrupt.c b/libcpu/mips/loongson_1b/interrupt.c
index 14dc820190..ddba29f489 100644
--- a/libcpu/mips/loongson_1b/interrupt.c
+++ b/libcpu/mips/loongson_1b/interrupt.c
@@ -12,13 +12,15 @@
  * 2010-10-15     Bernard      first version
  * 2010-10-15     lgnq         modified for LS1B
  */
+
 #include <rtthread.h>
 #include "ls1b.h"
 
 #define MAX_INTR 32
 
 extern rt_uint32_t rt_interrupt_nest;
-rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
+rt_uint32_t rt_interrupt_from_thread;
+rt_uint32_t rt_interrupt_to_thread;
 rt_uint32_t rt_thread_switch_interrupt_flag;
 
 static rt_isr_handler_t irq_handle_table[MAX_INTR];
@@ -29,8 +31,9 @@ static struct ls1b_intc_regs volatile *ls1b_hw0_icregs
 	= (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
 
 /**
- * @addtogroup Loogonson LS1B
+ * @addtogroup Loongson LS1B
  */
+
 /*@{*/
 
 void rt_hw_interrupt_handler(int vector)
@@ -41,7 +44,7 @@ void rt_hw_interrupt_handler(int vector)
 /**
  * This function will initialize hardware interrupt
  */
-void rt_hw_interrupt_init()
+void rt_hw_interrupt_init(void)
 {
 	rt_int32_t index;
 
diff --git a/libcpu/mips/loongson_1b/start_gcc.S b/libcpu/mips/loongson_1b/start_gcc.S
index 964e334ead..dc6e51849a 100644
--- a/libcpu/mips/loongson_1b/start_gcc.S
+++ b/libcpu/mips/loongson_1b/start_gcc.S
@@ -12,17 +12,18 @@
  * 2010-05-17     swkyer       first version
  * 2010-09-04     bernard      porting to Jz47xx
  */
+
 #include "../common/mips.inc"
 #include "../common/stackframe.h"
 
-    .section ".start", "ax"
-    .set noreorder
+	.section ".start", "ax"
+	.set noreorder
 
-    /* the program entry */
-    .globl  _start
+	/* the program entry */
+	.globl  _start
 _start:
-    .set    noreorder
-    la      ra, _start
+	.set	noreorder
+	la	ra, _start
 
 	/* disable interrupt */
 	mfc0	t0, CP0_STATUS
@@ -32,104 +33,105 @@ _start:
 
 	/* disable cache */
 	mfc0	t0, CP0_CONFIG
-	and		t0, 0xfffffff8
-	or		t0, 0x2			# disable,!default value is not it!
+	and	t0, 0xfffffff8
+	or	t0, 0x2		# disable,!default value is not it!
 	mtc0	t0, CP0_CONFIG	# Set CPU to disable cache.
 	nop
 
-    /* setup stack pointer */
-    li      sp, SYSTEM_STACK
-    la      gp, _gp
+	/* setup stack pointer */
+	li	sp, SYSTEM_STACK
+	la	gp, _gp
 
-    /* clear bss */
-    la      t0, __bss_start
-    la      t1, __bss_end
+	/* clear bss */
+	la	t0, __bss_start
+	la	t1, __bss_end
 _clr_bss_loop:
-    sw      zero, 0(t0)
-    bne     t0, t1, _clr_bss_loop
-    addiu   t0, t0, 4
+	sw	zero, 0(t0)
+	bne	t0, t1, _clr_bss_loop
+	addiu	t0, t0, 4
 
-    /* jump to RT-Thread RTOS */
-    jal     rtthread_startup
-    nop
+	/* jump to RT-Thread RTOS */
+	jal	rtthread_startup
+	nop
 
-    /* restart, never die */
-    j       _start
-    nop
-    .set    reorder
+	/* restart, never die */
+	j	_start
+	nop
+	.set	reorder
 
-    .globl  cp0_get_cause
+	.globl  cp0_get_cause
 cp0_get_cause:
-    mfc0    v0, CP0_CAUSE
-    jr      ra
-    nop
+	mfc0	v0, CP0_CAUSE
+	jr	ra
+	nop
 
-    .globl  cp0_get_status
+	.globl  cp0_get_status
 cp0_get_status:
-    mfc0    v0, CP0_STATUS
-    jr      ra
-    nop
+	mfc0	v0, CP0_STATUS
+	jr	ra
+	nop
 
-    .globl  cp0_get_hi
+	.globl	cp0_get_hi
 cp0_get_hi:
-    mfhi    v0
-    jr      ra
-    nop
+	mfhi	v0
+	jr	ra
+	nop
 
-    .globl  cp0_get_lo
+	.globl	cp0_get_lo
 cp0_get_lo:
-    mflo    v0
-    jr      ra
-    nop
+	mflo	v0
+	jr	ra
+	nop
 
 	.extern tlb_refill_handler
 	.extern cache_error_handler
 
 	/* Exception Handler */
+
 	/* 0x0 - TLB refill handler */
-    .section .vectors.1, "ax", %progbits
+	.section .vectors.1, "ax", %progbits
 	.global tlb_refill_exception
 	.type	tlb_refill_exception,@function
 tlb_refill_exception:
-    j      tlb_refill_handler
-    nop
+	j	tlb_refill_handler
+	nop
 	
 	/* 0x100 - Cache error handler */
-    .section .vectors.2, "ax", %progbits
-    j      cache_error_handler
-    nop
+	.section .vectors.2, "ax", %progbits
+	j	cache_error_handler
+	nop
     
 	/* 0x180 - Exception/Interrupt handler */
-    .section .vectors.3, "ax", %progbits
+	.section .vectors.3, "ax", %progbits
 	.global general_exception
 	.type	general_exception,@function
 general_exception:
-    j      _general_exception_handler
-    nop
+	j	_general_exception_handler
+	nop
     
 	/* 0x200 - Special Exception Interrupt handler (when IV is set in CP0_CAUSE) */
-    .section .vectors.4, "ax", %progbits
+	.section .vectors.4, "ax", %progbits
 	.global irq_exception
 	.type	irq_exception,@function
 irq_exception:
-    j      _irq_handler
-    nop
+	j	_irq_handler
+	nop
 	
-    .section .vectors, "ax", %progbits
+	.section .vectors, "ax", %progbits
 	.extern mips_irq_handle
 
-    /* general exception handler */
+	/* general exception handler */
 _general_exception_handler:
-    .set    noreorder
-    la      k0, mips_irq_handle
-    jr      k0
-    nop
-    .set    reorder
+	.set	noreorder
+	la	k0, mips_irq_handle
+	jr	k0
+	nop
+	.set	reorder
 
-    /* interrupt handler */
+	/* interrupt handler */
 _irq_handler:
-    .set    noreorder
-    la      k0, mips_irq_handle
-    jr      k0
-    nop
-    .set    reorder
+	.set	noreorder
+	la	k0, mips_irq_handle
+	jr	k0
+	nop
+	.set	reorder