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rt-thread-official
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[bsp][w60x] 更新驱动，添加加解密及配网功能，增强稳定性。 

1. 新增 crypto, onchip_Flash, soft_i2c 驱动
2. 新增 oneshot 配网功能
3. 完善 I2C, UART, SPI, WIFI 等基本驱动
4. 更新 Kconfig 配置，用户交互更加友好
5. 屏蔽 末尾 80 内存，无法作为栈使用。
This commit is contained in:
tangyuxin 2019-08-03 10:39:03 +08:00
parent 70cec89b58
commit 08656c3034
35 changed files with 2604 additions and 2430 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

128
bsp/w60x/.config
View File

@ -131,47 +131,89 @@ CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
CONFIG_RT_USING_HWTIMER=y
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_I2C=y
CONFIG_RT_USING_I2C_BITOPS=y
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
CONFIG_RT_USING_RTC=y
# CONFIG_RT_USING_ALARM is not set
CONFIG_RT_USING_SOFT_RTC=y
CONFIG_RTC_SYNC_USING_NTP=y
CONFIG_RTC_NTP_FIRST_SYNC_DELAY=30
CONFIG_RTC_NTP_SYNC_PERIOD=3600
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_QSPI is not set
# CONFIG_RT_USING_SPI_MSD is not set
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
CONFIG_RT_USING_WDT=y
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
#
# Using Hardware Crypto drivers
#
# CONFIG_RT_USING_HWCRYPTO is not set
#
# Using WiFi
#
CONFIG_RT_USING_HWCRYPTO=y
CONFIG_RT_HWCRYPTO_DEFAULT_NAME="hwcryto"
CONFIG_RT_HWCRYPTO_IV_MAX_SIZE=16
CONFIG_RT_HWCRYPTO_KEYBIT_MAX_SIZE=256
# CONFIG_RT_HWCRYPTO_USING_GCM is not set
CONFIG_RT_HWCRYPTO_USING_AES=y
CONFIG_RT_HWCRYPTO_USING_AES_ECB=y
CONFIG_RT_HWCRYPTO_USING_AES_CBC=y
# CONFIG_RT_HWCRYPTO_USING_AES_CFB is not set
# CONFIG_RT_HWCRYPTO_USING_AES_CTR is not set
# CONFIG_RT_HWCRYPTO_USING_AES_OFB is not set
# CONFIG_RT_HWCRYPTO_USING_DES is not set
# CONFIG_RT_HWCRYPTO_USING_3DES is not set
# CONFIG_RT_HWCRYPTO_USING_RC4 is not set
CONFIG_RT_HWCRYPTO_USING_MD5=y
CONFIG_RT_HWCRYPTO_USING_SHA1=y
# CONFIG_RT_HWCRYPTO_USING_SHA2 is not set
CONFIG_RT_HWCRYPTO_USING_RNG=y
CONFIG_RT_HWCRYPTO_USING_CRC=y
CONFIG_RT_HWCRYPTO_USING_CRC_07=y
CONFIG_RT_HWCRYPTO_USING_CRC_8005=y
CONFIG_RT_HWCRYPTO_USING_CRC_1021=y
# CONFIG_RT_HWCRYPTO_USING_CRC_3D65 is not set
CONFIG_RT_HWCRYPTO_USING_CRC_04C11DB7=y
CONFIG_RT_HWCRYPTO_USING_BIGNUM=y
CONFIG_RT_HWCRYPTO_USING_BIGNUM_EXPTMOD=y
CONFIG_RT_HWCRYPTO_USING_BIGNUM_MULMOD=y
# CONFIG_RT_HWCRYPTO_USING_BIGNUM_MUL is not set
# CONFIG_RT_HWCRYPTO_USING_BIGNUM_ADD is not set
# CONFIG_RT_HWCRYPTO_USING_BIGNUM_SUB is not set
CONFIG_RT_USING_WIFI=y
CONFIG_RT_WLAN_DEVICE_STA_NAME="wlan0"
CONFIG_RT_WLAN_DEVICE_AP_NAME="wlan1"
CONFIG_RT_WLAN_DEFAULT_PROT="lwip"
CONFIG_RT_WLAN_SCAN_WAIT_MS=10000
CONFIG_RT_WLAN_CONNECT_WAIT_MS=10000
CONFIG_RT_WLAN_SSID_MAX_LENGTH=32
CONFIG_RT_WLAN_PASSWORD_MAX_LENGTH=32
CONFIG_RT_WLAN_DEV_EVENT_NUM=2
CONFIG_RT_WLAN_MANAGE_ENABLE=y
CONFIG_RT_WLAN_SCAN_WAIT_MS=10000
CONFIG_RT_WLAN_CONNECT_WAIT_MS=10000
CONFIG_RT_WLAN_SCAN_SORT=y
CONFIG_RT_WLAN_MSH_CMD_ENABLE=y
CONFIG_RT_WLAN_AUTO_CONNECT_ENABLE=y
CONFIG_AUTO_CONNECTION_PERIOD_MS=2000
CONFIG_RT_WLAN_CFG_ENABLE=y
CONFIG_RT_WLAN_CFG_INFO_MAX=3
CONFIG_RT_WLAN_PROT_ENABLE=y
CONFIG_RT_WLAN_PROT_NAME_LEN=8
CONFIG_RT_WLAN_PROT_MAX=2
CONFIG_RT_WLAN_DEFAULT_PROT="lwip"
CONFIG_RT_WLAN_PROT_LWIP_ENABLE=y
CONFIG_RT_WLAN_PROT_LWIP_NAME="lwip"
# CONFIG_RT_WLAN_PROT_LWIP_PBUF_FORCE is not set
CONFIG_RT_WLAN_WORK_THREAD_ENABLE=y
CONFIG_RT_WLAN_WORKQUEUE_THREAD_NAME="wlan_job"
CONFIG_RT_WLAN_WORKQUEUE_THREAD_SIZE=2048
CONFIG_RT_WLAN_WORKQUEUE_THREAD_PRIO=22
CONFIG_RT_WLAN_DEV_EVENT_NUM=2
# CONFIG_RT_WLAN_PROT_LWIP_PBUF_FORCE is not set
# CONFIG_RT_WLAN_DEBUG is not set
#
@ -275,11 +317,6 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
CONFIG_RT_LWIP_USING_PING=y
# CONFIG_RT_LWIP_DEBUG is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
#
# AT commands
#
@ -340,6 +377,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
@ -360,7 +398,22 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
CONFIG_PKG_USING_NETUTILS=y
CONFIG_PKG_NETUTILS_PATH="/packages/iot/netutils"
# CONFIG_PKG_NETUTILS_TFTP is not set
# CONFIG_PKG_NETUTILS_IPERF is not set
# CONFIG_PKG_NETUTILS_NETIO is not set
CONFIG_PKG_NETUTILS_NTP=y
CONFIG_NETUTILS_NTP_TIMEZONE=8
CONFIG_NETUTILS_NTP_HOSTNAME="cn.ntp.org.cn"
CONFIG_NETUTILS_NTP_HOSTNAME2="ntp.rt-thread.org"
CONFIG_NETUTILS_NTP_HOSTNAME3="edu.ntp.org.cn"
# CONFIG_PKG_NETUTILS_TELNET is not set
# CONFIG_PKG_NETUTILS_TCPDUMP is not set
CONFIG_PKG_USING_NETUTILS_V110=y
# CONFIG_PKG_USING_NETUTILS_V100 is not set
# CONFIG_PKG_USING_NETUTILS_LATEST_VERSION is not set
CONFIG_PKG_NETUTILS_VER="v1.1.0"
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
@ -379,6 +432,9 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
#
# security packages
@ -400,6 +456,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
#
# tools packages
@ -429,6 +486,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
#
# peripheral libraries and drivers
@ -459,6 +517,7 @@ CONFIG_PKG_WM_LIBRARIES_VER="latest"
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_LCD_DRIVERS is not set
#
# miscellaneous packages
@ -486,6 +545,7 @@ CONFIG_PKG_WM_LIBRARIES_VER="latest"
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
#
# Env config
@ -500,10 +560,8 @@ CONFIG_BSP_USING_WM_LIBRARIES=y
#
CONFIG_SOC_W600_A8xx=y
# CONFIG_SOC_W601_A8xx is not set
#
# Hardware Drivers Config
#
CONFIG_W600_EV_BOARD=y
# CONFIG_W60X_CUSTOM_BOARD is not set
#
# On-chip Peripheral Drivers
@ -511,18 +569,20 @@ CONFIG_SOC_W600_A8xx=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_UART2 is not set
CONFIG_BSP_USING_PIN=y
CONFIG_BSP_USING_WIFI=y
# CONFIG_BSP_USING_HWTIMER is not set
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_SOFT_I2C is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_RTC is not set
# CONFIG_BSP_USING_CRYPTO is not set
# CONFIG_BSP_USING_STANDBY is not set
#
# Offboard Peripheral Drivers
# External Libraries
#
# CONFIG_BSP_USING_FLASH is not set
CONFIG_WM_USING_ONESHOT=y
# CONFIG_WM_USING_ONESHOT_DEMO is not set

4
bsp/w60x/README.md
View File

@ -13,13 +13,13 @@ W60X 芯片是[联盛德微电子](http://www.winnermicro.com)推出的一款嵌
| UART | 支持 | UART0/UART1/UART2 |
| GPIO | 支持 | 自动根据芯片型号选择引脚布局 |
| SPI | 支持 | 低速 SPI，支持 SPI BUS，8/32bit 主机模式 |
| SPI Flash | 支持 | 支持 W25QXX、SFUD |
| WDT | 支持 | 支持 |
| I2C | 支持 | 硬件 I2C |
| I2C | 支持 | 硬件 I2C 和 软件 I2C |
| RTC | 支持 | 支持 ntp 同步、支持 Alarm |
| ADC | 支持 | 8 channel ADC 采集 CPU 温度采集（W601 支持） |
| PWM | 支持 | 5 channel PWM 输出 |
| Timer | 支持 | 5个Timers 独立工作 |
| Crypto | 支持 | 支持硬件 AES/DES/3DES/RC/SHA1/MD3/CRC 加解密算法|
| WiFi | 支持 | 支持 IEEE802.11b/g/n，支持 sta、ap、ap+sta 模式 |
| 低功耗 | 支持 | 支持 WiFi 协议节电，支持 standby 深度节电 |

123
bsp/w60x/drivers/Kconfig
View File

@ -4,19 +4,31 @@ config BSP_USING_WM_LIBRARIES
select PKG_USING_WM_LIBRARIES
default y
menu "W60x Device config"
choice
prompt "Device type"
default SOC_W600-A8xx
prompt "SOC type"
default SOC_W600_A8xx
config SOC_W600_A8xx
bool "W600-A8xx"
config SOC_W601_A8xx
bool "W601-A8xx"
endchoice
choice
prompt "Board type"
if SOC_W600_A8xx
config W600_EV_BOARD
bool "W600_EV BOARD"
endif
if SOC_W601_A8xx
config W601_IOT_BOARD
bool "W601 IoT Board"
endif
config W60X_CUSTOM_BOARD
bool "Custom Board"
endchoice
endmenu
menu "Hardware Drivers Config"
menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_UART
bool "Using UART"
@ -28,6 +40,7 @@ menu "Hardware Drivers Config"
bool "Enabel UART 0"
default y
if W600_EV_BOARD || W60X_CUSTOM_BOARD
config BSP_USING_UART1
bool "Enabel UART 1"
default n
@ -36,14 +49,10 @@ menu "Hardware Drivers Config"
config WM_UART1_BAUDRATE
int "UART1 baudrate"
default 115200
config WM_UART1_RX_PIN
int "UART1 RX pin number"
default 31
config WM_UART1_TX_PIN
int "UART1 TX pin number"
default 32
endif
endif
if W601_IOT_BOARD || W60X_CUSTOM_BOARD
config BSP_USING_UART2
bool "Enabel UART 2"
default n
@ -52,12 +61,7 @@ menu "Hardware Drivers Config"
config WM_UART2_BAUDRATE
int "UART2 baudrate"
default 115200
config WM_UART2_RX_PIN
int "UART2 RX pin number"
default 13
config WM_UART2_TX_PIN
int "UART2 TX pin number"
default 14
endif
endif
endif
@ -70,6 +74,10 @@ menu "Hardware Drivers Config"
bool "Using WIFI"
select RT_USING_WIFI
select RT_USING_LWIP
select PKG_USING_NETUTILS
select PKG_NETUTILS_NTP
select RT_USING_RTC
select RT_USING_SOFT_RTC if !BSP_USING_RTC
default y
if SOC_W601_A8xx
@ -154,7 +162,7 @@ menu "Hardware Drivers Config"
if USING_PWM_CH4
config WM_PWM_CH4_PIN
int "wm pwm channel 4 pin number"
default 20
default 37
endif
config USING_PWM_CH5
bool "Enable pwm channel 5"
@ -166,7 +174,7 @@ menu "Hardware Drivers Config"
endif
endif
menuconfig BSP_USING_I2C
config BSP_USING_I2C
bool "Enable I2C"
select RT_USING_I2C
default n
@ -175,12 +183,24 @@ menu "Hardware Drivers Config"
config WM_HW_I2C_FREQ
int "wm hardware I2C frequency(HZ)"
default 200000
config WM_I2C_DAT_PIN
int "wm I2C DAT pin number"
default 19
config WM_I2C_SCL_PIN
int "wm I2C SCL pin number"
default 18
endif
menuconfig BSP_USING_SOFT_I2C
bool "Enable SOFT I2C"
select RT_USING_I2C
select RT_USING_I2C_BITOPS
default n
if BSP_USING_SOFT_I2C
config BSP_USING_SOFT_I2C1
bool "Enabel SOFT I2C1"
default n
endif
if BSP_USING_SOFT_I2C
config BSP_USING_SOFT_I2C2
bool "Enabel SOFT I2C2"
default n
endif
menuconfig BSP_USING_SPI
@ -189,15 +209,9 @@ menu "Hardware Drivers Config"
default n
if BSP_USING_SPI
config WM_SPI_CK_PIN
int "wm SPI CK pin number"
default 21
config WM_SPI_DO_PIN
int "wm SPI DO pin number"
default 23
config WM_SPI_DI_PIN
int "wm SPI DI pin number"
default 22
config WM_SPI_BUS_NAME
string "Set SPI BUS name"
default "spi0"
endif
config BSP_USING_WDT
@ -217,27 +231,38 @@ menu "Hardware Drivers Config"
default n
endif
config BSP_USING_CRYPTO
bool "Enable Hardware Crypto"
select RT_USING_HWCRYPTO
select RT_HWCRYPTO_USING_AES
select RT_HWCRYPTO_USING_AES_ECB
select RT_HWCRYPTO_USING_AES_CBC
select RT_HWCRYPTO_USING_MD5
select RT_HWCRYPTO_USING_SHA1
select RT_HWCRYPTO_USING_RNG
select RT_HWCRYPTO_USING_CRC
select RT_HWCRYPTO_USING_CRC_07
select RT_HWCRYPTO_USING_CRC_8005
select RT_HWCRYPTO_USING_CRC_1021
select RT_HWCRYPTO_USING_CRC_04C11DB7
select RT_HWCRYPTO_USING_BIGNUM
select RT_HWCRYPTO_USING_BIGNUM_EXPTMOD
default n
config BSP_USING_STANDBY
bool "Enable standby"
default n
endmenu
menu "Offboard Peripheral Drivers"
menuconfig BSP_USING_FLASH
bool "Enable Flash"
select RT_USING_SFUD
select BSP_USING_SPI
default n
menu "External Libraries"
config WM_USING_ONESHOT
bool "Using winner micro Oneshot"
select RT_USING_WIFI
default y
if BSP_USING_FLASH
config SPI_Flash_BUS_NAME
string "SPI BUS Name"
default "spi0"
config SPI_Flash_CS_PIN
int "SPI Flash CS pin number"
default 20
if WM_USING_ONESHOT
config WM_USING_ONESHOT_DEMO
bool "Using Oneshot Demo"
default y
endif
endmenu
endmenu

20
bsp/w60x/drivers/SConscript
View File

@ -7,6 +7,7 @@ objs = []
src = Split('''
board.c
drv_uart.c
drv_flash.c
pin_map.c
''')
@ -19,17 +20,11 @@ if GetDepend(['BSP_USING_WIFI']):
if GetDepend('BSP_USING_PIN'):
src += ['drv_pin.c']
if GetDepend('BSP_USING_SDIO'):
src += ['drv_sdio.c']
if GetDepend('BSP_USING_CAN'):
src += ['drv_can.c']
if GetDepend('BSP_USING_HWTIMER'):
src += ['drv_hw_timer.c']
if GetDepend('BSP_USING_CPUTIME'):
src += ['drv_cputime.c']
if GetDepend('BSP_USING_SOFT_I2C'):
src += ['drv_soft_i2c.c']
if GetDepend('BSP_USING_I2C'):
src += ['drv_i2c.c']
@ -37,12 +32,6 @@ if GetDepend('BSP_USING_I2C'):
if GetDepend('BSP_USING_SPI'):
src += ['drv_spi.c']
if GetDepend(['BSP_USING_FLASH']):
src += ['drv_spiflash.c']
if GetDepend('BSP_USING_LCD'):
src += ['drv_lcd.c']
if GetDepend('BSP_USING_PWM'):
src += ['drv_pwm.c']
@ -55,6 +44,9 @@ if GetDepend('BSP_USING_WDT'):
if GetDepend('BSP_USING_STANDBY'):
src += ['drv_standby.c']
if GetDepend('BSP_USING_CRYPTO'):
src += ['drv_crypto.c']
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)

23
bsp/w60x/drivers/board.c
View File

@ -133,6 +133,21 @@ static void _idle_hook_callback(void)
#endif
}
static void _thread_inited_hook(rt_thread_t thread)
{
rt_uint32_t stack_size, stk_start;
stack_size = (rt_uint32_t)thread->stack_size;
stk_start = (rt_uint32_t)thread->stack_addr;
if ((stk_start + stack_size) >= TASK_STACK_USING_MEM_UPPER_RANGE)
{
rt_kprintf("thread[%s] stack only between 0x%08x and 0x%08x, please use rt_create_thread()!!\n",
thread->name, TASK_STACK_USING_MEM_LOWER_RANGE, TASK_STACK_USING_MEM_UPPER_RANGE);
}
RT_ASSERT((stk_start + stack_size) < TASK_STACK_USING_MEM_UPPER_RANGE);
}
void wm_sys_clk_config(void)
{
tls_sys_clk sysclk;
@ -188,6 +203,14 @@ void rt_hw_board_init(void)
NVIC_SystemLPConfig(NVIC_LP_SLEEPDEEP, ENABLE);
rt_thread_idle_sethook(_idle_hook_callback);
rt_thread_inited_sethook(_thread_inited_hook);
}
#include <wm_watchdog.h>
void rt_hw_cpu_reset(void)
{
extern void tls_sys_reset(void);
tls_sys_reset();
}
#ifdef RT_USING_FINSH

5
bsp/w60x/drivers/board.h
View File

@ -22,7 +22,10 @@ extern int __bss_end__;
#define HEAP_BEGIN (&__bss_end__)
#endif
#define HEAP_END (0x20038000UL)
#define HEAP_END (0x20028000UL)
#define HARDWARE_VERSION 0x0003U
#include "pin_config.h"
void rt_hw_board_init(void);

738
bsp/w60x/drivers/drv_crypto.c Normal file
View File

@ -0,0 +1,738 @@
/*
* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-17 tyx 1st version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <stdlib.h>
#include <string.h>
#include "drv_crypto.h"
#include "wm_crypto_hard.h"
// #define WM_HWCRYPTO_NOT_LOCK
// #define WM_HWCRYPTO_NOT_ALIGN_CHECK
extern u32 tls_crypto_crc_update_adv(u32 crc_val, CRYPTO_CRC_TYPE type, u8 mode, const unsigned char *in, u32 len);
extern int tls_crypto_des_encrypt_decrypt_adv(unsigned char *key, unsigned char *IV, const unsigned char *in, unsigned char *out, u32 len, CRYPTO_MODE cbc, CRYPTO_WAY dec);
extern int tls_crypto_3des_encrypt_decrypt_adv(unsigned char *key, unsigned char *IV, const unsigned char *in, unsigned char *out, u32 len, CRYPTO_MODE cbc, CRYPTO_WAY dec);
extern int tls_crypto_aes_encrypt_decrypt_adv(unsigned char *key, unsigned char *IV, const unsigned char *in, unsigned char *out, u32 len, CRYPTO_MODE cbc, CRYPTO_WAY dec);
extern int tls_crypto_rc4_adv(unsigned char *key, u32 keylen, const unsigned char *in, unsigned char *out, u32 len);
struct wm_hwcrypto_device
{
struct rt_hwcrypto_device dev;
struct rt_mutex mutex;
};
struct hash_ctx_des
{
psDigestContext_t contex;
};
static rt_uint32_t _rng_rand(struct hwcrypto_rng *ctx)
{
rt_uint32_t rand_num;
struct wm_hwcrypto_device *_hwcrypto = (struct wm_hwcrypto_device *)ctx->parent.device;
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_take(&_hwcrypto->mutex, RT_WAITING_FOREVER);
#endif
tls_crypto_random_init((u32)rt_tick_get(), CRYPTO_RNG_SWITCH_32);
tls_crypto_random_bytes((unsigned char *)&rand_num, sizeof(rand_num));
tls_crypto_random_stop();
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_release(&_hwcrypto->mutex);
#endif
return rand_num;
}
static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
{
rt_uint32_t crc_result;
CRYPTO_CRC_TYPE type;
u8 mode = 0;
struct wm_hwcrypto_device *_hwcrypto = (struct wm_hwcrypto_device *)ctx->parent.device;
unsigned char align_flag = 0;
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (((rt_uint32_t)in % 4) != 0)
{
void *temp;
temp = rt_malloc(length);
if (temp)
{
memcpy(temp, in, length);
in = temp;
align_flag = 1;
}
else
{
return 0;
}
}
#endif
switch (ctx->crc_cfg.poly)
{
case 0x04C11DB7:
type = CRYPTO_CRC_TYPE_32;
break;
case 0x00001021:
type = CRYPTO_CRC_TYPE_16_CCITT;
break;
case 0x00008005:
type = CRYPTO_CRC_TYPE_16_MODBUS;
break;
case 0x00000007:
case 0x00000207:
type = CRYPTO_CRC_TYPE_8;
break;
default:
return 0;
}
mode |= ctx->crc_cfg.flags & CRC_FLAG_REFOUT ? OUTPUT_REFLECT : 0;
mode |= ctx->crc_cfg.flags & CRC_FLAG_REFIN ? INPUT_REFLECT : 0;
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_take(&_hwcrypto->mutex, RT_WAITING_FOREVER);
#endif
crc_result = tls_crypto_crc_update_adv(ctx->crc_cfg.last_val, type, mode, in, length);
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_release(&_hwcrypto->mutex);
#endif
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (align_flag)
{
rt_free((rt_uint8_t *)in);
}
#endif
ctx->crc_cfg.last_val = crc_result;
return crc_result ^ 0x00 ^ ctx->crc_cfg.xorout;
}
static rt_err_t _hash_update(struct hwcrypto_hash *ctx, const rt_uint8_t *in, rt_size_t length)
{
rt_err_t err = RT_EOK;
struct wm_hwcrypto_device *_hwcrypto = (struct wm_hwcrypto_device *)ctx->parent.device;
unsigned char align_flag = 0;
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (((rt_uint32_t)in % 4) != 0)
{
void *temp;
temp = rt_malloc(length);
if (temp)
{
memcpy(temp, in, length);
in = temp;
align_flag = 1;
}
else
{
return -RT_ENOMEM;
}
}
#endif
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_take(&_hwcrypto->mutex, RT_WAITING_FOREVER);
#endif
switch (ctx->parent.type & HWCRYPTO_MAIN_TYPE_MASK)
{
case HWCRYPTO_TYPE_MD5:
tls_crypto_md5_update(&((struct hash_ctx_des *)(ctx->parent.contex))->contex, in, length);
break;
case HWCRYPTO_TYPE_SHA1:
tls_crypto_sha1_update(&((struct hash_ctx_des *)(ctx->parent.contex))->contex, in, length);
break;
default:
err = -RT_ERROR;
break;
}
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_release(&_hwcrypto->mutex);
#endif
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (align_flag)
{
rt_free((rt_uint8_t *)in);
}
#endif
return err;
}
static rt_err_t _hash_finish(struct hwcrypto_hash *ctx, rt_uint8_t *out, rt_size_t length)
{
rt_err_t err = RT_EOK;
struct wm_hwcrypto_device *_hwcrypto = (struct wm_hwcrypto_device *)ctx->parent.device;
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_take(&_hwcrypto->mutex, RT_WAITING_FOREVER);
#endif
switch (ctx->parent.type & HWCRYPTO_MAIN_TYPE_MASK)
{
case HWCRYPTO_TYPE_MD5:
tls_crypto_md5_final(&((struct hash_ctx_des *)(ctx->parent.contex))->contex, out);
break;
case HWCRYPTO_TYPE_SHA1:
tls_crypto_sha1_final(&((struct hash_ctx_des *)(ctx->parent.contex))->contex, out);
break;
default:
err = -RT_ERROR;
break;
}
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_release(&_hwcrypto->mutex);
#endif
return err;
}
static rt_err_t _des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hwcrypto_symmetric_info *symmetric_info)
{
CRYPTO_WAY mode;
CRYPTO_MODE cbc;
struct wm_hwcrypto_device *_hwcrypto = (struct wm_hwcrypto_device *)symmetric_ctx->parent.device;
unsigned char *in, *out, align_flag = 0;
if ((symmetric_ctx->key_bitlen >> 3) != 8
|| (symmetric_info->length % 8) != 0)
{
return -RT_EINVAL;
}
in = (unsigned char *)symmetric_info->in;
out = (unsigned char *)symmetric_info->out;
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (((rt_uint32_t)in % 4) != 0 || ((rt_uint32_t)out % 4) != 0)
{
in = rt_malloc(symmetric_info->length);
if (in)
{
memcpy(in, symmetric_info->in, symmetric_info->length);
out = in;
align_flag = 1;
}
else
{
return -RT_ENOMEM;
}
}
#endif
mode = symmetric_info->mode == HWCRYPTO_MODE_ENCRYPT ? CRYPTO_WAY_ENCRYPT : CRYPTO_WAY_DECRYPT;
switch (symmetric_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
{
case HWCRYPTO_TYPE_DES_ECB:
cbc = CRYPTO_MODE_ECB;
break;
case HWCRYPTO_TYPE_DES_CBC:
cbc = CRYPTO_MODE_CBC;
break;
default :
return -RT_ERROR;
}
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_take(&_hwcrypto->mutex, RT_WAITING_FOREVER);
#endif
tls_crypto_des_encrypt_decrypt_adv(symmetric_ctx->key, symmetric_ctx->iv,
symmetric_info->in, symmetric_info->out,
symmetric_info->length, cbc, mode);
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_release(&_hwcrypto->mutex);
#endif
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (align_flag)
{
memcpy(symmetric_info->out, out, symmetric_info->length);
rt_free(in);
}
#endif
return RT_EOK;
}
static rt_err_t _des3_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hwcrypto_symmetric_info *symmetric_info)
{
CRYPTO_WAY mode;
CRYPTO_MODE cbc;
struct wm_hwcrypto_device *_hwcrypto = (struct wm_hwcrypto_device *)symmetric_ctx->parent.device;
unsigned char *in, *out, align_flag = 0;
if ((symmetric_ctx->key_bitlen >> 3) != 24
|| (symmetric_info->length % 8) != 0)
{
return -RT_EINVAL;
}
in = (unsigned char *)symmetric_info->in;
out = (unsigned char *)symmetric_info->out;
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (((rt_uint32_t)in % 4) != 0 || ((rt_uint32_t)out % 4) != 0)
{
in = rt_malloc(symmetric_info->length);
if (in)
{
memcpy(in, symmetric_info->in, symmetric_info->length);
out = in;
align_flag = 1;
}
else
{
return -RT_ENOMEM;
}
}
#endif
mode = symmetric_info->mode == HWCRYPTO_MODE_ENCRYPT ? CRYPTO_WAY_ENCRYPT : CRYPTO_WAY_DECRYPT;
switch (symmetric_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
{
case HWCRYPTO_TYPE_3DES_ECB:
cbc = CRYPTO_MODE_ECB;
break;
case HWCRYPTO_TYPE_3DES_CBC:
cbc = CRYPTO_MODE_CBC;
break;
default :
return -RT_ERROR;
}
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_take(&_hwcrypto->mutex, RT_WAITING_FOREVER);
#endif
tls_crypto_3des_encrypt_decrypt_adv(symmetric_ctx->key, symmetric_ctx->iv,
symmetric_info->in, symmetric_info->out,
symmetric_info->length, cbc, mode);
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_release(&_hwcrypto->mutex);
#endif
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (align_flag)
{
memcpy(symmetric_info->out, out, symmetric_info->length);
rt_free(in);
}
#endif
return RT_EOK;
}
static rt_err_t _rc4_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hwcrypto_symmetric_info *symmetric_info)
{
struct wm_hwcrypto_device *_hwcrypto = (struct wm_hwcrypto_device *)symmetric_ctx->parent.device;
unsigned char *in, *out, align_flag = 0;
if ((symmetric_ctx->key_bitlen >> 3) != 16)
{
return -RT_EINVAL;
}
in = (unsigned char *)symmetric_info->in;
out = (unsigned char *)symmetric_info->out;
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (((rt_uint32_t)in % 4) != 0 || ((rt_uint32_t)out % 4) != 0)
{
in = rt_malloc(symmetric_info->length);
if (in)
{
memcpy(in, symmetric_info->in, symmetric_info->length);
out = in;
align_flag = 1;
}
else
{
return -RT_ENOMEM;
}
}
#endif
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_take(&_hwcrypto->mutex, RT_WAITING_FOREVER);
#endif
tls_crypto_rc4_adv(symmetric_ctx->key, symmetric_ctx->key_bitlen >> 3,
(unsigned char *)symmetric_info->in,
symmetric_info->out,
symmetric_info->length);
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_release(&_hwcrypto->mutex);
#endif
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (align_flag)
{
memcpy(symmetric_info->out, out, symmetric_info->length);
rt_free(in);
}
#endif
return RT_EOK;
}
static rt_err_t _aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hwcrypto_symmetric_info *symmetric_info)
{
CRYPTO_WAY mode;
CRYPTO_MODE cbc;
struct wm_hwcrypto_device *_hwcrypto = (struct wm_hwcrypto_device *)symmetric_ctx->parent.device;
unsigned char *in, *out, align_flag = 0;
if ((symmetric_ctx->key_bitlen >> 3) != 16
|| (symmetric_info->length % 16) != 0)
{
return -RT_EINVAL;
}
in = (unsigned char *)symmetric_info->in;
out = (unsigned char *)symmetric_info->out;
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (((rt_uint32_t)in % 4) != 0 || ((rt_uint32_t)out % 4) != 0)
{
in = rt_malloc(symmetric_info->length);
if (in)
{
memcpy(in, symmetric_info->in, symmetric_info->length);
out = in;
align_flag = 1;
}
else
{
return -RT_ENOMEM;
}
}
#endif
mode = symmetric_info->mode == HWCRYPTO_MODE_ENCRYPT ? CRYPTO_WAY_ENCRYPT : CRYPTO_WAY_DECRYPT;
switch (symmetric_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
{
case HWCRYPTO_TYPE_AES_ECB:
cbc = CRYPTO_MODE_ECB;
break;
case HWCRYPTO_TYPE_AES_CBC:
cbc = CRYPTO_MODE_CBC;
break;
case HWCRYPTO_TYPE_AES_CTR:
cbc = CRYPTO_MODE_CTR;
break;
default :
return -RT_ERROR;
}
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_take(&_hwcrypto->mutex, RT_WAITING_FOREVER);
#endif
tls_crypto_aes_encrypt_decrypt_adv(symmetric_ctx->key, symmetric_ctx->iv,
in, out, symmetric_info->length, cbc, mode);
#if !defined(WM_HWCRYPTO_NOT_LOCK)
rt_mutex_release(&_hwcrypto->mutex);
#endif
#if !defined(WM_HWCRYPTO_NOT_ALIGN_CHECK)
if (align_flag)
{
memcpy(symmetric_info->out, out, symmetric_info->length);
rt_free(in);
}
#endif
return RT_EOK;
}
/**< a = b ^ c (mod d) */
static rt_err_t _bignum_exptmod(struct hwcrypto_bignum *bignum_ctx,
struct hw_bignum_mpi *x,
const struct hw_bignum_mpi *a,
const struct hw_bignum_mpi *b,
const struct hw_bignum_mpi *c)
{
pstm_int pa, pb, pm, pres;
u32 * buff_a = NULL;
u32 * buff_b = NULL;
u32 * buff_m = NULL;
int err = -1;
void *buff;
int buff_len;
pstm_init(NULL, &pres);
buff_a = tls_mem_alloc(a->total);
if(buff_a == NULL)
goto out;
buff_b = tls_mem_alloc(b->total);
if(buff_b == NULL)
goto out;
buff_m = tls_mem_alloc(c->total);
if(buff_m == NULL)
goto out;
memset(buff_a, 0, a->total);
memset(buff_b, 0, b->total);
memset(buff_m, 0, c->total);
memcpy(buff_a, a->p, a->total);
memcpy(buff_b, b->p, b->total);
memcpy(buff_m, c->p, c->total);
pstm_reverse((unsigned char *)buff_a, a->total);
pstm_reverse((unsigned char *)buff_b, b->total);
pstm_reverse((unsigned char *)buff_m, c->total);
// *((volatile unsigned int *)0x40000710) = *((volatile unsigned int *)0x40000710) | (0x1 << 28);
if ((err = pstm_init_for_read_unsigned_bin(NULL, &pa, a->total)) != PS_SUCCESS){
goto out;
}
if ((err = pstm_read_unsigned_bin(&pa, (unsigned char *)buff_a, a->total)) != PS_SUCCESS) {
goto out;
}
if ((err = pstm_init_for_read_unsigned_bin(NULL, &pb, b->total)) != PS_SUCCESS){
goto out;
}
if ((err = pstm_read_unsigned_bin(&pb, (unsigned char *)buff_b, b->total)) != PS_SUCCESS) {
goto out;
}
if ((err = pstm_init_for_read_unsigned_bin(NULL, &pm, c->total)) != PS_SUCCESS){
goto out;
}
if ((err = pstm_read_unsigned_bin(&pm, (unsigned char *)buff_m, c->total)) != PS_SUCCESS) {
goto out;
}
tls_crypto_exptmod(&pa, &pb, &pm, &pres);
buff_len = pstm_unsigned_bin_size(&pres);
buff = rt_malloc(buff_len);
pstm_to_unsigned_bin_nr(NULL, &pres, buff);
x->sign = pres.sign;
x->p = buff;
x->total = buff_len;
out:
if(buff_a)
tls_mem_free(buff_a);
if(buff_b)
tls_mem_free(buff_b);
if(buff_m)
tls_mem_free(buff_m);
pstm_clear(&pa);
pstm_clear(&pb);
pstm_clear(&pm);
pstm_clear(&pres);
if (a->sign < 0)
{
rt_kprintf("a->sign < 0\n");
}
return err == PS_SUCCESS ? RT_EOK : -RT_ERROR;
}
static const struct hwcrypto_symmetric_ops aes_ops =
{
.crypt = _aes_crypt,
};
static const struct hwcrypto_symmetric_ops rc4_ops =
{
.crypt = _rc4_crypt,
};
static const struct hwcrypto_symmetric_ops des_ops =
{
.crypt = _des_crypt,
};
static const struct hwcrypto_symmetric_ops des3_ops =
{
.crypt = _des3_crypt,
};
static const struct hwcrypto_hash_ops hash_ops =
{
.update = _hash_update,
.finish = _hash_finish,
};
static const struct hwcrypto_rng_ops rng_ops =
{
.update = _rng_rand,
};
static const struct hwcrypto_crc_ops crc_ops =
{
.update = _crc_update,
};
static const struct hwcrypto_bignum_ops bignum_ops =
{
.add = RT_NULL,
.sub = RT_NULL,
.mul = RT_NULL,
.mulmod = RT_NULL,
.exptmod = _bignum_exptmod,
};
static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
{
rt_err_t res = RT_EOK;
void *contex;
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
{
case HWCRYPTO_TYPE_AES :
ctx->contex = RT_NULL;
((struct hwcrypto_symmetric *)ctx)->ops = &aes_ops;
break;
case HWCRYPTO_TYPE_RC4 :
ctx->contex = RT_NULL;
((struct hwcrypto_symmetric *)ctx)->ops = &rc4_ops;
break;
case HWCRYPTO_TYPE_MD5:
case HWCRYPTO_TYPE_SHA1:
contex = rt_malloc(sizeof(struct hash_ctx_des));
if (contex == RT_NULL)
{
return -RT_ENOMEM;
}
memset(contex, 0, sizeof(struct hash_ctx_des));
ctx->contex = contex;
((struct hwcrypto_hash *)ctx)->ops = &hash_ops;
if ((ctx->type & HWCRYPTO_MAIN_TYPE_MASK) == HWCRYPTO_TYPE_MD5)
{
tls_crypto_md5_init(&((struct hash_ctx_des *)contex)->contex);
}
else
{
tls_crypto_sha1_init(&((struct hash_ctx_des *)contex)->contex);
}
break;
case HWCRYPTO_TYPE_DES:
ctx->contex = RT_NULL;
((struct hwcrypto_symmetric *)ctx)->ops = &des_ops;
break;
case HWCRYPTO_TYPE_3DES:
ctx->contex = RT_NULL;
((struct hwcrypto_symmetric *)ctx)->ops = &des3_ops;
break;
case HWCRYPTO_TYPE_RNG:
ctx->contex = RT_NULL;
((struct hwcrypto_rng *)ctx)->ops = &rng_ops;
ctx->contex = RT_NULL;
break;
case HWCRYPTO_TYPE_CRC:
ctx->contex = RT_NULL;
((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
break;
case HWCRYPTO_TYPE_BIGNUM:
((struct hwcrypto_bignum *)ctx)->ops = &bignum_ops;
break;
default:
res = -RT_ERROR;
break;
}
return res;
}
static void _crypto_destroy(struct rt_hwcrypto_ctx *ctx)
{
rt_free(ctx->contex);
}
static rt_err_t _crypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcrypto_ctx *src)
{
rt_err_t res = RT_EOK;
switch (src->type & HWCRYPTO_MAIN_TYPE_MASK)
{
case HWCRYPTO_TYPE_AES:
case HWCRYPTO_TYPE_RC4:
case HWCRYPTO_TYPE_RNG:
case HWCRYPTO_TYPE_CRC:
case HWCRYPTO_TYPE_BIGNUM:
break;
case HWCRYPTO_TYPE_MD5:
case HWCRYPTO_TYPE_SHA1:
if (des->contex && src->contex)
{
rt_memcpy(des->contex, src->contex, sizeof(struct hash_ctx_des));
}
break;
default:
res = -RT_ERROR;
break;
}
return res;
}
static void _crypto_reset(struct rt_hwcrypto_ctx *ctx)
{
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
{
case HWCRYPTO_TYPE_AES:
case HWCRYPTO_TYPE_RC4:
case HWCRYPTO_TYPE_RNG:
case HWCRYPTO_TYPE_CRC:
break;
case HWCRYPTO_TYPE_MD5:
tls_crypto_md5_init(&((struct hash_ctx_des *)(ctx->contex))->contex);
break;
case HWCRYPTO_TYPE_SHA1:
tls_crypto_sha1_init(&((struct hash_ctx_des *)(ctx->contex))->contex);
break;
default:
break;
}
}
static const struct rt_hwcrypto_ops _ops =
{
.create = _crypto_create,
.destroy = _crypto_destroy,
.copy = _crypto_clone,
.reset = _crypto_reset,
};
extern u8 *wpa_supplicant_get_mac(void);
int wm_hw_crypto_device_init(void)
{
static struct wm_hwcrypto_device _crypto_dev;
_crypto_dev.dev.ops = &_ops;
_crypto_dev.dev.id = 0;
rt_memcpy(&_crypto_dev.dev.id, wpa_supplicant_get_mac(),
sizeof(_crypto_dev.dev.id) > 6 ?
6 : sizeof(_crypto_dev.dev.id));
_crypto_dev.dev.user_data = &_crypto_dev;
if (rt_hwcrypto_register(&_crypto_dev.dev,
RT_HWCRYPTO_DEFAULT_NAME) != RT_EOK)
{
return -1;
}
rt_mutex_init(&_crypto_dev.mutex, RT_HWCRYPTO_DEFAULT_NAME, RT_IPC_FLAG_FIFO);
return 0;
}
INIT_DEVICE_EXPORT(wm_hw_crypto_device_init);

10
bsp/w60x/drivers/drv_spiflash.h → bsp/w60x/drivers/drv_crypto.h
View File

@ -5,12 +5,12 @@
*
* Change Logs:
* Date Author Notes
* 2018-11-12 fanwenl 1st version
* 2019-05-17 tyx 1st version
*/
#ifndef __DRV_SPI_FLASH_H_
#define __DRV_SPI_FLASH_H_
#ifndef __DRV_CRYPTO_H__
#define __DRV_CRYPTO_H__
int wm_nor_flash_init(void);
int wm_hw_crypto_device_init(void);
#endif /* __DRV_SPI_FLASH_H_ */
#endif /* __DRV_CRYPTO_H__ */

158
bsp/w60x/drivers/drv_flash.c Normal file
View File

@ -0,0 +1,158 @@
/*
* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-04 tyx 1st version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "wm_flash_map.h"
#include "wm_internal_flash.h"
#include "drv_flash.h"
#define FLASH_SECTOR (4096)
#ifdef RT_USING_SPI
static void *_spi0;
#endif
extern unsigned int flashtotalsize;
rt_uint32_t wm_flash_total(void)
{
rt_uint32_t total = 0x100000;
if (flashtotalsize == 0x200000)
{
total = 0x200000;
}
return total;
}
rt_uint32_t wm_flash_addr(void)
{
return FLASH_BASE_ADDR;
}
rt_uint32_t wm_flash_blksize(void)
{
return FLASH_SECTOR;
}
int wm_flash_read(long offset, void *data, int size)
{
offset += FLASH_BASE_ADDR;
#ifdef RT_USING_SPI
if (_spi0)
{
rt_spi_take_bus(_spi0);
}
#endif
if (tls_fls_read(offset, data, size) != TLS_FLS_STATUS_OK)
{
size = -1;
}
#ifdef RT_USING_SPI
if (_spi0)
{
rt_spi_release_bus(_spi0);
}
#endif
return size;
}
int wm_flash_write(long offset, void *data, int size)
{
offset += FLASH_BASE_ADDR;
#ifdef RT_USING_SPI
if (_spi0)
{
rt_spi_take_bus(_spi0);
}
#endif
if (tls_fls_write(offset, data, size) != TLS_FLS_STATUS_OK)
{
size = -1;
}
#ifdef RT_USING_SPI
if (_spi0)
{
rt_spi_release_bus(_spi0);
}
#endif
return size;
}
int wm_flash_erase(long offset, int size)
{
int count, sector;
offset += FLASH_BASE_ADDR;
count = size / FLASH_SECTOR;
sector = offset / FLASH_SECTOR;
#ifdef RT_USING_SPI
if (_spi0)
{
rt_spi_take_bus(_spi0);
}
#endif
while (count)
{
if (tls_fls_erase(sector) != TLS_FLS_STATUS_OK)
{
size = -1;
break;
}
count--;
sector++;
}
#ifdef RT_USING_SPI
if (_spi0)
{
rt_spi_release_bus(_spi0);
}
#endif
return size;
}
int wm_flash_init(void)
{
#ifdef RT_USING_SPI
rt_err_t ret;
if (_spi0 != RT_NULL)
{
return 0;
}
_spi0 = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
RT_ASSERT(_spi0 != RT_NULL);
#ifdef WM_SPI_BUS_NAME
ret = rt_spi_bus_attach_device(_spi0, "flash", WM_SPI_BUS_NAME, RT_NULL);
#else
ret = rt_spi_bus_attach_device(_spi0, "flash", "spi0", RT_NULL);
#endif
if (ret != RT_EOK)
{
rt_free(_spi0);
_spi0 = RT_NULL;
}
if (_spi0)
{
((struct rt_spi_device *)_spi0)->config.mode = RT_SPI_MODE_0;
((struct rt_spi_device *)_spi0)->config.data_width = 8;
((struct rt_spi_device *)_spi0)->config.max_hz = 20 * 1000 * 1000;
}
#endif
return 0;
}

24
bsp/w60x/drivers/drv_flash.h Normal file
View File

@ -0,0 +1,24 @@
/*
* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-04 tyx 1st version
*/
#ifndef __DRV_FLASH_H__
#define __DRV_FLASH_H__
#include <rtthread.h>
int wm_flash_read(long offset, void *data, int size);
int wm_flash_write(long offset, void *data, int size);
int wm_flash_erase(long offset, int size);
int wm_flash_init(void);
rt_uint32_t wm_flash_total(void);
rt_uint32_t wm_flash_addr(void);
rt_uint32_t wm_flash_blksize(void);
#endif

7
bsp/w60x/drivers/drv_hw_timer.c
View File

@ -63,6 +63,11 @@ static void wm_timer_stop(rt_hwtimer_t *timer)
tls_timer_stop(wm_timer->id);
}
static rt_uint32_t wm_timer_get(rt_hwtimer_t *timer)
{
return 0;
}
static rt_err_t wm_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
{
/* The frequency value is an immutable value. */
@ -93,7 +98,7 @@ static const struct rt_hwtimer_ops _ops =
wm_timer_init,
wm_timer_start,
wm_timer_stop,
RT_NULL,
wm_timer_get,
wm_timer_ctrl,
};

5
bsp/w60x/drivers/drv_i2c.c
View File

@ -10,6 +10,7 @@
#include <rtdevice.h>
#include <rtthread.h>
#include "board.h"
#include "wm_i2c.h"
#include "wm_io.h"
#include "wm_gpio_afsel.h"
@ -167,7 +168,11 @@ int wm_hw_i2c_init(void)
tls_i2c_init(WM_HW_I2C_FREQ);
wm_i2c.parent.ops = &wm_i2c_ops;
#ifdef WM_I2C_BUS_NAME
rt_i2c_bus_device_register(&wm_i2c.parent, WM_I2C_BUS_NAME);
#else
rt_i2c_bus_device_register(&wm_i2c.parent, "i2c");
#endif
return 0;
}

4
bsp/w60x/drivers/drv_rtc.c
View File

@ -20,6 +20,10 @@
#ifdef BSP_USING_RTC
#if defined(RT_USING_SOFT_RTC)
#error "Please CANCEL the RT_USING_SOFT_RTC option. Make sure there is only one RTC device on the system."
#endif
static struct rt_rtc_device rtc_device;
static time_t wm_get_timestamp(void)

243
bsp/w60x/drivers/drv_soft_i2c.c Normal file
View File

@ -0,0 +1,243 @@
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-22 balanceTWK first version
*/
#include <board.h>
#include "drv_soft_i2c.h"
#include "wm_regs.h"
#include "wm_gpio.h"
#include "pin_map.h"
#define DBG_SECTION_NAME "soft_i2c"
#define DBG_COLOR
#define DBG_LEVEL DBG_LOG
#include <rtdbg.h>
#ifdef BSP_USING_SOFT_I2C
#if !defined(BSP_USING_SOFT_I2C1) && !defined(BSP_USING_SOFT_I2C2) && !defined(BSP_USING_SOFT_I2C3)
#error "Please define at least one BSP_USING_SOFT_I2Cx"
#endif
static const struct w60x_soft_i2c_config soft_i2c_config[] =
{
#ifdef BSP_USING_SOFT_I2C1
I2C1_BUS_CONFIG,
#endif
#ifdef BSP_USING_SOFT_I2C2
I2C2_BUS_CONFIG,
#endif
#ifdef BSP_USING_SOFT_I2C3
I2C3_BUS_CONFIG,
#endif
};
static struct w60x_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];
/**
* This function initializes the i2c pin.
*
* @param w60x i2c dirver class.
*/
static void w60x_i2c_gpio_init(struct w60x_i2c *i2c)
{
struct w60x_soft_i2c_config* cfg = (struct w60x_soft_i2c_config*)i2c->ops.data;
rt_int16_t scl,sda;
scl = wm_get_pin(cfg->scl);
sda = wm_get_pin(cfg->sda);
tls_gpio_cfg((enum tls_io_name)scl, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_PULLHIGH);
tls_gpio_cfg((enum tls_io_name)sda, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_PULLHIGH);
tls_gpio_write((enum tls_io_name)scl, 1);
tls_gpio_write((enum tls_io_name)sda, 1);
}
/**
* This function sets the sda pin.
*
* @param w60x config class.
* @param The sda pin state.
*/
static void w60x_set_sda(void *data, rt_int32_t state)
{
struct w60x_soft_i2c_config* cfg = (struct w60x_soft_i2c_config*)data;
rt_int16_t sda;
sda = wm_get_pin(cfg->sda);
if (state)
{
tls_gpio_cfg((enum tls_io_name)sda, WM_GPIO_DIR_INPUT, WM_GPIO_ATTR_PULLHIGH);
}
else
{
tls_gpio_cfg((enum tls_io_name)sda, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_FLOATING);
tls_gpio_write((enum tls_io_name)sda, 0);
}
}
/**
* This function sets the scl pin.
*
* @param w60x config class.
* @param The scl pin state.
*/
static void w60x_set_scl(void *data, rt_int32_t state)
{
struct w60x_soft_i2c_config* cfg = (struct w60x_soft_i2c_config*)data;
rt_int16_t scl;
scl = wm_get_pin(cfg->scl);
if (state)
{
tls_gpio_cfg((enum tls_io_name)scl, WM_GPIO_DIR_INPUT, WM_GPIO_ATTR_PULLHIGH);
}
else
{
tls_gpio_cfg((enum tls_io_name)scl, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_FLOATING);
tls_gpio_write((enum tls_io_name)scl, 0);
}
}
/**
* This function gets the sda pin state.
*
* @param The sda pin state.
*/
static rt_int32_t w60x_get_sda(void *data)
{
struct w60x_soft_i2c_config* cfg = (struct w60x_soft_i2c_config*)data;
rt_int16_t sda;
sda = wm_get_pin(cfg->sda);
return tls_gpio_read((enum tls_io_name)sda);
}
/**
* This function gets the scl pin state.
*
* @param The scl pin state.
*/
static rt_int32_t w60x_get_scl(void *data)
{
struct w60x_soft_i2c_config* cfg = (struct w60x_soft_i2c_config*)data;
rt_int16_t scl;
scl = wm_get_pin(cfg->scl);
return tls_gpio_read((enum tls_io_name)scl);
}
/**
* The time delay function.
*
* @param microseconds.
*/
static void w60x_udelay(rt_uint32_t us)
{
rt_uint32_t ticks;
rt_uint32_t told, tnow, tcnt = 0;
rt_uint32_t reload = SysTick->LOAD;
ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
told = SysTick->VAL;
while (1)
{
tnow = SysTick->VAL;
if (tnow != told)
{
if (tnow < told)
{
tcnt += told - tnow;
}
else
{
tcnt += reload - tnow + told;
}
told = tnow;
if (tcnt >= ticks)
{
break;
}
}
}
}
static const struct rt_i2c_bit_ops w60x_bit_ops_default =
{
.data = RT_NULL,
.set_sda = w60x_set_sda,
.set_scl = w60x_set_scl,
.get_sda = w60x_get_sda,
.get_scl = w60x_get_scl,
.udelay = w60x_udelay,
.delay_us = 1,
.timeout = 100
};
/**
* if i2c is locked, this function will unlock it
*
* @param w60x config class
*
* @return RT_EOK indicates successful unlock.
*/
static rt_err_t w60x_i2c_bus_unlock(const struct w60x_soft_i2c_config *cfg)
{
rt_int32_t i = 0;
if (PIN_LOW == rt_pin_read(cfg->sda))
{
while (i++ < 9)
{
rt_pin_write(cfg->scl, PIN_HIGH);
w60x_udelay(100);
rt_pin_write(cfg->scl, PIN_LOW);
w60x_udelay(100);
}
}
if (PIN_LOW == rt_pin_read(cfg->sda))
{
return -RT_ERROR;
}
return RT_EOK;
}
/* I2C initialization function */
int rt_soft_i2c_init(void)
{
rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct w60x_i2c);
rt_err_t result;
for (int i = 0; i < obj_num; i++)
{
i2c_obj[i].ops = w60x_bit_ops_default;
i2c_obj[i].ops.data = (void*)&soft_i2c_config[i];
i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops;
w60x_i2c_gpio_init(&i2c_obj[i]);
result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name);
RT_ASSERT(result == RT_EOK);
w60x_i2c_bus_unlock(&soft_i2c_config[i]);
LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
soft_i2c_config[i].bus_name,
soft_i2c_config[i].scl,
soft_i2c_config[i].sda);
}
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_soft_i2c_init);
#endif /* BSP_USING_SOFT_I2C */

61
bsp/w60x/drivers/drv_soft_i2c.h Normal file
View File

@ -0,0 +1,61 @@
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-22 balanceTWK first version
*/
#ifndef __DRV_SOFT_I2C__
#define __DRV_SOFT_I2C__
#include <rtthread.h>
#include <rthw.h>
#include <rtdevice.h>
/* w60x config class */
struct w60x_soft_i2c_config
{
rt_uint8_t scl;
rt_uint8_t sda;
const char *bus_name;
};
/* w60x i2c dirver class */
struct w60x_i2c
{
struct rt_i2c_bit_ops ops;
struct rt_i2c_bus_device i2c2_bus;
};
#ifdef BSP_USING_SOFT_I2C1
#define I2C1_BUS_CONFIG \
{ \
.scl = SOFT_I2C1_SCL_PIN, \
.sda = SOFT_I2C1_SDA_PIN, \
.bus_name = "i2c1soft", \
}
#endif
#ifdef BSP_USING_SOFT_I2C2
#define I2C2_BUS_CONFIG \
{ \
.scl = SOFT_I2C2_SCL_PIN, \
.sda = SOFT_I2C2_SDA_PIN, \
.bus_name = "i2c2soft", \
}
#endif
#ifdef BSP_USING_SOFT_I2C3
#define I2C3_BUS_CONFIG \
{ \
.scl = SOFT_I2C3_SCL_PIN, \
.sda = SOFT_I2C3_SDA_PIN, \
.bus_name = "i2c3soft", \
}
#endif
int rt_hw_i2c_init(void);
#endif

19
bsp/w60x/drivers/drv_spi.c
View File

@ -10,6 +10,7 @@
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
#include "wm_hostspi.h"
#include "wm_spi_hal.h"
#include "wm_io.h"
@ -92,10 +93,13 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
rt_int32_t length = 0;
rt_int32_t remain_length = message->length;
rt_int32_t int_status;
tls_irq_disable(SPI0_INT);
length = spi_fill_txfifo(&tls_transfer, remain_length);
spi_set_sclk_length(length * 8, 0);
if (message->cs_take)
if (message->cs_take && cs)
{
tls_gpio_write((enum tls_io_name)cs->pin, 0);
}
@ -112,7 +116,7 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
{
while (spi_i2s_get_busy_status() == 1)
;
if (message->cs_release)
if (message->cs_release && cs)
{
tls_gpio_write((enum tls_io_name)cs->pin, 1);
}
@ -129,10 +133,15 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
while (spi_i2s_get_busy_status() == 1)
;
if (message->cs_release)
if (message->cs_release && cs)
{
tls_gpio_write((enum tls_io_name)cs->pin, 1);
}
int_status = spi_get_int_status();
spi_clear_int_status(int_status);
tls_irq_enable(SPI0_INT);
return message->length - remain_length;
}
@ -193,7 +202,11 @@ int wm_hw_spi_bus_init(void)
}
wm_spi_bus.parent.user_data = &spi;
#ifdef WM_SPI_BUS_NAME
rt_spi_bus_register(&wm_spi_bus, WM_SPI_BUS_NAME, &wm_spi_ops);
#else
rt_spi_bus_register(&wm_spi_bus, "spi0", &wm_spi_ops);
#endif
return RT_EOK;
}

33
bsp/w60x/drivers/drv_spiflash.c
View File

@ -1,33 +0,0 @@
/*
* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-12 fanwenl 1st version
*/
#include <rtthread.h>
#include <rtdevice.h>
#ifdef BSP_USING_FLASH
#include "drv_spi.h"
#include "string.h"
#include "spi_flash.h"
#include "spi_flash_sfud.h"
int wm_nor_flash_init(void)
{
rt_spi_flash_device_t spi_device;
wm_spi_bus_attach_device(SPI_Flash_BUS_NAME, "norspi", SPI_Flash_CS_PIN);
spi_device = rt_sfud_flash_probe("flash0", "norspi");
if (spi_device == RT_NULL)
{
return -RT_ERROR;
}
return 0;
}
INIT_DEVICE_EXPORT(wm_nor_flash_init);
#endif

1
bsp/w60x/drivers/drv_uart.c
View File

@ -10,6 +10,7 @@
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
#include "wm_io.h"
#include "wm_uart.h"
#include "wm_gpio_afsel.h"

6
bsp/w60x/drivers/drv_wifi.c
View File

@ -14,8 +14,10 @@
#include "wm_wifi.h"
#include "drv_wifi.h"
#define DBG_TAG "WIFI"
#define DBG_LVL DBG_INFO
#define DBG_ENABLE
#define DBG_LEVEL DBG_INFO
#define DBG_SECTION_NAME "WIFI"
#define DBG_COLOR
#include <rtdbg.h>
#include "wm_ram_config.h"

4
bsp/w60x/drivers/linker_scripts/link.icf
View File

@ -7,9 +7,9 @@ define symbol __ICFEDIT_intvec_start__ = 0x08010100;
/* rom 959K */
define symbol __ICFEDIT_region_ROM_start__ = 0x08010100;
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
/* ram 224k */
/* ram 160k */
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2003C000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20028000;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0xc00;
define symbol __ICFEDIT_size_heap__ = 0x1A000;

8
bsp/w60x/drivers/linker_scripts/link.lds
View File

@ -9,7 +9,7 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x8010100, LENGTH = 959K /* 960K-256B */
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x3C000 /* 240K */
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 0x28000 /* 160K */
}
/* Linker script to place sections and symbol values. Should be used together
@ -78,6 +78,12 @@ SECTIONS
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
__rtatcmdtab_start = .;
KEEP(*(RtAtCmdTab))
__rtatcmdtab_end = .;
. = ALIGN(4);
. = ALIGN(4);
KEEP(*(.init))
KEEP(*(.fini))

3
bsp/w60x/drivers/linker_scripts/link.sct
View File

@ -7,8 +7,9 @@ LR_IROM1 0x08010100 0x000EFEFF { ; load region size_region
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x0003C000 { ; RW data
RW_IRAM1 0x20000000 0x00028000 { ; RW data
.ANY (+RW +ZI)
}
}

36
bsp/w60x/drivers/pin_config.h Normal file
View File

@ -0,0 +1,36 @@
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-06-01 Ernest the first version
*/
#ifndef __PIN_CONFIG_H__
#define __PIN_CONFIG_H__
// UART
#define WM_UART2_RX_PIN 1 // PB19 : UART2_RX (W601)
#define WM_UART2_TX_PIN 2 // PB20 : UART2_TX (W601)
#define WM_UART1_RX_PIN 31 // PB11 : UART1_RX (W600)
#define WM_UART1_TX_PIN 32 // PB12 : UART1_TX (W600)
// spi
#define WM_SPI_CK_PIN 53 // PB27 : SPI_SCK
#define WM_SPI_DI_PIN 55 // PB1 : SPI_MISO
#define WM_SPI_DO_PIN 56 // PB2 : SPI_MOSI
// i2c
#define WM_I2C_SCL_PIN 18
#define WM_I2C_DAT_PIN 19
// soft i2c
#define SOFT_I2C1_SCL_PIN 23 // PA0 : I2C1_SCL
#define SOFT_I2C1_SDA_PIN 24 // PA1 : I2C1_SDA
#define SOFT_I2C2_SCL_PIN 25 // PA2 : I2C2_SCL
#define SOFT_I2C2_SDA_PIN 24 // PA1 : I2C2_SDA
#endif /* __PIN_CONFIG_H__ */

15
bsp/w60x/oneshot/SConscript Normal file
View File

@ -0,0 +1,15 @@
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = []
path = [cwd]
src += ['oneshot.c']
if GetDepend(['WM_USING_ONESHOT_DEMO']):
src += ['oneshot_demo.c']
group = DefineGroup('oneshot', src, depend = ['WM_USING_ONESHOT'], CPPPATH = path)
Return('group')

52
bsp/w60x/oneshot/oneshot.c Normal file
View File

@ -0,0 +1,52 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-01-25 winner micro
*/
#include <rtthread.h>
#include "oneshot.h"
#include "wm_wifi_oneshot.h"
#include "wm_wifi.h"
/* start oneshot */
int wm_oneshot_start(WM_ONESHOT_MODE mode, wm_oneshot_callback callback)
{
tls_wifi_oneshot_callback_register(callback);
if(mode == WM_UDP)
{
tls_wifi_set_oneshot_config_mode(0);
}
else if (mode == WM_APSOCKET)
{
tls_wifi_set_oneshot_config_mode(1);
}
else if(mode == WM_APWEB)
{
tls_wifi_set_oneshot_config_mode(2);
}
else
{
return -1;
}
tls_wifi_set_oneshot_flag(1);
return 0;
}
/* stop oneshot */
int wm_oneshot_stop(void)
{
tls_wifi_oneshot_callback_delete();
tls_wifi_set_oneshot_flag(0);
return 0;
}
/* get status */
int wm_oneshot_get(void)
{
return tls_wifi_get_oneshot_flag();
}

27
bsp/w60x/oneshot/oneshot.h Normal file
View File

@ -0,0 +1,27 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-01-25 winner micro
*/
#ifndef DRV_ONESHOT_H__
#define DRV_ONESHOT_H__
typedef enum{
WM_UDP,
WM_APSOCKET,
WM_APWEB
}WM_ONESHOT_MODE;
typedef void (*wm_oneshot_callback)(int state, unsigned char *ssid, unsigned char *key);
extern int wm_oneshot_start(WM_ONESHOT_MODE mode, wm_oneshot_callback callback);
extern int wm_oneshot_stop(void);
extern int wm_oneshot_get(void);
#endif

149
bsp/w60x/oneshot/oneshot_demo.c Normal file
View File

@ -0,0 +1,149 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-01-25 tyx add w600
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "oneshot.h"
#define NET_READY_TIME_OUT (rt_tick_from_millisecond(30 * 1000))
struct join_info
{
char ssid[64];
char passwd[64];
};
static int rt_wlan_device_connetct(char *ssid, char *passwd)
{
int result = RT_EOK;
rt_uint8_t time_cnt = 0;
result = rt_wlan_connect(ssid, passwd);
if (result != RT_EOK)
{
rt_kprintf("\nconnect ssid %s error:%d!\n", ssid, result);
return result;
};
do
{
rt_thread_mdelay(1000);
time_cnt ++;
if (rt_wlan_is_ready())
{
break;
}
}
while (time_cnt <= (NET_READY_TIME_OUT / 1000));
if (time_cnt <= (NET_READY_TIME_OUT / 1000))
{
rt_kprintf("networking ready!\n");
}
else
{
rt_kprintf("wait ip got timeout!\n");
result = -RT_ETIMEOUT;
}
return result;
}
static void join_wifi_thread(void *param)
{
struct join_info *info = param;
rt_kprintf("connect wifi:%s\n", info->ssid);
if (rt_strlen(info->passwd) > 0)
{
rt_wlan_device_connetct(info->ssid, info->passwd);
}
else
{
rt_wlan_device_connetct(info->ssid, RT_NULL);
}
rt_free(info);
}
static void wm_oneshot_result_cb(int state, unsigned char *ssid, unsigned char *passwd)
{
rt_thread_t tid;
struct join_info *info;
if (state != 0)
{
rt_kprintf("Receive wifi info timeout(%d). exit!\n", state);
return;
}
if (ssid == RT_NULL)
{
rt_kprintf("SSID is NULL. exit!\n");
return;
}
rt_kprintf("Receive ssid:%s passwd:%s\n", ssid == RT_NULL ? "" : ssid, passwd == RT_NULL ? "" : passwd);
info = rt_malloc(sizeof(struct join_info));
if (info == RT_NULL)
{
return;
}
rt_memset(info, 0, sizeof(struct join_info));
rt_strncpy(info->ssid, ssid, sizeof(info->ssid));
if (passwd)
{
rt_strncpy(info->passwd, passwd, sizeof(info->passwd));
}
tid = rt_thread_create("join", join_wifi_thread, info, 2048, 22, 20);
if (tid == RT_NULL)
{
rt_free(info);
return;
}
rt_thread_startup(tid);
}
void oneshot_demo(int argc, char *argv[])
{
WM_ONESHOT_MODE mode = WM_UDP;
if (argc > 2)
{
rt_kprintf("use: %s [web]", __FUNCTION__);
return;
}
if (argc == 2)
{
if (rt_strcmp("web", argv[1]) == 0)
{
mode = WM_APWEB;
}
else if(rt_strcmp("udp", argv[1]) == 0)
{
mode = WM_UDP;
}
else
{
rt_kprintf("use: %s [web]", __FUNCTION__);
return;
}
}
if (wm_oneshot_start(mode, wm_oneshot_result_cb) == 0)
{
rt_kprintf("oneshot start...\n");
}
else
{
rt_kprintf("oneshot start failed\n");
}
}
#ifdef RT_USING_FINSH
#include "finsh.h"
MSH_CMD_EXPORT(oneshot_demo, oneshot demo);
#endif

139
bsp/w60x/project.ewp
View File

@ -221,7 +221,6 @@
<state>__inline__=inline</state>
<state>RT_USING_DLIBC</state>
<state>_DLIB_FILE_DESCRIPTOR</state>
<state>_DLIB_THREAD_SUPPORT</state>
</option>
<option>
<name>CCPreprocFile</name>
@ -350,6 +349,7 @@
<state>$PROJ_DIR$\..\..\components\net\sal_socket\include\socket</state>
<state>$PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\include\ipv4</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Boot\gcc</state>
<state>$PROJ_DIR$\oneshot</state>
<state>$PROJ_DIR$\..\..\components\net\sal_socket\include</state>
<state>$PROJ_DIR$\..\..\include</state>
<state>$PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\include\netif</state>
@ -368,9 +368,11 @@
<state>$PROJ_DIR$\.</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Include\OS</state>
<state>$PROJ_DIR$\..\..\components\utilities\ulog</state>
<state>$PROJ_DIR$\..\..\components\dfs\include</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Include\Platform</state>
<state>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3</state>
<state>$PROJ_DIR$\packages\netutils-v1.1.0\ntp</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Include\Platform</state>
<state>$PROJ_DIR$\..\..\components\drivers\hwcrypto</state>
<state>$PROJ_DIR$\..\..\components\dfs\include</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Inc</state>
<state>$PROJ_DIR$\..\..\components\net\sal_socket\include\socket\sys_socket</state>
<state>$PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\include</state>
@ -379,6 +381,7 @@
<state>$PROJ_DIR$\packages\wm_libraries-latest\Include\WiFi</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Drivers\spi</state>
<state>$PROJ_DIR$\..\..\components\drivers\spi</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\math</state>
<state>$PROJ_DIR$\applications</state>
<state>$PROJ_DIR$\..\..\components\net\netdev\include</state>
@ -774,7 +777,7 @@
</option>
<option>
<name>IlinkMapFile</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>IlinkLogFile</name>
@ -1149,7 +1152,7 @@
</option>
<option>
<name>GEndianModeBE</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>OGBufferedTerminalOutput</name>
@ -1180,7 +1183,7 @@
<option>
<name>GBECoreSlave</name>
<version>26</version>
<state>1</state>
<state>38</state>
</option>
<option>
<name>OGUseCmsis</name>
@ -1197,7 +1200,7 @@
<option>
<name>CoreVariant</name>
<version>26</version>
<state>0</state>
<state>38</state>
</option>
<option>
<name>GFPUDeviceSlave</name>
@ -1220,7 +1223,7 @@
<option>
<name>GFPUCoreSlave2</name>
<version>26</version>
<state>0</state>
<state>38</state>
</option>
<option>
<name>OGCMSISPackSelectDevice</name>
@ -1285,7 +1288,6 @@
<state>__inline__=inline</state>
<state>RT_USING_DLIBC</state>
<state>_DLIB_FILE_DESCRIPTOR</state>
<state>_DLIB_THREAD_SUPPORT</state>
</option>
<option>
<name>CCPreprocFile</name>
@ -1374,7 +1376,7 @@
</option>
<option>
<name>CCSignedPlainChar</name>
<state>1</state>
<state>0</state>
</option>
<option>
<name>CCRequirePrototypes</name>
@ -1414,6 +1416,7 @@
<state>$PROJ_DIR$\..\..\components\net\sal_socket\include\socket</state>
<state>$PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\include\ipv4</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Boot\gcc</state>
<state>$PROJ_DIR$\oneshot</state>
<state>$PROJ_DIR$\..\..\components\net\sal_socket\include</state>
<state>$PROJ_DIR$\..\..\include</state>
<state>$PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\include\netif</state>
@ -1432,9 +1435,11 @@
<state>$PROJ_DIR$\.</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Include\OS</state>
<state>$PROJ_DIR$\..\..\components\utilities\ulog</state>
<state>$PROJ_DIR$\..\..\components\dfs\include</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Include\Platform</state>
<state>$PROJ_DIR$\..\..\libcpu\arm\cortex-m3</state>
<state>$PROJ_DIR$\packages\netutils-v1.1.0\ntp</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Include\Platform</state>
<state>$PROJ_DIR$\..\..\components\drivers\hwcrypto</state>
<state>$PROJ_DIR$\..\..\components\dfs\include</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Inc</state>
<state>$PROJ_DIR$\..\..\components\net\sal_socket\include\socket\sys_socket</state>
<state>$PROJ_DIR$\..\..\components\net\lwip-2.0.2\src\include</state>
@ -1443,6 +1448,7 @@
<state>$PROJ_DIR$\packages\wm_libraries-latest\Include\WiFi</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Drivers\spi</state>
<state>$PROJ_DIR$\..\..\components\drivers\spi</state>
<state>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\math</state>
<state>$PROJ_DIR$\applications</state>
<state>$PROJ_DIR$\..\..\components\net\netdev\include</state>
@ -1476,7 +1482,7 @@
</option>
<option>
<name>CCOptLevelSlave</name>
<state>1</state>
<state>3</state>
</option>
<option>
<name>CompilerMisraRules98</name>
@ -1739,15 +1745,15 @@
<option>
<name>OOCOutputFormat</name>
<version>3</version>
<state>0</state>
<state>3</state>
</option>
<option>
<name>OCOutputOverride</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>OOCOutputFile</name>
<state />
<state>../../rtthread.bin</state>
</option>
<option>
<name>OOCCommandLineProducer</name>
@ -1755,7 +1761,7 @@
</option>
<option>
<name>OOCObjCopyEnable</name>
<state>0</state>
<state>1</state>
</option>
</data>
</settings>
@ -1778,7 +1784,7 @@
<archiveVersion>1</archiveVersion>
<data>
<prebuild />
<postbuild />
<postbuild>cmd /c "$PROJ_DIR$\makeimg.bat"</postbuild>
</data>
</settings>
<settings>
@ -1838,7 +1844,7 @@
</option>
<option>
<name>IlinkMapFile</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>IlinkLogFile</name>
@ -1862,11 +1868,11 @@
</option>
<option>
<name>IlinkIcfOverride</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>IlinkIcfFile</name>
<state>lnk0t.icf</state>
<state>$PROJ_DIR$\.\drivers\linker_scripts\link.icf</state>
</option>
<option>
<name>IlinkIcfFileSlave</name>
@ -2190,6 +2196,9 @@
<file>
<name>$PROJ_DIR$\drivers\drv_uart.c</name>
</file>
<file>
<name>$PROJ_DIR$\drivers\drv_flash.c</name>
</file>
<file>
<name>$PROJ_DIR$\drivers\pin_map.c</name>
</file>
@ -2200,6 +2209,18 @@
<name>$PROJ_DIR$\drivers\drv_pin.c</name>
</file>
</group>
<group>
<name>oneshot</name>
<file>
<name>$PROJ_DIR$\oneshot\oneshot.c</name>
</file>
</group>
<group>
<name>NetUtils</name>
<file>
<name>$PROJ_DIR$\packages\netutils-v1.1.0\ntp\ntp.c</name>
</file>
</group>
<group>
<name>Libraries</name>
<file>
@ -2266,13 +2287,13 @@
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\wm_crypto_hard.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\hmac.c</name>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\wm_crypto_hmac.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\md2.c</name>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\wm_crypto_md2.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\md4.c</name>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\wm_crypto_md4.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\sha224.c</name>
@ -2281,16 +2302,16 @@
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\sha384.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\sha512.c</name>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\digest\wm_crypto_sha512.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\keyformat\asn1.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\keyformat\base64.c</name>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\keyformat\wm_crypto_base64.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\keyformat\x509.c</name>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\keyformat\wm_crypto_x509.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\math\pstm_mul_comba.c</name>
@ -2314,7 +2335,7 @@
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\pubkey\pubkey.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\pubkey\rsa.c</name>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\pubkey\wm_crypto_rsa.c</name>
</file>
<file>
<name>$PROJ_DIR$\packages\wm_libraries-latest\Platform\Common\crypto\symmetric\aesGCM.c</name>
@ -2388,12 +2409,57 @@
</group>
<group>
<name>DeviceDrivers</name>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\hwcrypto\hwcrypto.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\hwcrypto\hw_symmetric.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\hwcrypto\hw_hash.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\hwcrypto\hw_rng.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\hwcrypto\hw_crc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\hwcrypto\hw_bignum.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\hwtimer\hwtimer.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\i2c\i2c_core.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\i2c\i2c_dev.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\i2c\i2c-bit-ops.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\misc\pin.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\misc\rt_drv_pwm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\rtc\rtc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\rtc\soft_rtc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\serial\serial.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\spi\spi_core.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\spi\spi_dev.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\src\completion.c</name>
</file>
@ -2416,23 +2482,26 @@
<name>$PROJ_DIR$\..\..\components\drivers\src\workqueue.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_cfg.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_cmd.c</name>
<name>$PROJ_DIR$\..\..\components\drivers\watchdog\watchdog.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_dev.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_lwip.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_mgnt.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_cmd.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_prot.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_lwip.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_cfg.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\components\drivers\wlan\wlan_workqueue.c</name>
</file>

1990
bsp/w60x/project.uvoptx
View File

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587
bsp/w60x/project.uvprojx
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70
bsp/w60x/rtconfig.h
View File

@ -89,27 +89,61 @@
#define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_HWTIMER
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
/* Using Hardware Crypto drivers */
/* Using WiFi */
#define RT_USING_PWM
#define RT_USING_RTC
#define RT_USING_SOFT_RTC
#define RTC_SYNC_USING_NTP
#define RTC_NTP_FIRST_SYNC_DELAY 30
#define RTC_NTP_SYNC_PERIOD 3600
#define RT_USING_SPI
#define RT_USING_WDT
#define RT_USING_HWCRYPTO
#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto"
#define RT_HWCRYPTO_IV_MAX_SIZE 16
#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256
#define RT_HWCRYPTO_USING_AES
#define RT_HWCRYPTO_USING_AES_ECB
#define RT_HWCRYPTO_USING_AES_CBC
#define RT_HWCRYPTO_USING_MD5
#define RT_HWCRYPTO_USING_SHA1
#define RT_HWCRYPTO_USING_RNG
#define RT_HWCRYPTO_USING_CRC
#define RT_HWCRYPTO_USING_CRC_07
#define RT_HWCRYPTO_USING_CRC_8005
#define RT_HWCRYPTO_USING_CRC_1021
#define RT_HWCRYPTO_USING_CRC_04C11DB7
#define RT_HWCRYPTO_USING_BIGNUM
#define RT_HWCRYPTO_USING_BIGNUM_EXPTMOD
#define RT_HWCRYPTO_USING_BIGNUM_MULMOD
#define RT_USING_WIFI
#define RT_WLAN_DEVICE_STA_NAME "wlan0"
#define RT_WLAN_DEVICE_AP_NAME "wlan1"
#define RT_WLAN_DEFAULT_PROT "lwip"
#define RT_WLAN_SCAN_WAIT_MS 10000
#define RT_WLAN_CONNECT_WAIT_MS 10000
#define RT_WLAN_SSID_MAX_LENGTH 32
#define RT_WLAN_PASSWORD_MAX_LENGTH 32
#define RT_WLAN_DEV_EVENT_NUM 2
#define RT_WLAN_MANAGE_ENABLE
#define RT_WLAN_SCAN_WAIT_MS 10000
#define RT_WLAN_CONNECT_WAIT_MS 10000
#define RT_WLAN_SCAN_SORT
#define RT_WLAN_MSH_CMD_ENABLE
#define RT_WLAN_AUTO_CONNECT_ENABLE
#define AUTO_CONNECTION_PERIOD_MS 2000
#define RT_WLAN_CFG_ENABLE
#define RT_WLAN_CFG_INFO_MAX 3
#define RT_WLAN_PROT_ENABLE
#define RT_WLAN_PROT_NAME_LEN 8
#define RT_WLAN_PROT_MAX 2
#define RT_WLAN_DEFAULT_PROT "lwip"
#define RT_WLAN_PROT_LWIP_ENABLE
#define RT_WLAN_PROT_LWIP_NAME "lwip"
#define RT_WLAN_WORK_THREAD_ENABLE
#define RT_WLAN_WORKQUEUE_THREAD_NAME "wlan_job"
#define RT_WLAN_WORKQUEUE_THREAD_SIZE 2048
#define RT_WLAN_WORKQUEUE_THREAD_PRIO 22
#define RT_WLAN_DEV_EVENT_NUM 2
/* Using USB */
@ -184,9 +218,6 @@
#define LWIP_NETIF_LOOPBACK 0
#define RT_LWIP_USING_PING
/* Modbus master and slave stack */
/* AT commands */
#define LWIP_USING_DHCPD
@ -224,6 +255,13 @@
/* Wiced WiFi */
#define PKG_USING_NETUTILS
#define PKG_NETUTILS_NTP
#define NETUTILS_NTP_TIMEZONE 8
#define NETUTILS_NTP_HOSTNAME "cn.ntp.org.cn"
#define NETUTILS_NTP_HOSTNAME2 "ntp.rt-thread.org"
#define NETUTILS_NTP_HOSTNAME3 "edu.ntp.org.cn"
#define PKG_USING_NETUTILS_V110
/* IoT Cloud */
@ -262,8 +300,7 @@
/* W60x Device config */
#define SOC_W600_A8xx
/* Hardware Drivers Config */
#define W600_EV_BOARD
/* On-chip Peripheral Drivers */
@ -272,7 +309,8 @@
#define BSP_USING_PIN
#define BSP_USING_WIFI
/* Offboard Peripheral Drivers */
/* External Libraries */
#define WM_USING_ONESHOT
#endif

16
bsp/w60x/rtconfig.py
View File

@ -1,4 +1,5 @@
import os
import sys
# toolchains options
ARCH='arm'
@ -27,6 +28,15 @@ if os.getenv('RTT_EXEC_PATH'):
BUILD = 'debug'
if os.path.exists(os.path.abspath('./') + '/drivers'):
gcc_linkscripts_path = 'drivers/linker_scripts/link.lds'
armcc_linkscripts_path = 'drivers/linker_scripts/link.sct'
iar_linkscripts_path = 'drivers/linker_scripts/link.icf'
else:
gcc_linkscripts_path = '../../drivers/linker_scripts/link.lds'
armcc_linkscripts_path = '../../drivers/linker_scripts/link.sct'
iar_linkscripts_path = '../../drivers/linker_scripts/link.icf'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
@ -44,7 +54,7 @@ if PLATFORM == 'gcc':
DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -std=gnu99 -w -fno-common -fomit-frame-pointer -fno-short-enums -fsigned-char'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -g --specs=nano.specs -nostartfiles -Wl,-Map=rtthread-w60x.map -Os -Wl,--gc-sections -Wl,--cref -Wl,--entry=Reset_Handler -Wl,--no-enum-size-warning -Wl,--no-wchar-size-warning -T ./drivers/linker_scripts/link.lds'
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -g --specs=nano.specs -nostartfiles -Wl,-Map=rtthread-w60x.map -Os -Wl,--gc-sections -Wl,--cref -Wl,--entry=Reset_Handler -Wl,--no-enum-size-warning -Wl,--no-wchar-size-warning -T ' + gcc_linkscripts_path
CPATH = ''
LPATH = ''
@ -69,7 +79,7 @@ elif PLATFORM == 'armcc':
DEVICE = ' --cpu=Cortex-M3'
CFLAGS = DEVICE + ' --apcs=interwork --c99 --gnu'
AFLAGS = DEVICE + ' --apcs=interwork '
LFLAGS = DEVICE + ' --scatter "./drivers/linker_scripts/link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
LFLAGS = DEVICE + ' --scatter ' + armcc_linkscripts_path + ' --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
EXEC_PATH += '/ARM/ARMCC/bin/'
@ -123,7 +133,7 @@ elif PLATFORM == 'iar':
else:
CFLAGS += ' -Oh'
LFLAGS = ' --config ./drivers/linker_scripts/link.icf'
LFLAGS = ' --config ' + iar_linkscripts_path
LFLAGS += ' --entry __iar_program_start'
EXEC_PATH = EXEC_PATH + '/arm/bin/'

30
bsp/w60x/template.ewp
View File

@ -728,7 +728,7 @@
</option>
<option>
<name>IlinkMapFile</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>IlinkLogFile</name>
@ -1101,7 +1101,7 @@
</option>
<option>
<name>GEndianModeBE</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>OGBufferedTerminalOutput</name>
@ -1132,7 +1132,7 @@
<option>
<name>GBECoreSlave</name>
<version>26</version>
<state>1</state>
<state>38</state>
</option>
<option>
<name>OGUseCmsis</name>
@ -1149,7 +1149,7 @@
<option>
<name>CoreVariant</name>
<version>26</version>
<state>0</state>
<state>38</state>
</option>
<option>
<name>GFPUDeviceSlave</name>
@ -1172,7 +1172,7 @@
<option>
<name>GFPUCoreSlave2</name>
<version>26</version>
<state>0</state>
<state>38</state>
</option>
<option>
<name>OGCMSISPackSelectDevice</name>
@ -1320,7 +1320,7 @@
</option>
<option>
<name>CCSignedPlainChar</name>
<state>1</state>
<state>0</state>
</option>
<option>
<name>CCRequirePrototypes</name>
@ -1381,7 +1381,7 @@
</option>
<option>
<name>CCOptLevelSlave</name>
<state>1</state>
<state>3</state>
</option>
<option>
<name>CompilerMisraRules98</name>
@ -1644,15 +1644,15 @@
<option>
<name>OOCOutputFormat</name>
<version>3</version>
<state>0</state>
<state>3</state>
</option>
<option>
<name>OCOutputOverride</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>OOCOutputFile</name>
<state></state>
<state>../../rtthread.bin</state>
</option>
<option>
<name>OOCCommandLineProducer</name>
@ -1660,7 +1660,7 @@
</option>
<option>
<name>OOCObjCopyEnable</name>
<state>0</state>
<state>1</state>
</option>
</data>
</settings>
@ -1683,7 +1683,7 @@
<archiveVersion>1</archiveVersion>
<data>
<prebuild></prebuild>
<postbuild></postbuild>
<postbuild>cmd /c "$PROJ_DIR$\makeimg.bat"</postbuild>
</data>
</settings>
<settings>
@ -1743,7 +1743,7 @@
</option>
<option>
<name>IlinkMapFile</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>IlinkLogFile</name>
@ -1767,11 +1767,11 @@
</option>
<option>
<name>IlinkIcfOverride</name>
<state>0</state>
<state>1</state>
</option>
<option>
<name>IlinkIcfFile</name>
<state>lnk0t.icf</state>
<state>$PROJ_DIR$\.\drivers\linker_scripts\link.icf</state>
</option>
<option>
<name>IlinkIcfFileSlave</name>

2
bsp/w60x/template.uvoptx
View File

@ -120,7 +120,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U20090928 -O78 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN1 -FF0W600_QFlash -FS08000000 -FL0100000</Name>
<Name>-U20090928 -O78 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN1 -FF0W60X_QFlash -FS08000000 -FL0100000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>

4
bsp/w60x/template.uvprojx
View File

@ -300,7 +300,7 @@
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x3c000</Size>
<Size>0x28000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
@ -315,7 +315,7 @@
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>